drm/i915/gvt: Move some MMIO definitions to reg.h
authorZhenyu Wang <zhenyuw@linux.intel.com>
Tue, 31 Jul 2018 03:02:13 +0000 (11:02 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Tue, 7 Aug 2018 02:40:11 +0000 (10:40 +0800)
To consolidate all gvt private MMIO definition in one place,
this moves some not yet used in i915 to reg.h.

Reviewed-by: Hang Yuan <hang.yuan@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/mmio_context.c
drivers/gpu/drm/i915/gvt/reg.h

index 20be9a92600f0f99cd5a688929251c071307afe1..d20f2c9bda82ead38bc66c51f22eb3f0d9ed0e2f 100644 (file)
 #include "gvt.h"
 #include "trace.h"
 
-/**
- * Defined in Intel Open Source PRM.
- * Ref: https://01.org/linuxgraphics/documentation/hardware-specification-prms
- */
-#define TRVATTL3PTRDW(i)       _MMIO(0x4de0 + (i)*4)
-#define TRNULLDETCT            _MMIO(0x4de8)
-#define TRINVTILEDETCT         _MMIO(0x4dec)
-#define TRVADR                 _MMIO(0x4df0)
-#define TRTTE                  _MMIO(0x4df4)
-#define RING_EXCC(base)                _MMIO((base) + 0x28)
-#define RING_GFX_MODE(base)    _MMIO((base) + 0x29c)
-#define VF_GUARDBAND           _MMIO(0x83a4)
-
 #define GEN9_MOCS_SIZE         64
 
 /* Raw offset is appened to each line for convenience. */
index d4f7ce6dc1d738f0e31bead53e6d6cf45beb7cf4..60dcc6bb8425415a0d81e06350800f2c6f46b04c 100644 (file)
 #define _RING_CTL_BUF_SIZE(ctl) (((ctl) & RB_TAIL_SIZE_MASK) + \
                I915_GTT_PAGE_SIZE)
 
+#define TRVATTL3PTRDW(i)       _MMIO(0x4de0 + (i) * 4)
+#define TRNULLDETCT            _MMIO(0x4de8)
+#define TRINVTILEDETCT         _MMIO(0x4dec)
+#define TRVADR                 _MMIO(0x4df0)
+#define TRTTE                  _MMIO(0x4df4)
+#define RING_EXCC(base)                _MMIO((base) + 0x28)
+#define RING_GFX_MODE(base)    _MMIO((base) + 0x29c)
+#define VF_GUARDBAND           _MMIO(0x83a4)
+
 #endif