drm/amdgpu: use VCN firmware offset for cache window

Since we are using the signed FW now, and also using PSP firmware loading,
but it's still potential to break driver when loading FW directly
instead of PSP, so we should add offset.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index ef8bb67844bedd0d103555e163f749b4e5e187ba..0c84dbc6a62d20e432e75d7ed4316e9ef805fb9e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
@@ -396,11 +396,8 @@ static void vcn_v2_5_mc_resume(struct amdgpu_device *adev)
                        WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,
                                upper_32_bits(adev->vcn.inst[i].gpu_addr));
                        offset = size;
-                       /* No signed header for now from firmware
                        WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0,
                                AMDGPU_UVD_FIRMWARE_OFFSET >> 3);
-                       */
-                       WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, 0);
                }
                WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE0, size);