Instead of using the shared area that we be killed.
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
static void iwl1000_nic_config(struct iwl_priv *priv)
{
/* set CSR_HW_CONFIG_REG for uCode use */
- iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,
+ iwl_set_bit(priv->trans, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
/* Setting digital SVR for 1000 card to 1.32V */
/* locking is acquired in iwl_set_bits_mask_prph() function */
- iwl_set_bits_mask_prph(trans(priv), APMG_DIGITAL_SVR_REG,
+ iwl_set_bits_mask_prph(priv->trans, APMG_DIGITAL_SVR_REG,
APMG_SVR_DIGITAL_VOLTAGE_1_32,
~APMG_SVR_VOLTAGE_CONFIG_BIT_MSK);
}
{
iwl_rf_config(priv);
- iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG,
+ iwl_set_bit(priv->trans, CSR_GP_DRIVER_REG,
CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER);
}
* (PCIe power is lost before PERST# is asserted),
* causing ME FW to lose ownership and not being able to obtain it back.
*/
- iwl_set_bits_mask_prph(trans(priv), APMG_PS_CTRL_REG,
+ iwl_set_bits_mask_prph(priv->trans, APMG_PS_CTRL_REG,
APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
}
break;
case IWL_DEVICE_FAMILY_6000i:
/* 2x2 IPA phy type */
- iwl_write32(trans(priv), CSR_GP_DRIVER_REG,
+ iwl_write32(priv->trans, CSR_GP_DRIVER_REG,
CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA);
break;
case IWL_DEVICE_FAMILY_6050:
/* Indicate calibration version to uCode. */
if (iwl_eeprom_calib_version(priv) >= 6)
- iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG,
+ iwl_set_bit(priv->trans, CSR_GP_DRIVER_REG,
CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);
break;
case IWL_DEVICE_FAMILY_6150:
/* Indicate calibration version to uCode. */
if (iwl_eeprom_calib_version(priv) >= 6)
- iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG,
+ iwl_set_bit(priv->trans, CSR_GP_DRIVER_REG,
CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);
- iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG,
+ iwl_set_bit(priv->trans, CSR_GP_DRIVER_REG,
CSR_GP_DRIVER_REG_BIT_6050_1x2);
break;
default:
goto done;
}
IWL_DEBUG_INFO(priv, "wait transmit/flush all frames\n");
- iwl_trans_wait_tx_queue_empty(trans(priv));
+ iwl_trans_wait_tx_queue_empty(priv->trans);
done:
ieee80211_wake_queues(priv->hw);
mutex_unlock(&priv->mutex);
memcpy(&rxon, &ctx->active, sizeof(rxon));
priv->ucode_loaded = false;
- iwl_trans_stop_device(trans(priv));
+ iwl_trans_stop_device(priv->trans);
priv->wowlan = true;
return -EIO;
}
- return iwl_trans_send_cmd(trans(priv), cmd);
+ return iwl_trans_send_cmd(priv->trans, cmd);
}
int iwl_dvm_send_cmd_pdu(struct iwl_priv *priv, u8 id,
if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
CT_CARD_DISABLED)) {
- iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_SET,
+ iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_SET,
CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
- iwl_write_direct32(trans(priv), HBUS_TARG_MBX_C,
+ iwl_write_direct32(priv->trans, HBUS_TARG_MBX_C,
HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
if (!(flags & RXON_CARD_DISABLED)) {
- iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_CLR,
+ iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR,
CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
- iwl_write_direct32(trans(priv), HBUS_TARG_MBX_C,
+ iwl_write_direct32(priv->trans, HBUS_TARG_MBX_C,
HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
}
if (flags & CT_CARD_DISABLED)
wiphy_rfkill_set_hw_state(priv->hw->wiphy,
test_bit(STATUS_RF_KILL_HW, &priv->status));
else
- wake_up(&trans(priv)->wait_command_queue);
+ wake_up(&priv->trans->wait_command_queue);
return 0;
}
if (tt->state == IWL_TI_CT_KILL) {
if (priv->thermal_throttle.ct_kill_toggle) {
- iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_CLR,
+ iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR,
CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
priv->thermal_throttle.ct_kill_toggle = false;
} else {
- iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_SET,
+ iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_SET,
CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
priv->thermal_throttle.ct_kill_toggle = true;
}
- iwl_read32(trans(priv), CSR_UCODE_DRV_GP1);
- spin_lock_irqsave(&trans(priv)->reg_lock, flags);
- if (likely(iwl_grab_nic_access(trans(priv))))
- iwl_release_nic_access(trans(priv));
- spin_unlock_irqrestore(&trans(priv)->reg_lock, flags);
+ iwl_read32(priv->trans, CSR_UCODE_DRV_GP1);
+ spin_lock_irqsave(&priv->trans->reg_lock, flags);
+ if (likely(iwl_grab_nic_access(priv->trans)))
+ iwl_release_nic_access(priv->trans);
+ spin_unlock_irqrestore(&priv->trans->reg_lock, flags);
/* Reschedule the ct_kill timer to occur in
* CT_KILL_EXIT_DURATION seconds to ensure we get a
else
txq_id = ctx->ac_to_queue[skb_get_queue_mapping(skb)];
- if (iwl_trans_tx(trans(priv), skb, dev_cmd, txq_id))
+ if (iwl_trans_tx(priv->trans, skb, dev_cmd, txq_id))
goto drop_unlock_sta;
if (ieee80211_is_data_qos(fc) && !ieee80211_is_qos_nullfunc(fc) &&
spin_unlock_bh(&priv->sta_lock);
if (test_bit(txq_id, priv->agg_q_alloc)) {
- iwl_trans_tx_agg_disable(trans(priv), txq_id);
+ iwl_trans_tx_agg_disable(priv->trans, txq_id);
iwlagn_dealloc_agg_txq(priv, txq_id);
}
fifo = ctx->ac_to_fifo[tid_to_ac[tid]];
- iwl_trans_tx_agg_setup(trans(priv), q, fifo,
+ iwl_trans_tx_agg_setup(priv->trans, q, fifo,
sta_priv->sta_id, tid,
buf_size, ssn);
IWL_DEBUG_TX_QUEUES(priv,
"Can continue DELBA flow ssn = next_recl ="
" %d", tid_data->next_reclaimed);
- iwl_trans_tx_agg_disable(trans(priv),
+ iwl_trans_tx_agg_disable(priv->trans,
tid_data->agg.txq_id);
iwlagn_dealloc_agg_txq(priv, tid_data->agg.txq_id);
tid_data->agg.state = IWL_AGG_OFF;
return 1;
}
- iwl_trans_reclaim(trans(priv), txq_id, ssn, skbs);
+ iwl_trans_reclaim(priv->trans, txq_id, ssn, skbs);
return 0;
}
ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
/* Make sure device is powered up for SRAM reads */
- spin_lock_irqsave(&trans(priv)->reg_lock, reg_flags);
- if (unlikely(!iwl_grab_nic_access(trans(priv)))) {
- spin_unlock_irqrestore(&trans(priv)->reg_lock, reg_flags);
+ spin_lock_irqsave(&priv->trans->reg_lock, reg_flags);
+ if (unlikely(!iwl_grab_nic_access(priv->trans))) {
+ spin_unlock_irqrestore(&priv->trans->reg_lock, reg_flags);
return;
}
/* Set starting address; reads will auto-increment */
- iwl_write32(trans(priv), HBUS_TARG_MEM_RADDR, ptr);
+ iwl_write32(priv->trans, HBUS_TARG_MEM_RADDR, ptr);
/*
* Refuse to read more than would have fit into the log from
* place event id # at far right for easier visual parsing.
*/
for (i = 0; i < num_events; i++) {
- ev = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
- time = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
+ ev = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT);
+ time = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT);
if (mode == 0) {
trace_iwlwifi_dev_ucode_cont_event(
- trans(priv)->dev, 0, time, ev);
+ priv->trans->dev, 0, time, ev);
} else {
- data = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
+ data = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT);
trace_iwlwifi_dev_ucode_cont_event(
- trans(priv)->dev, time, data, ev);
+ priv->trans->dev, time, data, ev);
}
}
/* Allow device to power down */
- iwl_release_nic_access(trans(priv));
- spin_unlock_irqrestore(&trans(priv)->reg_lock, reg_flags);
+ iwl_release_nic_access(priv->trans);
+ spin_unlock_irqrestore(&priv->trans->reg_lock, reg_flags);
}
static void iwl_continuous_event_trace(struct iwl_priv *priv)
base = priv->device_pointers.log_event_table;
if (iwlagn_hw_valid_rtc_data_addr(base)) {
- iwl_read_targ_mem_words(trans(priv), base, &read, sizeof(read));
-
+ iwl_read_targ_mem_words(priv->trans, base, &read, sizeof(read));
capacity = read.capacity;
mode = read.mode;
num_wraps = read.wrap_counter;
else
priv->event_log.wraps_once_count++;
- trace_iwlwifi_dev_ucode_wrap_event(trans(priv)->dev,
+ trace_iwlwifi_dev_ucode_wrap_event(priv->trans->dev,
num_wraps - priv->event_log.num_wraps,
next_entry, priv->event_log.next_entry);
struct iwl_ct_kill_throttling_config adv_cmd;
int ret = 0;
- iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_CLR,
+ iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR,
CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
priv->thermal_throttle.ct_kill_toggle = false;
ieee80211_stop_queues(priv->hw);
priv->ucode_loaded = false;
- iwl_trans_stop_device(trans(priv));
+ iwl_trans_stop_device(priv->trans);
/* Clear out all status bits but a few that are stable across reset */
priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
priv->hw_params.sku & EEPROM_SKU_CAP_BAND_52GHZ) {
IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
"Please send your %s to maintainer.\n",
- trans(priv)->hw_id_str);
+ priv->trans->hw_id_str);
priv->hw_params.sku &= ~EEPROM_SKU_CAP_BAND_52GHZ;
}
void iwl_debug_config(struct iwl_priv *priv)
{
- dev_printk(KERN_INFO, trans(priv)->dev, "CONFIG_IWLWIFI_DEBUG "
+ dev_printk(KERN_INFO, priv->trans->dev, "CONFIG_IWLWIFI_DEBUG "
#ifdef CONFIG_IWLWIFI_DEBUG
"enabled\n");
#else
"disabled\n");
#endif
- dev_printk(KERN_INFO, trans(priv)->dev, "CONFIG_IWLWIFI_DEBUGFS "
+ dev_printk(KERN_INFO, priv->trans->dev, "CONFIG_IWLWIFI_DEBUGFS "
#ifdef CONFIG_IWLWIFI_DEBUGFS
"enabled\n");
#else
"disabled\n");
#endif
- dev_printk(KERN_INFO, trans(priv)->dev, "CONFIG_IWLWIFI_DEVICE_TRACING "
+ dev_printk(KERN_INFO, priv->trans->dev, "CONFIG_IWLWIFI_DEVICE_TRACING "
#ifdef CONFIG_IWLWIFI_DEVICE_TRACING
"enabled\n");
#else
"disabled\n");
#endif
- dev_printk(KERN_INFO, trans(priv)->dev, "CONFIG_IWLWIFI_DEVICE_TESTMODE "
+ dev_printk(KERN_INFO, priv->trans->dev, "CONFIG_IWLWIFI_DEVICE_TESTMODE "
#ifdef CONFIG_IWLWIFI_DEVICE_TESTMODE
"enabled\n");
#else
"disabled\n");
#endif
- dev_printk(KERN_INFO, trans(priv)->dev, "CONFIG_IWLWIFI_P2P "
+ dev_printk(KERN_INFO, priv->trans->dev, "CONFIG_IWLWIFI_P2P "
#ifdef CONFIG_IWLWIFI_P2P
"enabled\n");
#else
op_mode->ops = &iwl_dvm_ops;
priv = IWL_OP_MODE_GET_DVM(op_mode);
priv->shrd = trans->shrd;
+ priv->trans = trans;
priv->fw = fw;
switch (cfg(priv)->device_family) {
}
/* Configure transport layer */
- iwl_trans_configure(trans(priv), &trans_cfg);
+ iwl_trans_configure(priv->trans, &trans_cfg);
/* At this point both hw and priv are allocated. */
- SET_IEEE80211_DEV(priv->hw, trans(priv)->dev);
+ SET_IEEE80211_DEV(priv->hw, priv->trans->dev);
/* show what debugging capabilities we have */
iwl_debug_config(priv);
/* these spin locks will be used in apm_ops.init and EEPROM access
* we should init now
*/
- spin_lock_init(&trans(priv)->reg_lock);
+ spin_lock_init(&priv->trans->reg_lock);
spin_lock_init(&priv->statistics.lock);
/***********************
* 2. Read REV register
***********************/
IWL_INFO(priv, "Detected %s, REV=0x%X\n",
- cfg(priv)->name, trans(priv)->hw_rev);
+ cfg(priv)->name, priv->trans->hw_rev);
- if (iwl_trans_start_hw(trans(priv)))
+ if (iwl_trans_start_hw(priv->trans))
goto out_free_traffic_mem;
/* Read the EEPROM */
- if (iwl_eeprom_init(priv, trans(priv)->hw_rev)) {
+ if (iwl_eeprom_init(priv, priv->trans->hw_rev)) {
IWL_ERR(priv, "Unable to init EEPROM\n");
goto out_free_traffic_mem;
}
/* Reset chip to save power until we load uCode during "up". */
- iwl_trans_stop_hw(trans(priv));
+ iwl_trans_stop_hw(priv->trans);
if (iwl_eeprom_check_version(priv))
goto out_free_eeprom;
n_q_to_ac = ARRAY_SIZE(iwlagn_bss_queue_to_ac);
/* Configure transport layer again*/
- iwl_trans_configure(trans(priv), &trans_cfg);
+ iwl_trans_configure(priv->trans, &trans_cfg);
}
/*******************
/*This will stop the queues, move the device to low power state */
priv->ucode_loaded = false;
- iwl_trans_stop_device(trans(priv));
+ iwl_trans_stop_device(priv->trans);
iwl_eeprom_free(priv);
static void iwl_dump_nic_error_log(struct iwl_priv *priv)
{
- struct iwl_trans *trans = trans(priv);
+ struct iwl_trans *trans = priv->trans;
u32 base;
struct iwl_error_event_table table;
u32 ev, time, data; /* event log data */
unsigned long reg_flags;
- struct iwl_trans *trans = trans(priv);
+ struct iwl_trans *trans = priv->trans;
if (num_events == 0)
return pos;
u32 logsize;
int pos = 0;
size_t bufsz = 0;
- struct iwl_trans *trans = trans(priv);
+ struct iwl_trans *trans = priv->trans;
base = priv->device_pointers.log_event_table;
if (priv->cur_ucode == IWL_UCODE_INIT) {
* commands by clearing the ready bit */
clear_bit(STATUS_READY, &priv->status);
- wake_up(&trans(priv)->wait_command_queue);
+ wake_up(&priv->trans->wait_command_queue);
if (!ondemand) {
/*
set_bit(STATUS_POWER_PMI, &priv->status);
else
clear_bit(STATUS_POWER_PMI, &priv->status);
- iwl_trans_set_pmi(trans(priv), state);
+ iwl_trans_set_pmi(priv->trans, state);
}
#ifdef CONFIG_IWLWIFI_DEBUG
sram = priv->dbgfs_sram_offset & ~0x3;
/* read the first u32 from sram */
- val = iwl_read_targ_mem(trans(priv), sram);
+ val = iwl_read_targ_mem(priv->trans, sram);
for (; len; len--) {
/* put the address at the start of every line */
if (++offset == 4) {
sram += 4;
offset = 0;
- val = iwl_read_targ_mem(trans(priv), sram);
+ val = iwl_read_targ_mem(priv->trans, sram);
}
/* put in extra spaces and split lines for human readability */
const size_t bufsz = sizeof(buf);
u32 pwrsave_status;
- pwrsave_status = iwl_read32(trans(priv), CSR_GP_CNTRL) &
+ pwrsave_status = iwl_read32(priv->trans, CSR_GP_CNTRL) &
CSR_GP_REG_POWER_SAVE_STATUS_MSK;
pos += scnprintf(buf + pos, bufsz - pos, "Power Save Status: ");
/* Calibrations disabled/enabled status*/
DEBUGFS_ADD_FILE(calib_disabled, dir_rf, S_IRUSR);
- if (iwl_trans_dbgfs_register(trans(priv), dir_debug))
+ if (iwl_trans_dbgfs_register(priv->trans, dir_debug))
goto err;
return 0;
/*data shared among all the driver's layers */
struct iwl_shared *shrd;
+ struct iwl_trans *trans;
const struct iwl_fw *fw;
const struct iwl_lib_ops *lib;
unsigned long status;
static int iwl_eeprom_verify_signature(struct iwl_priv *priv)
{
- u32 gp = iwl_read32(trans(priv), CSR_EEPROM_GP) &
+ u32 gp = iwl_read32(priv->trans, CSR_EEPROM_GP) &
CSR_EEPROM_GP_VALID_MSK;
int ret = 0;
int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
{
__le16 *e;
- u32 gp = iwl_read32(trans(priv), CSR_EEPROM_GP);
+ u32 gp = iwl_read32(priv->trans, CSR_EEPROM_GP);
int sz;
int ret;
u16 addr;
u16 validblockaddr = 0;
u16 cache_addr = 0;
- priv->nvm_device_type = iwl_get_nvm_type(trans(priv), hw_rev);
+ priv->nvm_device_type = iwl_get_nvm_type(priv->trans, hw_rev);
if (priv->nvm_device_type == -ENOENT)
return -ENOENT;
/* allocate eeprom */
}
/* Make sure driver (instead of uCode) is allowed to read EEPROM */
- ret = iwl_eeprom_acquire_semaphore(trans(priv));
+ ret = iwl_eeprom_acquire_semaphore(priv->trans);
if (ret < 0) {
IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
ret = -ENOENT;
if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
- ret = iwl_init_otp_access(trans(priv));
+ ret = iwl_init_otp_access(priv->trans);
if (ret) {
IWL_ERR(priv, "Failed to initialize OTP access.\n");
ret = -ENOENT;
goto done;
}
- iwl_write32(trans(priv), CSR_EEPROM_GP,
- iwl_read32(trans(priv), CSR_EEPROM_GP) &
+ iwl_write32(priv->trans, CSR_EEPROM_GP,
+ iwl_read32(priv->trans, CSR_EEPROM_GP) &
~CSR_EEPROM_GP_IF_OWNER_MSK);
- iwl_set_bit(trans(priv), CSR_OTP_GP_REG,
+ iwl_set_bit(priv->trans, CSR_OTP_GP_REG,
CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
/* traversing the linked list if no shadow ram supported */
if (!cfg(priv)->base_params->shadow_ram_support) {
- if (iwl_find_otp_image(trans(priv), &validblockaddr)) {
+ if (iwl_find_otp_image(priv->trans, &validblockaddr)) {
ret = -ENOENT;
goto done;
}
addr += sizeof(u16)) {
__le16 eeprom_data;
- ret = iwl_read_otp_word(trans(priv), addr,
+ ret = iwl_read_otp_word(priv->trans, addr,
&eeprom_data);
if (ret)
goto done;
for (addr = 0; addr < sz; addr += sizeof(u16)) {
u32 r;
- iwl_write32(trans(priv), CSR_EEPROM_REG,
+ iwl_write32(priv->trans, CSR_EEPROM_REG,
CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
- ret = iwl_poll_bit(trans(priv), CSR_EEPROM_REG,
+ ret = iwl_poll_bit(priv->trans, CSR_EEPROM_REG,
CSR_EEPROM_REG_READ_VALID_MSK,
CSR_EEPROM_REG_READ_VALID_MSK,
IWL_EEPROM_ACCESS_TIMEOUT);
"Time out reading EEPROM[%d]\n", addr);
goto done;
}
- r = iwl_read32(trans(priv), CSR_EEPROM_REG);
+ r = iwl_read32(priv->trans, CSR_EEPROM_REG);
e[addr / 2] = cpu_to_le16(r >> 16);
}
}
ret = 0;
done:
- iwl_eeprom_release_semaphore(trans(priv));
+ iwl_eeprom_release_semaphore(priv->trans);
err:
if (ret)
/* write radio config values to register */
if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) <= EEPROM_RF_CONFIG_TYPE_MAX) {
- iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,
+ iwl_set_bit(priv->trans, CSR_HW_IF_CONFIG_REG,
EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
EEPROM_RF_CFG_DASH_MSK(radio_cfg));
WARN_ON(1);
/* set CSR_HW_CONFIG_REG for uCode use */
- iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,
+ iwl_set_bit(priv->trans, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
}
/* Set led register off */
void iwlagn_led_enable(struct iwl_priv *priv)
{
- iwl_write32(trans(priv), CSR_LED_REG, CSR_LED_REG_TRUN_ON);
+ iwl_write32(priv->trans, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
}
/*
};
u32 reg;
- reg = iwl_read32(trans(priv), CSR_LED_REG);
+ reg = iwl_read32(priv->trans, CSR_LED_REG);
if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
- iwl_write32(trans(priv), CSR_LED_REG,
+ iwl_write32(priv->trans, CSR_LED_REG,
reg & CSR_LED_BSM_CTRL_MSK);
return iwl_dvm_send_cmd(priv, &cmd);
break;
}
- ret = led_classdev_register(trans(priv)->dev, &priv->led);
+ ret = led_classdev_register(priv->trans->dev, &priv->led);
if (ret) {
kfree(priv->led.name);
return;
WIPHY_FLAG_IBSS_RSN;
if (priv->fw->img[IWL_UCODE_WOWLAN].sec[0].len &&
- trans(priv)->ops->wowlan_suspend &&
- device_can_wakeup(trans(priv)->dev)) {
+ priv->trans->ops->wowlan_suspend &&
+ device_can_wakeup(priv->trans->dev)) {
hw->wiphy->wowlan.flags = WIPHY_WOWLAN_MAGIC_PKT |
WIPHY_WOWLAN_DISCONNECT |
WIPHY_WOWLAN_EAP_IDENTITY_REQ |
priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
&priv->bands[IEEE80211_BAND_5GHZ];
- hw->wiphy->hw_version = trans(priv)->hw_id;
+ hw->wiphy->hw_version = priv->trans->hw_id;
iwl_leds_init(priv);
* even if interface is down, trans->down will leave the RF
* kill interrupt enabled
*/
- iwl_trans_stop_hw(trans(priv));
+ iwl_trans_stop_hw(priv->trans);
IWL_DEBUG_MAC80211(priv, "leave\n");
}
if (ret)
goto error;
- device_set_wakeup_enable(trans(priv)->dev, true);
+ device_set_wakeup_enable(priv->trans->dev, true);
- iwl_trans_wowlan_suspend(trans(priv));
+ iwl_trans_wowlan_suspend(priv->trans);
goto out;
IWL_DEBUG_MAC80211(priv, "enter\n");
mutex_lock(&priv->mutex);
- iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_CLR,
+ iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR,
CSR_UCODE_DRV_GP1_BIT_D3_CFG_COMPLETE);
base = priv->device_pointers.error_event_table;
if (iwlagn_hw_valid_rtc_data_addr(base)) {
- spin_lock_irqsave(&trans(priv)->reg_lock, flags);
- ret = iwl_grab_nic_access_silent(trans(priv));
+ spin_lock_irqsave(&priv->trans->reg_lock, flags);
+ ret = iwl_grab_nic_access_silent(priv->trans);
if (likely(ret == 0)) {
- iwl_write32(trans(priv), HBUS_TARG_MEM_RADDR, base);
- status = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
- iwl_release_nic_access(trans(priv));
+ iwl_write32(priv->trans, HBUS_TARG_MEM_RADDR, base);
+ status = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT);
+ iwl_release_nic_access(priv->trans);
}
- spin_unlock_irqrestore(&trans(priv)->reg_lock, flags);
+ spin_unlock_irqrestore(&priv->trans->reg_lock, flags);
#ifdef CONFIG_IWLWIFI_DEBUGFS
if (ret == 0) {
if (priv->wowlan_sram)
_iwl_read_targ_mem_words(
- trans(priv), 0x800000,
+ priv->trans, 0x800000,
priv->wowlan_sram,
img->sec[IWL_UCODE_SECTION_DATA].len / 4);
}
priv->wowlan = false;
- device_set_wakeup_enable(trans(priv)->dev, false);
+ device_set_wakeup_enable(priv->trans->dev, false);
iwlagn_prepare_restart(priv);
ret = iwl_sta_rx_agg_stop(priv, sta, tid);
break;
case IEEE80211_AMPDU_TX_START:
- if (!trans(priv)->ops->tx_agg_setup)
+ if (!priv->trans->ops->tx_agg_setup)
break;
if (iwlagn_mod_params.disable_11n & IWL_DISABLE_HT_TXAGG)
break;
}
}
IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
- iwl_trans_wait_tx_queue_empty(trans(priv));
+ iwl_trans_wait_tx_queue_empty(priv->trans);
done:
mutex_unlock(&priv->mutex);
IWL_DEBUG_MAC80211(priv, "leave\n");
/* initialize to default */
void iwl_power_initialize(struct iwl_priv *priv)
{
- priv->power_data.bus_pm = trans(priv)->pm_support;
+ priv->power_data.bus_pm = priv->trans->pm_support;
priv->power_data.debug_sleep_level_override = -1;
if (priv->testmode_trace.trace_enabled) {
if (priv->testmode_trace.cpu_addr &&
priv->testmode_trace.dma_addr)
- dma_free_coherent(trans(priv)->dev,
+ dma_free_coherent(priv->trans->dev,
priv->testmode_trace.total_size,
priv->testmode_trace.cpu_addr,
priv->testmode_trace.dma_addr);
switch (cmd) {
case IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32:
- val32 = iwl_read_direct32(trans(priv), ofs);
+ val32 = iwl_read_direct32(priv->trans, ofs);
IWL_INFO(priv, "32bit value to read 0x%x\n", val32);
skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, 20);
} else {
val32 = nla_get_u32(tb[IWL_TM_ATTR_REG_VALUE32]);
IWL_INFO(priv, "32bit value to write 0x%x\n", val32);
- iwl_write_direct32(trans(priv), ofs, val32);
+ iwl_write_direct32(priv->trans, ofs, val32);
}
break;
case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8:
} else {
val8 = nla_get_u8(tb[IWL_TM_ATTR_REG_VALUE8]);
IWL_INFO(priv, "8bit value to write 0x%x\n", val8);
- iwl_write8(trans(priv), ofs, val8);
+ iwl_write8(priv->trans, ofs, val8);
}
break;
default:
static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)
{
struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);
- struct iwl_trans *trans = trans(priv);
+ struct iwl_trans *trans = priv->trans;
struct sk_buff *skb;
unsigned char *rsp_data_ptr = NULL;
int status = 0, rsp_data_len = 0;
break;
case IWL_TM_CMD_APP2DEV_GET_DEVICE_ID:
- devid = trans(priv)->hw_id;
+ devid = priv->trans->hw_id;
IWL_INFO(priv, "hw version: 0x%x\n", devid);
skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, 20);
struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);
struct sk_buff *skb;
int status = 0;
- struct device *dev = trans(priv)->dev;
+ struct device *dev = priv->trans->dev;
switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) {
case IWL_TM_CMD_APP2DEV_BEGIN_TRACE:
static int iwl_testmode_indirect_read(struct iwl_priv *priv, u32 addr, u32 size)
{
- struct iwl_trans *trans = trans(priv);
+ struct iwl_trans *trans = priv->trans;
unsigned long flags;
int i;
static int iwl_testmode_indirect_write(struct iwl_priv *priv, u32 addr,
u32 size, unsigned char *buf)
{
- struct iwl_trans *trans = trans(priv);
+ struct iwl_trans *trans = priv->trans;
u32 val, i;
unsigned long flags;
{
int ret;
- iwl_trans_fw_alive(trans(priv));
+ iwl_trans_fw_alive(priv->trans);
priv->passive_no_rx = false;
priv->transport_queue_stop = 0;
/* read data comes through single port, auto-incr addr */
/* NOTE: Use the debugless read so we don't flood kernel log
* if IWL_DL_IO is set */
- iwl_write_direct32(trans(priv), HBUS_TARG_MEM_RADDR,
+ iwl_write_direct32(priv->trans, HBUS_TARG_MEM_RADDR,
i + fw_desc->offset);
- val = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
+ val = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT);
if (val != le32_to_cpu(*image))
return -EIO;
}
IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
- iwl_write_direct32(trans(priv), HBUS_TARG_MEM_RADDR,
+ iwl_write_direct32(priv->trans, HBUS_TARG_MEM_RADDR,
fw_desc->offset);
for (offs = 0;
offs < len && errors < 20;
offs += sizeof(u32), image++) {
/* read data comes through single port, auto-incr addr */
- val = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
+ val = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT);
if (val != le32_to_cpu(*image)) {
IWL_ERR(priv, "uCode INST section at "
"offset 0x%x, is 0x%x, s/b 0x%x\n",
alive_cmd, ARRAY_SIZE(alive_cmd),
iwl_alive_fn, &alive_data);
- ret = iwl_trans_start_fw(trans(priv), fw);
+ ret = iwl_trans_start_fw(priv->trans, fw);
if (ret) {
priv->cur_ucode = old_type;
iwl_remove_notification(&priv->notif_wait, &alive_wait);
iwl_remove_notification(&priv->notif_wait, &calib_wait);
out:
/* Whatever happened, stop the device */
- iwl_trans_stop_device(trans(priv));
+ iwl_trans_stop_device(priv->trans);
priv->ucode_loaded = false;
return ret;