#include <common.h>
#include <asm/sizes.h>
-#include <asm/arch/at91sam9263.h>
+#include <asm/io.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_rstc.h>
#include <asm/arch/at91_matrix.h>
-#include <asm/arch/at91_pio.h>
#include <asm/arch/clk.h>
-#include <asm/arch/io.h>
-#include <asm/arch/hardware.h>
+#include <asm/arch/gpio.h>
#include <lcd.h>
#include <atmel_lcdc.h>
#include <dataflash.h>
static void pm9263_nand_hw_init(void)
{
unsigned long csa;
- at91_smc_t *smc = (at91_smc_t *) AT91_SMC0_BASE;
- at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
+ struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC0;
+ struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
/* Enable CS3 */
csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
#ifdef CONFIG_MACB
static void pm9263_macb_hw_init(void)
{
- at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
/*
* PB27 enables the 50MHz oscillator for Ethernet PHY
at91_set_pio_value(AT91_PIO_PORTB, 27, 1); /* 1- enable, 0 - disable */
/* Enable clock */
- writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer);
+ writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
/*
* Disable pull-up on:
vl_vsync_len: 1,
vl_upper_margin:1,
vl_lower_margin:0,
- mmio: AT91SAM9263_LCDC_BASE,
+ mmio: ATMEL_BASE_LCDC,
};
void lcd_enable(void)
{
volatile uint16_t x;
unsigned long csa;
- at91_smc_t *smc = (at91_smc_t *) AT91_SMC1_BASE;
- at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
+ struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC1;
+ struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
/* Enable CS3 3.3v, no pull-ups */
csa = readl(&matrix->csa[1]) | AT91_MATRIX_CSA_DBPUC |
static void pm9263_lcd_hw_init(void)
{
- at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDVSYNC */
at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */
at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */
at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */
- writel(1 << AT91SAM9263_ID_LCDC, &pmc->pcer);
+ writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
/* Power Control */
at91_set_pio_output(AT91_PIO_PORTA, 22, 1);
/* initialize te PSRAM */
int stat = pm9263_lcd_hw_psram_init();
- gd->fb_base = (stat == 0) ? PHYS_PSRAM : AT91SAM9263_SRAM0_BASE;
+ gd->fb_base = (stat == 0) ? PHYS_PSRAM : ATMEL_BASE_SRAM0;
#else
- gd->fb_base = AT91SAM9263_SRAM0_BASE;
+ gd->fb_base = ATMEL_BASE_SRAM0;
#endif
}
int board_init(void)
{
- at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
/* Enable Ctrlc */
console_init_f();
- writel((1 << AT91SAM9263_ID_PIOA) |
- (1 << AT91SAM9263_ID_PIOCDE) |
- (1 << AT91SAM9263_ID_PIOB),
+ writel((1 << ATMEL_ID_PIOA) |
+ (1 << ATMEL_ID_PIOCDE) |
+ (1 << ATMEL_ID_PIOB),
&pmc->pcer);
/* arch number of AT91SAM9263EK-Board */
/* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- at91_serial_hw_init();
+ at91_seriald_hw_init();
#ifdef CONFIG_CMD_NAND
pm9263_nand_hw_init();
#endif
{
int rc = 0;
#ifdef CONFIG_MACB
- rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0x01);
+ rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x01);
#endif
return rc;
}
ss = "(PSRAM)";
break;
- case AT91SAM9263_SRAM0_BASE:
+ case ATMEL_BASE_SRAM0:
ss = "(Internal SRAM)";
break;
#ifndef __CONFIG_H
#define __CONFIG_H
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
+
/* ARM asynchronous clock */
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define MASTER_PLL_MUL 65
#define MAIN_PLL_DIV 2 /* 2 or 4 */
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
+#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_HZ 1000
-#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
-#define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/
+#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9263"
#define CONFIG_PM9263 1 /* on a Ronetix PM9263 Board */
#define CONFIG_ARCH_CPU_INIT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define CONFIG_SYS_TEXT_BASE 0
-#define CONFIG_AT91FAMILY
/* clocks */
#define CONFIG_SYS_MOR_VAL \
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3 1 /* USART 3 is DBGU */
+#define CONFIG_USART_BASE ATMEL_BASE_DBGU
+#define CONFIG_USART_ID ATMEL_ID_SYS
/* LCD */
#define CONFIG_LCD 1