drm/i915: Broadwell DDI Buffer translation - more tuning

BDW display - DP buffer translation values changed to give better margin.

Further change to entry 6; set dword 0 bit 31=1.

Both changes were approved already but this one didn't landed BSpec yet
this is why it is in a separated patch. Making reviewer's life easier.
Also alowing separated tests and any future bisect that might be needed.

Reference: Predator r74080 / HSD 4394389

v2: Arthur noticed I was changing the wrong bit.

Cc: Arthur Runyan <arthur.j.runyan@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Arthur Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index e3cd159536ec8e0afc4fb370315b824cd389d6c6..29582781143311b92d47dd4147b2805b54917f75 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -96,7 +96,7 @@ static const struct ddi_buf_trans bdw_ddi_translations_dp[] = {
        { 0x80B2CFFF, 0x001B0002 },
        { 0x00FFFFFF, 0x000E000A },
        { 0x00DB6FFF, 0x00160005 },
-       { 0x00C71FFF, 0x001A0002 },
+       { 0x80C71FFF, 0x001A0002 },
        { 0x00F7DFFF, 0x00180004 },
        { 0x80D75FFF, 0x001B0002 },
 };