clk: si5351: Fix clkout rate computation.
authorMarek Belisko <marek.belisko@gmail.com>
Fri, 3 May 2013 05:53:22 +0000 (07:53 +0200)
committerMike Turquette <mturquette@linaro.org>
Wed, 29 May 2013 22:09:15 +0000 (15:09 -0700)
Rate was incorrectly computed because we read from wrong divider register.

Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: stable@kernel.org
drivers/clk/clk-si5351.c

index 892728412e9ddb0af46ec0a7f93cdeceadc4ed40..cf39e530e6e2a26687ee61fcfca261db1ff83cd9 100644 (file)
@@ -932,7 +932,7 @@ static unsigned long si5351_clkout_recalc_rate(struct clk_hw *hw,
        unsigned char reg;
        unsigned char rdiv;
 
-       if (hwdata->num > 5)
+       if (hwdata->num <= 5)
                reg = si5351_msynth_params_address(hwdata->num) + 2;
        else
                reg = SI5351_CLK6_7_OUTPUT_DIVIDER;