drm/amdgpu: Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES
authorAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Thu, 31 Jan 2019 20:44:22 +0000 (15:44 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 6 Feb 2019 02:15:46 +0000 (21:15 -0500)
New chunk for dependency on start of job's execution instead on
the end. This is used for GPU deadlock prevention when
userspace uses mid-IB fences to wait for mid-IB work on other rings.

v2: Fix typo in AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES
v3: Bump KMS version
v4: put old fence AFTER acquiring the scheduled fence.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Suggested-by: Christian Koenig <Christian.Koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
include/uapi/drm/amdgpu_drm.h

index 1c49b8266d69255bc45c546606a7b40af8ee82f0..52a5e4fdc95b4604a36dc39921137030edf26d56 100644 (file)
@@ -214,6 +214,7 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, union drm_amdgpu_cs
                case AMDGPU_CHUNK_ID_DEPENDENCIES:
                case AMDGPU_CHUNK_ID_SYNCOBJ_IN:
                case AMDGPU_CHUNK_ID_SYNCOBJ_OUT:
+               case AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES:
                        break;
 
                default:
@@ -1090,6 +1091,15 @@ static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p,
 
                fence = amdgpu_ctx_get_fence(ctx, entity,
                                             deps[i].handle);
+
+               if (chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) {
+                       struct drm_sched_fence *s_fence = to_drm_sched_fence(fence);
+                       struct dma_fence *old = fence;
+
+                       fence = dma_fence_get(&s_fence->scheduled);
+                       dma_fence_put(old);
+               }
+
                if (IS_ERR(fence)) {
                        r = PTR_ERR(fence);
                        amdgpu_ctx_put(ctx);
@@ -1177,7 +1187,8 @@ static int amdgpu_cs_dependencies(struct amdgpu_device *adev,
 
                chunk = &p->chunks[i];
 
-               if (chunk->chunk_id == AMDGPU_CHUNK_ID_DEPENDENCIES) {
+               if (chunk->chunk_id == AMDGPU_CHUNK_ID_DEPENDENCIES ||
+                   chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) {
                        r = amdgpu_cs_process_fence_dep(p, chunk);
                        if (r)
                                return r;
index c806f984bcc504320a39b6fe2d73fbdfee191a4f..1158a6f4eec6f435be70950bd51a06cbe41fe4ff 100644 (file)
  * - 3.25.0 - Add support for sensor query info (stable pstate sclk/mclk).
  * - 3.26.0 - GFX9: Process AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE.
  * - 3.27.0 - Add new chunk to to AMDGPU_CS to enable BO_LIST creation.
+ * - 3.28.0 - Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES
  */
 #define KMS_DRIVER_MAJOR       3
-#define KMS_DRIVER_MINOR       27
+#define KMS_DRIVER_MINOR       28
 #define KMS_DRIVER_PATCHLEVEL  0
 
 int amdgpu_vram_limit = 0;
index be84e43c1e19e916e8d7de8dc14b498a4dbc6a28..47296f2ec3fad7541eb0a931358e69db2345b7da 100644 (file)
@@ -523,6 +523,7 @@ struct drm_amdgpu_gem_va {
 #define AMDGPU_CHUNK_ID_SYNCOBJ_IN      0x04
 #define AMDGPU_CHUNK_ID_SYNCOBJ_OUT     0x05
 #define AMDGPU_CHUNK_ID_BO_HANDLES      0x06
+#define AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES 0x07
 
 struct drm_amdgpu_cs_chunk {
        __u32           chunk_id;