use the recommended ARM I/O accessors

use {read,write}l_relaxed instead of the plain __raw_{read,write}l variants.

SVN-Revision: 33330

diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/clock.c b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/clock.c
index 88ecdffbb2e0f7cf74c56b6f72f50f2550b1ba1a..413bfecaa131dffe3b9a47626f1751e28093e149 100644 (file)
--- a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/clock.c
+++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/clock.c
@@ -54,13 +54,13 @@ static int clk_local_onoff_enable(struct clk *clk, int enable)
        if (!clk->enable_reg)
                return 0;
 
-       tmp = __raw_readl(mcs814x_sysdbg_base + clk->enable_reg);
+       tmp = readl_relaxed(mcs814x_sysdbg_base + clk->enable_reg);
        if (!enable)
                tmp &= ~clk->enable_mask;
        else
                tmp |= clk->enable_mask;
 
-       __raw_writel(tmp, mcs814x_sysdbg_base + clk->enable_reg);
+       writel_relaxed(tmp, mcs814x_sysdbg_base + clk->enable_reg);
 
        return 0;
 }
@@ -254,7 +254,7 @@ void __init mcs814x_clk_init(void)
        clkdev_add_table(mcs814x_chip_clks, ARRAY_SIZE(mcs814x_chip_clks));
 
        /* read the bootstrap registers to know the exact clocking scheme */
-       bs1 = __raw_readl(mcs814x_sysdbg_base + SYSDBG_BS1);
+       bs1 = readl_relaxed(mcs814x_sysdbg_base + SYSDBG_BS1);
        cpu_freq = (bs1 >> CPU_FREQ_SHIFT) & CPU_FREQ_MASK;
 
        pr_info("CPU frequency: %lu (kHz)\n", cpu_freq_table[cpu_freq]);

diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/common.c b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/common.c
index 53d3521dc6dc03fc8bc179f50b786ccb4c5bfff9..b679c044298f9def118644ec6b2be587b7f81f11 100644 (file)
--- a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/common.c
+++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/common.c
@@ -67,22 +67,22 @@ static void mcs814x_eth_hardware_filter_set(u8 value)
 {
        u32 reg;
 
-       reg = __raw_readl(MCS814X_VIRT_BASE + MCS814X_DBGLED);
+       reg = readl_relaxed(MCS814X_VIRT_BASE + MCS814X_DBGLED);
        if (value)
                reg |= 0x80;
        else
                reg &= ~0x80;
-       __raw_writel(reg, MCS814X_VIRT_BASE + MCS814X_DBGLED);
+       writel_relaxed(reg, MCS814X_VIRT_BASE + MCS814X_DBGLED);
 }
 
 static void mcs814x_eth_led_cfg_set(u8 cfg)
 {
        u32 reg;
 
-       reg = __raw_readl(mcs814x_sysdbg_base + SYSDBG_BS2);
+       reg = readl_relaxed(mcs814x_sysdbg_base + SYSDBG_BS2);
        reg &= ~LED_CFG_MASK;
        reg |= cfg;
-       __raw_writel(reg, mcs814x_sysdbg_base + SYSDBG_BS2);
+       writel_relaxed(reg, mcs814x_sysdbg_base + SYSDBG_BS2);
 }
 
 static void mcs814x_eth_buffer_shifting_set(u8 value)
@@ -134,7 +134,7 @@ void __init mcs814x_init_machine(void)
        u32 bs2, cpu_mode;
        int gpio;
 
-       bs2 = __raw_readl(mcs814x_sysdbg_base + SYSDBG_BS2);
+       bs2 = readl_relaxed(mcs814x_sysdbg_base + SYSDBG_BS2);
        cpu_mode = (bs2 >> CPU_MODE_SHIFT) & CPU_MODE_MASK;
 
        pr_info("CPU mode: %s\n", cpu_modes[cpu_mode].name);
@@ -161,5 +161,5 @@ void __init mcs814x_map_io(void)
 
 void mcs814x_restart(char mode, const char *cmd)
 {
-       __raw_writel(~(1 << 31), mcs814x_sysdbg_base);
+       writel_relaxed(~(1 << 31), mcs814x_sysdbg_base);
 }

diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c
index e2ce52a69af885b7d16285ba50682528f3e43ac9..c1e48927dedc6f53a11fd5310cb445045cb0c925 100644 (file)
--- a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c
+++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c
@@ -40,7 +40,7 @@ static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
                IRQ_NOREQUEST, 0);
 
        /* Clear all interrupts */
-       __raw_writel(0xffffffff, base + MCS814X_IRQ_ICR);
+       writel_relaxed(0xffffffff, base + MCS814X_IRQ_ICR);
 }
 
 static const struct of_device_id mcs814x_intc_ids[] = {

diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/pci.c b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/pci.c
index a871aa86c3746ab3f18d424c726c7fbb389fa35f..3606fe84e41c42b534ecd845656fd18ddee7b12f 100644 (file)
--- a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/pci.c
+++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/pci.c
@@ -93,13 +93,13 @@ static int mcs8140_pci_host_status(void)
 {
        u32 host_status;
 
-       host_status = __raw_readl(mcs8140_pci_master_base + PCI_IF_CONFIG);
+       host_status = readl_relaxed(mcs8140_pci_master_base + PCI_IF_CONFIG);
        if (host_status & PCI_FATAL_ERROR) {
-               __raw_writel(host_status & 0xfffffff0,
+               writel_relaxed(host_status & 0xfffffff0,
                        mcs8140_pci_master_base + PCI_IF_CONFIG);
                /* flush write */
                host_status =
-                       __raw_readl(mcs8140_pci_master_base + PCI_IF_CONFIG);
+                       readl_relaxed(mcs8140_pci_master_base + PCI_IF_CONFIG);
                return 1;
        }
 
@@ -124,7 +124,7 @@ static int mcs8140_pci_read_config(struct pci_bus *bus,
                        break;
                default:
                        addr &= ~3;
-                       v = __raw_readl(addr);
+                       v = readl_relaxed(addr);
                        break;
                }
        } else
@@ -140,10 +140,10 @@ static int mcs8140_pci_read_config(struct pci_bus *bus,
 
 static void mcs8140_eeprom_emu_init(void)
 {
-       __raw_writel(0x0000000F, mcs8140_eeprom_emu_base + EPRM_SDRAM_FUNC0);
-       __raw_writel(0x08000000, MCS8140_PCI_CFG_VIRT_BASE + 0x10);
+       writel_relaxed(0x0000000F, mcs8140_eeprom_emu_base + EPRM_SDRAM_FUNC0);
+       writel_relaxed(0x08000000, MCS8140_PCI_CFG_VIRT_BASE + 0x10);
        /* Set the DONE bit of the EEPROM emulator */
-       __raw_writel(0x01, mcs8140_eeprom_emu_base + EPRM_DONE);
+       writel_relaxed(0x01, mcs8140_eeprom_emu_base + EPRM_DONE);
 }
 
 static int mcs8140_pci_write_config(struct pci_bus *bus,
@@ -161,7 +161,7 @@ static int mcs8140_pci_write_config(struct pci_bus *bus,
                        __raw_writew((u16)val, addr);
                        break;
                case 4:
-                       __raw_writel(val, addr);
+                       writel_relaxed(val, addr);
                        break;
                }
        }
@@ -260,7 +260,7 @@ int __init pci_mcs8140_setup(int nr, struct pci_sys_data *sys)
                goto out;
        }
 
-       val = __raw_readl(MCS8140_PCI_CFG_VIRT_BASE);
+       val = readl_relaxed(MCS8140_PCI_CFG_VIRT_BASE);
        if (val != MCS8140_PCI_DEVICE_ID) {
                pr_err("cannot find MCS8140 PCI Core: %08x\n", val);
                ret = -EIO;
@@ -269,11 +269,11 @@ int __init pci_mcs8140_setup(int nr, struct pci_sys_data *sys)
 
        pr_info("MCS8140 PCI core found\n");
 
-       val = __raw_readl(MCS8140_PCI_CFG_VIRT_BASE + PCI_COMMAND);
+       val = readl_relaxed(MCS8140_PCI_CFG_VIRT_BASE + PCI_COMMAND);
        /* Added to support wireless cards */
-       __raw_writel(0, MCS8140_PCI_CFG_VIRT_BASE + 0x40);
-       __raw_writel(val | 0x147, MCS8140_PCI_CFG_VIRT_BASE + PCI_COMMAND);
-       val = __raw_readl(MCS8140_PCI_CFG_VIRT_BASE + PCI_COMMAND);
+       writel_relaxed(0, MCS8140_PCI_CFG_VIRT_BASE + 0x40);
+       writel_relaxed(val | 0x147, MCS8140_PCI_CFG_VIRT_BASE + PCI_COMMAND);
+       val = readl_relaxed(MCS8140_PCI_CFG_VIRT_BASE + PCI_COMMAND);
        ret = 1;
 out:
        return ret;
@@ -302,14 +302,14 @@ static irqreturn_t mcs8140_pci_abort_interrupt(int irq, void *dummy)
 {
        u32 word;
 
-       word = __raw_readl(mcs8140_pci_master_base + PCI_IF_CONFIG);
+       word = readl_relaxed(mcs8140_pci_master_base + PCI_IF_CONFIG);
        if (!(word & (1 << 24)))
                return IRQ_NONE;
 
-       __raw_writel(word & 0xfffffff0,
+       writel_relaxed(word & 0xfffffff0,
                mcs8140_pci_master_base + PCI_IF_CONFIG);
        /* flush write */
-       word = __raw_readl(mcs8140_pci_master_base + PCI_IF_CONFIG);
+       word = readl_relaxed(mcs8140_pci_master_base + PCI_IF_CONFIG);
 
        return IRQ_HANDLED;
 }
@@ -319,12 +319,12 @@ static int mcs8140_pci_abort_irq_init(int irq)
        u32 word;
 
        /* Enable Interrupt in PCI Master Core */
-       word = __raw_readl(mcs8140_pci_master_base + PCI_IF_CONFIG);
+       word = readl_relaxed(mcs8140_pci_master_base + PCI_IF_CONFIG);
        word |= (1 << 24);
-       __raw_writel(word, mcs8140_pci_master_base + PCI_IF_CONFIG);
+       writel_relaxed(word, mcs8140_pci_master_base + PCI_IF_CONFIG);
 
        /* flush write */
-       word = __raw_readl(mcs8140_pci_master_base + PCI_IF_CONFIG);
+       word = readl_relaxed(mcs8140_pci_master_base + PCI_IF_CONFIG);
 
        return request_irq(irq, mcs8140_pci_abort_interrupt, 0,
                        "PCI abort", NULL);

diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/timer.c b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/timer.c
index e1f3730383d09cd5d5a9d23e132248ff6df29e7b..0947fb245f90500e29f8821471ee68263dba586e 100644 (file)
--- a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/timer.c
+++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/timer.c
@@ -22,6 +22,8 @@
 /* Timer block registers */
 #define TIMER_VAL      0x00
 #define TIMER_CTL      0x04
+#define  TIMER_CTL_EN  0x01
+#define  TIMER_CTL_DBG 0x02
 
 static u32 last_reload;
 static u32 timer_correct;
@@ -40,7 +42,7 @@ static inline unsigned long ticks2usecs(u32 x)
  */
 static unsigned long mcs814x_gettimeoffset(void)
 {
-       u32 ticks = __raw_readl(mcs814x_timer_base + TIMER_VAL);
+       u32 ticks = readl_relaxed(mcs814x_timer_base + TIMER_VAL);
 
        if (ticks < last_reload)
                return ticks2usecs(ticks + (u32)(0xffffffff - last_reload));
@@ -51,7 +53,7 @@ static unsigned long mcs814x_gettimeoffset(void)
 
 static irqreturn_t mcs814x_timer_interrupt(int irq, void *dev_id)
 {
-       u32 count = __raw_readl(mcs814x_timer_base + TIMER_VAL);
+       u32 count = readl_relaxed(mcs814x_timer_base + TIMER_VAL);
 
        /* take into account delay up to this moment */
        last_reload = count + timer_correct + timer_reload_value;
@@ -60,9 +62,9 @@ static irqreturn_t mcs814x_timer_interrupt(int irq, void *dev_id)
                last_reload = timer_reload_value;
        } else {
                if (timer_correct == 0)
-                       timer_correct = __raw_readl(mcs814x_timer_base + TIMER_VAL) - count;
+                       timer_correct = readl_relaxed(mcs814x_timer_base + TIMER_VAL) - count;
        }
-       __raw_writel(last_reload, mcs814x_timer_base + TIMER_VAL);
+       writel_relaxed(last_reload, mcs814x_timer_base + TIMER_VAL);
 
        timer_tick();
 
@@ -118,13 +120,14 @@ static void __init mcs814x_timer_init(void)
        timer_reload_value = 0xffffffff - (clock_rate / HZ);
 
        /* disable timer */
-       __raw_writel(0, mcs814x_timer_base + TIMER_CTL);
-       __raw_writel(timer_reload_value, mcs814x_timer_base + TIMER_VAL);
+       writel_relaxed(~TIMER_CTL_EN, mcs814x_timer_base + TIMER_CTL);
+       writel_relaxed(timer_reload_value, mcs814x_timer_base + TIMER_VAL);
        last_reload = timer_reload_value;
 
        setup_irq(mcs814x_timer_irq.irq, &mcs814x_timer_irq);
        /* enable timer, stop timer in debug mode */
-       __raw_writel(0x03, mcs814x_timer_base + TIMER_CTL);
+       writel_relaxed(TIMER_CTL_EN | TIMER_CTL_DBG,
+               mcs814x_timer_base + TIMER_CTL);
 }
 
 struct sys_timer mcs814x_timer = {

diff --git a/target/linux/mcs814x/files-3.3/drivers/char/hw_random/mcs814x-rng.c b/target/linux/mcs814x/files-3.3/drivers/char/hw_random/mcs814x-rng.c
index cccab07b27a03e2afeb846faffe7a7ce46e769c9..b1e95810dd24b07cd5705315bebd84387b44cffa 100644 (file)
--- a/target/linux/mcs814x/files-3.3/drivers/char/hw_random/mcs814x-rng.c
+++ b/target/linux/mcs814x/files-3.3/drivers/char/hw_random/mcs814x-rng.c
@@ -28,7 +28,7 @@ static int mcs814x_rng_data_read(struct hwrng *rng, u32 *buffer)
 {
        struct mcs814x_rng_priv *priv = (struct mcs814x_rng_priv *)rng->priv;
 
-       *buffer = __raw_readl(priv->regs + RND);
+       *buffer = readl_relaxed(priv->regs + RND);
 
        return 4;
 }

diff --git a/target/linux/mcs814x/files-3.3/drivers/gpio/gpio-mcs814x.c b/target/linux/mcs814x/files-3.3/drivers/gpio/gpio-mcs814x.c
index ea53c192bc5f614387cb46ec6fe4aa9f400caf5f..f1382290fb412e05ac1544cc0ab5ed655805d986 100644 (file)
--- a/target/linux/mcs814x/files-3.3/drivers/gpio/gpio-mcs814x.c
+++ b/target/linux/mcs814x/files-3.3/drivers/gpio/gpio-mcs814x.c
@@ -30,7 +30,7 @@ static int mcs814x_gpio_get(struct gpio_chip *chip, unsigned offset)
 {
        struct mcs814x_gpio_chip *mcs814x = to_mcs814x_gpio_chip(chip);
 
-       return __raw_readl(mcs814x->regs + GPIO_PIN) & (1 << offset);
+       return readl_relaxed(mcs814x->regs + GPIO_PIN) & (1 << offset);
 }
 
 static void mcs814x_gpio_set(struct gpio_chip *chip,
@@ -39,12 +39,12 @@ static void mcs814x_gpio_set(struct gpio_chip *chip,
        struct mcs814x_gpio_chip *mcs814x = to_mcs814x_gpio_chip(chip);
        u32 mask;
 
-       mask = __raw_readl(mcs814x->regs + GPIO_PIN);
+       mask = readl_relaxed(mcs814x->regs + GPIO_PIN);
        if (value)
                mask |= (1 << offset);
        else
                mask &= ~(1 << offset);
-       __raw_writel(mask, mcs814x->regs + GPIO_PIN);
+       writel_relaxed(mask, mcs814x->regs + GPIO_PIN);
 }
 
 static int mcs814x_gpio_direction_output(struct gpio_chip *chip,
@@ -53,9 +53,9 @@ static int mcs814x_gpio_direction_output(struct gpio_chip *chip,
        struct mcs814x_gpio_chip *mcs814x = to_mcs814x_gpio_chip(chip);
        u32 mask;
 
-       mask = __raw_readl(mcs814x->regs + GPIO_DIR);
+       mask = readl_relaxed(mcs814x->regs + GPIO_DIR);
        mask &= ~(1 << offset);
-       __raw_writel(mask, mcs814x->regs + GPIO_DIR);
+       writel_relaxed(mask, mcs814x->regs + GPIO_DIR);
 
        return 0;
 }
@@ -66,9 +66,9 @@ static int mcs814x_gpio_direction_input(struct gpio_chip *chip,
        struct mcs814x_gpio_chip *mcs814x = to_mcs814x_gpio_chip(chip);
        u32 mask;
 
-       mask = __raw_readl(mcs814x->regs + GPIO_DIR);
+       mask = readl_relaxed(mcs814x->regs + GPIO_DIR);
        mask |= (1 << offset);
-       __raw_writel(mask, mcs814x->regs + GPIO_DIR);
+       writel_relaxed(mask, mcs814x->regs + GPIO_DIR);
 
        return 0;
 }

diff --git a/target/linux/mcs814x/files-3.3/drivers/net/ethernet/mcs8140/nuport_mac.c b/target/linux/mcs814x/files-3.3/drivers/net/ethernet/mcs8140/nuport_mac.c
index 4a4208604618fd71d409997f80f8d538189aac03..d874e71a1be2ea864e01cd84c0a329687a8b5b79 100644 (file)
--- a/target/linux/mcs814x/files-3.3/drivers/net/ethernet/mcs8140/nuport_mac.c
+++ b/target/linux/mcs814x/files-3.3/drivers/net/ethernet/mcs8140/nuport_mac.c
@@ -112,7 +112,7 @@
 
 static inline u32 nuport_mac_readl(void __iomem *reg)
 {
-       return __raw_readl(reg);
+       return readl_relaxed(reg);
 }
 
 static inline u8 nuport_mac_readb(void __iomem *reg)
@@ -122,12 +122,12 @@ static inline u8 nuport_mac_readb(void __iomem *reg)
 
 static inline void nuport_mac_writel(u32 value, void __iomem *reg)
 {
-       __raw_writel(value, reg);
+       writel_relaxed(value, reg);
 }
 
 static inline void nuport_mac_writeb(u8 value, void __iomem *reg)
 {
-       __raw_writel(value, reg);
+       writel_relaxed(value, reg);
 }
 
 /* MAC private data */

diff --git a/target/linux/mcs814x/files-3.3/drivers/watchdog/mcs814x_wdt.c b/target/linux/mcs814x/files-3.3/drivers/watchdog/mcs814x_wdt.c
index d2f4c5994ff362514f997055caea1e67c94bc811..ca69e8f955187d2e115fae523c94bd9cf98f2e73 100644 (file)
--- a/target/linux/mcs814x/files-3.3/drivers/watchdog/mcs814x_wdt.c
+++ b/target/linux/mcs814x/files-3.3/drivers/watchdog/mcs814x_wdt.c
@@ -49,9 +49,9 @@ static int mcs814x_wdt_start(struct watchdog_device *dev)
        u32 reg;
 
        spin_lock(&wdt->lock);
-       reg = __raw_readl(wdt->regs + WDT_CTRL);
+       reg = readl_relaxed(wdt->regs + WDT_CTRL);
        reg |= WDT_CTRL_EN;
-       __raw_writel(reg, wdt->regs + WDT_CTRL);
+       writel_relaxed(reg, wdt->regs + WDT_CTRL);
        spin_unlock(&wdt->lock);
 
        return 0;
@@ -63,9 +63,9 @@ static int mcs814x_wdt_stop(struct watchdog_device *dev)
        u32 reg;
 
        spin_lock(&wdt->lock);
-       reg = __raw_readl(wdt->regs + WDT_CTRL);
+       reg = readl_relaxed(wdt->regs + WDT_CTRL);
        reg &= ~WDT_CTRL_EN;
-       __raw_writel(reg, wdt->regs + WDT_CTRL);
+       writel_relaxed(reg, wdt->regs + WDT_CTRL);
        spin_unlock(&wdt->lock);
 
        return 0;
@@ -80,7 +80,7 @@ static int mcs814x_wdt_set_timeout(struct watchdog_device *dev,
        /* watchdog counts upward and rollover (0xfffffff -> 0)
         * triggers the reboot
         */
-       __raw_writel(WDT_MAX_VALUE - (new_timeout * clk_get_rate(wdt->clk)),
+       writel_relaxed(WDT_MAX_VALUE - (new_timeout * clk_get_rate(wdt->clk)),
                wdt->regs + WDT_COUNT);
        spin_unlock(&wdt->lock);