ar71xx: fix secondary gpio controller base values

In 4.9, gpio count is rounded up to 32 due to the use of bgpio in the
ath79 gpio controller driver.
Fix base values in mach files to account for that

Signed-off-by: Felix Fietkau <nbd@nbd.name>

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c25-v1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c25-v1.c
index 9e08c157e4f0bc26ecaa13cb40eb805a71a258d6..c6c64632242cf15f9261183c5ef13f984b1cce94 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c25-v1.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c25-v1.c
@@ -35,15 +35,15 @@
 #define ARCHER_C25_GPIO_SHIFT_SRCLR    19 /* MR,   Master Reset */
 #define ARCHER_C25_GPIO_SHIFT_RCLK     16 /* STCP, Storage Reg Clock Input */
 
-#define ARCHER_C25_74HC_GPIO_BASE              QCA956X_GPIO_COUNT
-#define ARCHER_C25_74HC_GPIO_LED_WAN_AMBER     27
-#define ARCHER_C25_74HC_GPIO_LED_WAN_GREEN     28
-#define ARCHER_C25_74HC_GPIO_LED_WLAN2         29
-#define ARCHER_C25_74HC_GPIO_LED_WLAN5         30
-#define ARCHER_C25_74HC_GPIO_LED_LAN1          23
-#define ARCHER_C25_74HC_GPIO_LED_LAN2          24
-#define ARCHER_C25_74HC_GPIO_LED_LAN3          25
-#define ARCHER_C25_74HC_GPIO_LED_LAN4          26
+#define ARCHER_C25_74HC_GPIO_BASE              32
+#define ARCHER_C25_74HC_GPIO_LED_WAN_AMBER     (ARCHER_C25_74HC_GPIO_BASE + 4)
+#define ARCHER_C25_74HC_GPIO_LED_WAN_GREEN     (ARCHER_C25_74HC_GPIO_BASE + 5)
+#define ARCHER_C25_74HC_GPIO_LED_WLAN2         (ARCHER_C25_74HC_GPIO_BASE + 6)
+#define ARCHER_C25_74HC_GPIO_LED_WLAN5         (ARCHER_C25_74HC_GPIO_BASE + 7)
+#define ARCHER_C25_74HC_GPIO_LED_LAN1          (ARCHER_C25_74HC_GPIO_BASE + 0)
+#define ARCHER_C25_74HC_GPIO_LED_LAN2          (ARCHER_C25_74HC_GPIO_BASE + 1)
+#define ARCHER_C25_74HC_GPIO_LED_LAN3          (ARCHER_C25_74HC_GPIO_BASE + 2)
+#define ARCHER_C25_74HC_GPIO_LED_LAN4          (ARCHER_C25_74HC_GPIO_BASE + 3)
 
 #define ARCHER_C25_V1_SSR_BIT_0                        0
 #define ARCHER_C25_V1_SSR_BIT_1                        1

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c
index da15919a54c7fb555ce3f6d34ec452d4fb0c353d..3c85a20550f85d1aa26685a9fb29666e04351d1b 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c
@@ -43,15 +43,15 @@
 #define ARCHER_C59_GPIO_SHIFT_SRCLR            19
 #define ARCHER_C59_GPIO_SHIFT_RCLK             20
 
-#define ARCHER_C59_74HC_GPIO_BASE              QCA956X_GPIO_COUNT
-#define ARCHER_C59_74HC_GPIO_LED_POWER         23
-#define ARCHER_C59_74HC_GPIO_LED_WLAN2         24
-#define ARCHER_C59_74HC_GPIO_LED_WLAN5         25
-#define ARCHER_C59_74HC_GPIO_LED_LAN           26
-#define ARCHER_C59_74HC_GPIO_LED_WAN_GREEN     27
-#define ARCHER_C59_74HC_GPIO_LED_WAN_AMBER     28
-#define ARCHER_C59_74HC_GPIO_LED_WPS           29
-#define ARCHER_C59_74HC_GPIO_LED_USB           30
+#define ARCHER_C59_74HC_GPIO_BASE              32
+#define ARCHER_C59_74HC_GPIO_LED_POWER         (ARCHER_C59_74HC_GPIO_BASE + 0)
+#define ARCHER_C59_74HC_GPIO_LED_WLAN2         (ARCHER_C59_74HC_GPIO_BASE + 1)
+#define ARCHER_C59_74HC_GPIO_LED_WLAN5         (ARCHER_C59_74HC_GPIO_BASE + 2)
+#define ARCHER_C59_74HC_GPIO_LED_LAN           (ARCHER_C59_74HC_GPIO_BASE + 3)
+#define ARCHER_C59_74HC_GPIO_LED_WAN_GREEN     (ARCHER_C59_74HC_GPIO_BASE + 4)
+#define ARCHER_C59_74HC_GPIO_LED_WAN_AMBER     (ARCHER_C59_74HC_GPIO_BASE + 5)
+#define ARCHER_C59_74HC_GPIO_LED_WPS           (ARCHER_C59_74HC_GPIO_BASE + 6)
+#define ARCHER_C59_74HC_GPIO_LED_USB           (ARCHER_C59_74HC_GPIO_BASE + 7)
 
 #define ARCHER_C59_V1_SSR_BIT_0                        0
 #define ARCHER_C59_V1_SSR_BIT_1                        1

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7-v4.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7-v4.c
index 64955c79945c0b2c28d5a93be6e45662200e60ed..21b8e8cf8b7130e7c7197fd537fdd5404ea9b148 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7-v4.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7-v4.c
@@ -56,7 +56,7 @@
 #define ARCHER_C7_GPIO_LED_USB1                7
 #define ARCHER_C7_GPIO_LED_USB2                8
 
-#define ARCHER_C7_74HC_GPIO_BASE       QCA956X_GPIO_COUNT
+#define ARCHER_C7_74HC_GPIO_BASE       32
 #define ARCHER_C7_GPIO_LED_WPS         (ARCHER_C7_74HC_GPIO_BASE + 0)
 #define ARCHER_C7_GPIO_LED_LAN1                (ARCHER_C7_74HC_GPIO_BASE + 1)
 #define ARCHER_C7_GPIO_LED_LAN2                (ARCHER_C7_74HC_GPIO_BASE + 2)

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c
index 64f927dc6a9a0a691703a571aa1d9ba61b77fa84..691566fa8210719179f6048fe33fa46065c1f323 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c
@@ -53,7 +53,7 @@
 #define RB91X_FLAG_USB         BIT(0)
 #define RB91X_FLAG_PCIE                BIT(1)
 
-#define RB91X_LATCH_GPIO_BASE  AR934X_GPIO_COUNT
+#define RB91X_LATCH_GPIO_BASE  32
 #define RB91X_LATCH_GPIO(_x)   (RB91X_LATCH_GPIO_BASE + (_x))
 
 #define RB91X_SSR_GPIO_BASE    (RB91X_LATCH_GPIO_BASE + AR934X_GPIO_COUNT)

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr942n-v1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr942n-v1.c
index 76f6a0759b68aff6c411c4738a26688eb62f0d59..32e2bc952158aee5130437f5317f285d9cd538a9 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr942n-v1.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr942n-v1.c
@@ -49,15 +49,15 @@
 #define TL_WR942N_V1_GPIO_LED_WPS              21
 #define TL_WR942N_V1_GPIO_LED_STATUS           22
 
-#define TL_WR942N_V1_74HC_GPIO_BASE            QCA956X_GPIO_COUNT
-#define TL_WR942N_V1_74HC_GPIO_LED_LAN4                23
-#define TL_WR942N_V1_74HC_GPIO_LED_LAN3                24
-#define TL_WR942N_V1_74HC_GPIO_LED_LAN2                25
-#define TL_WR942N_V1_74HC_GPIO_LED_LAN1                26
-#define TL_WR942N_V1_74HC_GPIO_LED_WAN_GREEN   27
-#define TL_WR942N_V1_74HC_GPIO_LED_WAN_AMBER   28
-#define TL_WR942N_V1_74HC_GPIO_LED_WLAN                29
-#define TL_WR942N_V1_74HC_GPIO_HUB_RESET       30 /* from u-boot sources */
+#define TL_WR942N_V1_74HC_GPIO_BASE            32
+#define TL_WR942N_V1_74HC_GPIO_LED_LAN4                (TL_WR942N_V1_74HC_GPIO_BASE + 0)
+#define TL_WR942N_V1_74HC_GPIO_LED_LAN3                (TL_WR942N_V1_74HC_GPIO_BASE + 1)
+#define TL_WR942N_V1_74HC_GPIO_LED_LAN2                (TL_WR942N_V1_74HC_GPIO_BASE + 2)
+#define TL_WR942N_V1_74HC_GPIO_LED_LAN1                (TL_WR942N_V1_74HC_GPIO_BASE + 3)
+#define TL_WR942N_V1_74HC_GPIO_LED_WAN_GREEN   (TL_WR942N_V1_74HC_GPIO_BASE + 4)
+#define TL_WR942N_V1_74HC_GPIO_LED_WAN_AMBER   (TL_WR942N_V1_74HC_GPIO_BASE + 5)
+#define TL_WR942N_V1_74HC_GPIO_LED_WLAN                (TL_WR942N_V1_74HC_GPIO_BASE + 6)
+#define TL_WR942N_V1_74HC_GPIO_HUB_RESET       (TL_WR942N_V1_74HC_GPIO_BASE + 7) /* from u-boot sources */
 
 #define TL_WR942N_V1_SSR_BIT_0                 0
 #define TL_WR942N_V1_SSR_BIT_1                 1