in past program SMU will use all voltage headroom. RV does not
if DAL need higher voltage for DCFCLK or DISPCLK, also increase FCLK
to improve stutter as voltage is already
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
else
bw_consumed = v->fabric_and_dram_bandwidth_vmax0p9;
+ if (bw_consumed < v->fabric_and_dram_bandwidth)
+ if (dc->debug.voltage_align_fclk)
+ bw_consumed = v->fabric_and_dram_bandwidth;
+
display_pipe_configuration(v);
calc_wm_sets_and_perf_params(context, v);
context->bw.dcn.calc_clk.fclk_khz = (int)(bw_consumed * 1000000 /
enum dcc_option disable_dcc;
enum pipe_split_policy pipe_split_policy;
bool force_single_disp_pipe_split;
+ bool voltage_align_fclk;
bool disable_dfs_bypass;
bool disable_dpp_power_gate;
.pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
.disable_dcc = DCC_ENABLE,
+ .voltage_align_fclk = true,
};
static const struct dc_debug debug_defaults_diags = {