retval = hw_device_reset(ci, USBMODE_CM_DC);
if (retval)
goto put_transceiver;
- hw_enable_vbus_intr(ci);
}
- retval = device_register(&ci->gadget.dev);
- if (retval) {
- put_device(&ci->gadget.dev);
- retval = dbg_create_files(ci->dev);
- if (retval)
-- goto put_transceiver;
- }
--
if (!IS_ERR_OR_NULL(ci->transceiver)) {
retval = otg_set_peripheral(ci->transceiver->otg,
&ci->gadget);
if (retval)
- goto unreg_device;
- goto remove_dbg;
++ goto put_transceiver;
}
retval = usb_add_gadget_udc(dev, &ci->gadget);
}
dev_err(dev, "error = %i\n", retval);
- unreg_device:
- device_unregister(&ci->gadget.dev);
-remove_dbg:
- dbg_remove_files(ci->dev);
put_transceiver:
if (!IS_ERR_OR_NULL(ci->transceiver) && ci->global_phy)
usb_put_phy(ci->transceiver);
if (ci->global_phy)
usb_put_phy(ci->transceiver);
}
- device_unregister(&ci->gadget.dev);
- dbg_remove_files(ci->dev);
/* my kobject is dynamic, I swear! */
memset(&ci->gadget, 0, sizeof(ci->gadget));
}
* do...?
*/
if (gfs_ether_setup)
- gether_cleanup();
+ gether_cleanup(the_dev);
gfs_ether_setup = false;
- for (i = func_num; --i; )
+ for (i = func_num; i--; )
if (ffs_tab[i].ffs_data)
functionfs_unbind(ffs_tab[i].ffs_data);
"ep-a", "ep-b", "ep-c",
};
- #define DMA_ADDR_INVALID (~(dma_addr_t)0)
-#ifdef CONFIG_USB_GADGET_NET2272_DMA
+#ifdef CONFIG_USB_NET2272_DMA
/*
* use_dma: the NET2272 can use an external DMA controller.
* Note that since there is no generic DMA api, some functions,
err_func:
device_remove_file (&dev->pdev->dev, &dev_attr_function);
err_unbind:
- dev->gadget.dev.driver = NULL;
- driver->unbind (&dev->gadget);
dev->driver = NULL;
return retval;
}
if (!irq) {
dev_err(&pdev->dev, "Failed to get IRQ\n");
err = -ENODEV;
- goto fail;
+ goto fail_phy;
}
- #ifdef CONFIG_USB_OTG_UTILS
if (pdata->operating_mode == TEGRA_USB_OTG) {
tegra->transceiver =
devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
- if (!IS_ERR_OR_NULL(tegra->transceiver))
+ if (!IS_ERR(tegra->transceiver))
otg_set_host(tegra->transceiver->otg, &hcd->self);
+ } else {
+ tegra->transceiver = ERR_PTR(-ENODEV);
}
- #endif
err = usb_add_hcd(hcd, irq, IRQF_SHARED);
if (err) {
return err;
fail:
- #ifdef CONFIG_USB_OTG_UTILS
- if (!IS_ERR_OR_NULL(tegra->transceiver))
+ if (!IS_ERR(tegra->transceiver))
otg_set_host(tegra->transceiver->otg, NULL);
- #endif
+fail_phy:
usb_phy_shutdown(hcd->phy);
fail_io:
clk_disable_unprepare(tegra->clk);
--- /dev/null
-static int __exit isp1301_remove(struct i2c_client *i2c)
+ /*
+ * isp1301_omap - ISP 1301 USB transceiver, talking to OMAP OTG controller
+ *
+ * Copyright (C) 2004 Texas Instruments
+ * Copyright (C) 2004 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+ #include <linux/init.h>
+ #include <linux/slab.h>
+ #include <linux/interrupt.h>
+ #include <linux/platform_device.h>
+ #include <linux/gpio.h>
+ #include <linux/usb/ch9.h>
+ #include <linux/usb/gadget.h>
+ #include <linux/usb.h>
+ #include <linux/usb/otg.h>
+ #include <linux/i2c.h>
+ #include <linux/workqueue.h>
+
+ #include <asm/irq.h>
+ #include <asm/mach-types.h>
+
+ #include <mach/mux.h>
+
+ #include <mach/usb.h>
+
+ #ifndef DEBUG
+ #undef VERBOSE
+ #endif
+
+
+ #define DRIVER_VERSION "24 August 2004"
+ #define DRIVER_NAME (isp1301_driver.driver.name)
+
+ MODULE_DESCRIPTION("ISP1301 USB OTG Transceiver Driver");
+ MODULE_LICENSE("GPL");
+
+ struct isp1301 {
+ struct usb_phy phy;
+ struct i2c_client *client;
+ void (*i2c_release)(struct device *dev);
+
+ int irq_type;
+
+ u32 last_otg_ctrl;
+ unsigned working:1;
+
+ struct timer_list timer;
+
+ /* use keventd context to change the state for us */
+ struct work_struct work;
+
+ unsigned long todo;
+ # define WORK_UPDATE_ISP 0 /* update ISP from OTG */
+ # define WORK_UPDATE_OTG 1 /* update OTG from ISP */
+ # define WORK_HOST_RESUME 4 /* resume host */
+ # define WORK_TIMER 6 /* timer fired */
+ # define WORK_STOP 7 /* don't resubmit */
+ };
+
+
+ /* bits in OTG_CTRL */
+
+ #define OTG_XCEIV_OUTPUTS \
+ (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID)
+ #define OTG_XCEIV_INPUTS \
+ (OTG_PULLDOWN|OTG_PULLUP|OTG_DRV_VBUS|OTG_PD_VBUS|OTG_PU_VBUS|OTG_PU_ID)
+ #define OTG_CTRL_BITS \
+ (OTG_A_BUSREQ|OTG_A_SETB_HNPEN|OTG_B_BUSREQ|OTG_B_HNPEN|OTG_BUSDROP)
+ /* and OTG_PULLUP is sometimes written */
+
+ #define OTG_CTRL_MASK (OTG_DRIVER_SEL| \
+ OTG_XCEIV_OUTPUTS|OTG_XCEIV_INPUTS| \
+ OTG_CTRL_BITS)
+
+
+ /*-------------------------------------------------------------------------*/
+
+ /* board-specific PM hooks */
+
+ #if defined(CONFIG_MACH_OMAP_H2) || defined(CONFIG_MACH_OMAP_H3)
+
+ #if defined(CONFIG_TPS65010) || defined(CONFIG_TPS65010_MODULE)
+
+ #include <linux/i2c/tps65010.h>
+
+ #else
+
+ static inline int tps65010_set_vbus_draw(unsigned mA)
+ {
+ pr_debug("tps65010: draw %d mA (STUB)\n", mA);
+ return 0;
+ }
+
+ #endif
+
+ static void enable_vbus_draw(struct isp1301 *isp, unsigned mA)
+ {
+ int status = tps65010_set_vbus_draw(mA);
+ if (status < 0)
+ pr_debug(" VBUS %d mA error %d\n", mA, status);
+ }
+
+ #else
+
+ static void enable_vbus_draw(struct isp1301 *isp, unsigned mA)
+ {
+ /* H4 controls this by DIP switch S2.4; no soft control.
+ * ON means the charger is always enabled. Leave it OFF
+ * unless the OTG port is used only in B-peripheral mode.
+ */
+ }
+
+ #endif
+
+ static void enable_vbus_source(struct isp1301 *isp)
+ {
+ /* this board won't supply more than 8mA vbus power.
+ * some boards can switch a 100ma "unit load" (or more).
+ */
+ }
+
+
+ /* products will deliver OTG messages with LEDs, GUI, etc */
+ static inline void notresponding(struct isp1301 *isp)
+ {
+ printk(KERN_NOTICE "OTG device not responding.\n");
+ }
+
+
+ /*-------------------------------------------------------------------------*/
+
+ static struct i2c_driver isp1301_driver;
+
+ /* smbus apis are used for portability */
+
+ static inline u8
+ isp1301_get_u8(struct isp1301 *isp, u8 reg)
+ {
+ return i2c_smbus_read_byte_data(isp->client, reg + 0);
+ }
+
+ static inline int
+ isp1301_get_u16(struct isp1301 *isp, u8 reg)
+ {
+ return i2c_smbus_read_word_data(isp->client, reg);
+ }
+
+ static inline int
+ isp1301_set_bits(struct isp1301 *isp, u8 reg, u8 bits)
+ {
+ return i2c_smbus_write_byte_data(isp->client, reg + 0, bits);
+ }
+
+ static inline int
+ isp1301_clear_bits(struct isp1301 *isp, u8 reg, u8 bits)
+ {
+ return i2c_smbus_write_byte_data(isp->client, reg + 1, bits);
+ }
+
+ /*-------------------------------------------------------------------------*/
+
+ /* identification */
+ #define ISP1301_VENDOR_ID 0x00 /* u16 read */
+ #define ISP1301_PRODUCT_ID 0x02 /* u16 read */
+ #define ISP1301_BCD_DEVICE 0x14 /* u16 read */
+
+ #define I2C_VENDOR_ID_PHILIPS 0x04cc
+ #define I2C_PRODUCT_ID_PHILIPS_1301 0x1301
+
+ /* operational registers */
+ #define ISP1301_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */
+ # define MC1_SPEED (1 << 0)
+ # define MC1_SUSPEND (1 << 1)
+ # define MC1_DAT_SE0 (1 << 2)
+ # define MC1_TRANSPARENT (1 << 3)
+ # define MC1_BDIS_ACON_EN (1 << 4)
+ # define MC1_OE_INT_EN (1 << 5)
+ # define MC1_UART_EN (1 << 6)
+ # define MC1_MASK 0x7f
+ #define ISP1301_MODE_CONTROL_2 0x12 /* u8 read, set, +1 clear */
+ # define MC2_GLOBAL_PWR_DN (1 << 0)
+ # define MC2_SPD_SUSP_CTRL (1 << 1)
+ # define MC2_BI_DI (1 << 2)
+ # define MC2_TRANSP_BDIR0 (1 << 3)
+ # define MC2_TRANSP_BDIR1 (1 << 4)
+ # define MC2_AUDIO_EN (1 << 5)
+ # define MC2_PSW_EN (1 << 6)
+ # define MC2_EN2V7 (1 << 7)
+ #define ISP1301_OTG_CONTROL_1 0x06 /* u8 read, set, +1 clear */
+ # define OTG1_DP_PULLUP (1 << 0)
+ # define OTG1_DM_PULLUP (1 << 1)
+ # define OTG1_DP_PULLDOWN (1 << 2)
+ # define OTG1_DM_PULLDOWN (1 << 3)
+ # define OTG1_ID_PULLDOWN (1 << 4)
+ # define OTG1_VBUS_DRV (1 << 5)
+ # define OTG1_VBUS_DISCHRG (1 << 6)
+ # define OTG1_VBUS_CHRG (1 << 7)
+ #define ISP1301_OTG_STATUS 0x10 /* u8 readonly */
+ # define OTG_B_SESS_END (1 << 6)
+ # define OTG_B_SESS_VLD (1 << 7)
+
+ #define ISP1301_INTERRUPT_SOURCE 0x08 /* u8 read */
+ #define ISP1301_INTERRUPT_LATCH 0x0A /* u8 read, set, +1 clear */
+
+ #define ISP1301_INTERRUPT_FALLING 0x0C /* u8 read, set, +1 clear */
+ #define ISP1301_INTERRUPT_RISING 0x0E /* u8 read, set, +1 clear */
+
+ /* same bitfields in all interrupt registers */
+ # define INTR_VBUS_VLD (1 << 0)
+ # define INTR_SESS_VLD (1 << 1)
+ # define INTR_DP_HI (1 << 2)
+ # define INTR_ID_GND (1 << 3)
+ # define INTR_DM_HI (1 << 4)
+ # define INTR_ID_FLOAT (1 << 5)
+ # define INTR_BDIS_ACON (1 << 6)
+ # define INTR_CR_INT (1 << 7)
+
+ /*-------------------------------------------------------------------------*/
+
+ static inline const char *state_name(struct isp1301 *isp)
+ {
+ return usb_otg_state_string(isp->phy.state);
+ }
+
+ /*-------------------------------------------------------------------------*/
+
+ /* NOTE: some of this ISP1301 setup is specific to H2 boards;
+ * not everything is guarded by board-specific checks, or even using
+ * omap_usb_config data to deduce MC1_DAT_SE0 and MC2_BI_DI.
+ *
+ * ALSO: this currently doesn't use ISP1301 low-power modes
+ * while OTG is running.
+ */
+
+ static void power_down(struct isp1301 *isp)
+ {
+ isp->phy.state = OTG_STATE_UNDEFINED;
+
+ // isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN);
+ isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND);
+
+ isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_ID_PULLDOWN);
+ isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0);
+ }
+
+ static void power_up(struct isp1301 *isp)
+ {
+ // isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN);
+ isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND);
+
+ /* do this only when cpu is driving transceiver,
+ * so host won't see a low speed device...
+ */
+ isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0);
+ }
+
+ #define NO_HOST_SUSPEND
+
+ static int host_suspend(struct isp1301 *isp)
+ {
+ #ifdef NO_HOST_SUSPEND
+ return 0;
+ #else
+ struct device *dev;
+
+ if (!isp->phy.otg->host)
+ return -ENODEV;
+
+ /* Currently ASSUMES only the OTG port matters;
+ * other ports could be active...
+ */
+ dev = isp->phy.otg->host->controller;
+ return dev->driver->suspend(dev, 3, 0);
+ #endif
+ }
+
+ static int host_resume(struct isp1301 *isp)
+ {
+ #ifdef NO_HOST_SUSPEND
+ return 0;
+ #else
+ struct device *dev;
+
+ if (!isp->phy.otg->host)
+ return -ENODEV;
+
+ dev = isp->phy.otg->host->controller;
+ return dev->driver->resume(dev, 0);
+ #endif
+ }
+
+ static int gadget_suspend(struct isp1301 *isp)
+ {
+ isp->phy.otg->gadget->b_hnp_enable = 0;
+ isp->phy.otg->gadget->a_hnp_support = 0;
+ isp->phy.otg->gadget->a_alt_hnp_support = 0;
+ return usb_gadget_vbus_disconnect(isp->phy.otg->gadget);
+ }
+
+ /*-------------------------------------------------------------------------*/
+
+ #define TIMER_MINUTES 10
+ #define TIMER_JIFFIES (TIMER_MINUTES * 60 * HZ)
+
+ /* Almost all our I2C messaging comes from a work queue's task context.
+ * NOTE: guaranteeing certain response times might mean we shouldn't
+ * share keventd's work queue; a realtime task might be safest.
+ */
+ static void isp1301_defer_work(struct isp1301 *isp, int work)
+ {
+ int status;
+
+ if (isp && !test_and_set_bit(work, &isp->todo)) {
+ (void) get_device(&isp->client->dev);
+ status = schedule_work(&isp->work);
+ if (!status && !isp->working)
+ dev_vdbg(&isp->client->dev,
+ "work item %d may be lost\n", work);
+ }
+ }
+
+ /* called from irq handlers */
+ static void a_idle(struct isp1301 *isp, const char *tag)
+ {
+ u32 l;
+
+ if (isp->phy.state == OTG_STATE_A_IDLE)
+ return;
+
+ isp->phy.otg->default_a = 1;
+ if (isp->phy.otg->host) {
+ isp->phy.otg->host->is_b_host = 0;
+ host_suspend(isp);
+ }
+ if (isp->phy.otg->gadget) {
+ isp->phy.otg->gadget->is_a_peripheral = 1;
+ gadget_suspend(isp);
+ }
+ isp->phy.state = OTG_STATE_A_IDLE;
+ l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS;
+ omap_writel(l, OTG_CTRL);
+ isp->last_otg_ctrl = l;
+ pr_debug(" --> %s/%s\n", state_name(isp), tag);
+ }
+
+ /* called from irq handlers */
+ static void b_idle(struct isp1301 *isp, const char *tag)
+ {
+ u32 l;
+
+ if (isp->phy.state == OTG_STATE_B_IDLE)
+ return;
+
+ isp->phy.otg->default_a = 0;
+ if (isp->phy.otg->host) {
+ isp->phy.otg->host->is_b_host = 1;
+ host_suspend(isp);
+ }
+ if (isp->phy.otg->gadget) {
+ isp->phy.otg->gadget->is_a_peripheral = 0;
+ gadget_suspend(isp);
+ }
+ isp->phy.state = OTG_STATE_B_IDLE;
+ l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS;
+ omap_writel(l, OTG_CTRL);
+ isp->last_otg_ctrl = l;
+ pr_debug(" --> %s/%s\n", state_name(isp), tag);
+ }
+
+ static void
+ dump_regs(struct isp1301 *isp, const char *label)
+ {
+ #ifdef DEBUG
+ u8 ctrl = isp1301_get_u8(isp, ISP1301_OTG_CONTROL_1);
+ u8 status = isp1301_get_u8(isp, ISP1301_OTG_STATUS);
+ u8 src = isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE);
+
+ pr_debug("otg: %06x, %s %s, otg/%02x stat/%02x.%02x\n",
+ omap_readl(OTG_CTRL), label, state_name(isp),
+ ctrl, status, src);
+ /* mode control and irq enables don't change much */
+ #endif
+ }
+
+ /*-------------------------------------------------------------------------*/
+
+ #ifdef CONFIG_USB_OTG
+
+ /*
+ * The OMAP OTG controller handles most of the OTG state transitions.
+ *
+ * We translate isp1301 outputs (mostly voltage comparator status) into
+ * OTG inputs; OTG outputs (mostly pullup/pulldown controls) and HNP state
+ * flags into isp1301 inputs ... and infer state transitions.
+ */
+
+ #ifdef VERBOSE
+
+ static void check_state(struct isp1301 *isp, const char *tag)
+ {
+ enum usb_otg_state state = OTG_STATE_UNDEFINED;
+ u8 fsm = omap_readw(OTG_TEST) & 0x0ff;
+ unsigned extra = 0;
+
+ switch (fsm) {
+
+ /* default-b */
+ case 0x0:
+ state = OTG_STATE_B_IDLE;
+ break;
+ case 0x3:
+ case 0x7:
+ extra = 1;
+ case 0x1:
+ state = OTG_STATE_B_PERIPHERAL;
+ break;
+ case 0x11:
+ state = OTG_STATE_B_SRP_INIT;
+ break;
+
+ /* extra dual-role default-b states */
+ case 0x12:
+ case 0x13:
+ case 0x16:
+ extra = 1;
+ case 0x17:
+ state = OTG_STATE_B_WAIT_ACON;
+ break;
+ case 0x34:
+ state = OTG_STATE_B_HOST;
+ break;
+
+ /* default-a */
+ case 0x36:
+ state = OTG_STATE_A_IDLE;
+ break;
+ case 0x3c:
+ state = OTG_STATE_A_WAIT_VFALL;
+ break;
+ case 0x7d:
+ state = OTG_STATE_A_VBUS_ERR;
+ break;
+ case 0x9e:
+ case 0x9f:
+ extra = 1;
+ case 0x89:
+ state = OTG_STATE_A_PERIPHERAL;
+ break;
+ case 0xb7:
+ state = OTG_STATE_A_WAIT_VRISE;
+ break;
+ case 0xb8:
+ state = OTG_STATE_A_WAIT_BCON;
+ break;
+ case 0xb9:
+ state = OTG_STATE_A_HOST;
+ break;
+ case 0xba:
+ state = OTG_STATE_A_SUSPEND;
+ break;
+ default:
+ break;
+ }
+ if (isp->phy.state == state && !extra)
+ return;
+ pr_debug("otg: %s FSM %s/%02x, %s, %06x\n", tag,
+ usb_otg_state_string(state), fsm, state_name(isp),
+ omap_readl(OTG_CTRL));
+ }
+
+ #else
+
+ static inline void check_state(struct isp1301 *isp, const char *tag) { }
+
+ #endif
+
+ /* outputs from ISP1301_INTERRUPT_SOURCE */
+ static void update_otg1(struct isp1301 *isp, u8 int_src)
+ {
+ u32 otg_ctrl;
+
+ otg_ctrl = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
+ otg_ctrl &= ~OTG_XCEIV_INPUTS;
+ otg_ctrl &= ~(OTG_ID|OTG_ASESSVLD|OTG_VBUSVLD);
+
+ if (int_src & INTR_SESS_VLD)
+ otg_ctrl |= OTG_ASESSVLD;
+ else if (isp->phy.state == OTG_STATE_A_WAIT_VFALL) {
+ a_idle(isp, "vfall");
+ otg_ctrl &= ~OTG_CTRL_BITS;
+ }
+ if (int_src & INTR_VBUS_VLD)
+ otg_ctrl |= OTG_VBUSVLD;
+ if (int_src & INTR_ID_GND) { /* default-A */
+ if (isp->phy.state == OTG_STATE_B_IDLE
+ || isp->phy.state
+ == OTG_STATE_UNDEFINED) {
+ a_idle(isp, "init");
+ return;
+ }
+ } else { /* default-B */
+ otg_ctrl |= OTG_ID;
+ if (isp->phy.state == OTG_STATE_A_IDLE
+ || isp->phy.state == OTG_STATE_UNDEFINED) {
+ b_idle(isp, "init");
+ return;
+ }
+ }
+ omap_writel(otg_ctrl, OTG_CTRL);
+ }
+
+ /* outputs from ISP1301_OTG_STATUS */
+ static void update_otg2(struct isp1301 *isp, u8 otg_status)
+ {
+ u32 otg_ctrl;
+
+ otg_ctrl = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
+ otg_ctrl &= ~OTG_XCEIV_INPUTS;
+ otg_ctrl &= ~(OTG_BSESSVLD | OTG_BSESSEND);
+ if (otg_status & OTG_B_SESS_VLD)
+ otg_ctrl |= OTG_BSESSVLD;
+ else if (otg_status & OTG_B_SESS_END)
+ otg_ctrl |= OTG_BSESSEND;
+ omap_writel(otg_ctrl, OTG_CTRL);
+ }
+
+ /* inputs going to ISP1301 */
+ static void otg_update_isp(struct isp1301 *isp)
+ {
+ u32 otg_ctrl, otg_change;
+ u8 set = OTG1_DM_PULLDOWN, clr = OTG1_DM_PULLUP;
+
+ otg_ctrl = omap_readl(OTG_CTRL);
+ otg_change = otg_ctrl ^ isp->last_otg_ctrl;
+ isp->last_otg_ctrl = otg_ctrl;
+ otg_ctrl = otg_ctrl & OTG_XCEIV_INPUTS;
+
+ switch (isp->phy.state) {
+ case OTG_STATE_B_IDLE:
+ case OTG_STATE_B_PERIPHERAL:
+ case OTG_STATE_B_SRP_INIT:
+ if (!(otg_ctrl & OTG_PULLUP)) {
+ // if (otg_ctrl & OTG_B_HNPEN) {
+ if (isp->phy.otg->gadget->b_hnp_enable) {
+ isp->phy.state = OTG_STATE_B_WAIT_ACON;
+ pr_debug(" --> b_wait_acon\n");
+ }
+ goto pulldown;
+ }
+ pullup:
+ set |= OTG1_DP_PULLUP;
+ clr |= OTG1_DP_PULLDOWN;
+ break;
+ case OTG_STATE_A_SUSPEND:
+ case OTG_STATE_A_PERIPHERAL:
+ if (otg_ctrl & OTG_PULLUP)
+ goto pullup;
+ /* FALLTHROUGH */
+ // case OTG_STATE_B_WAIT_ACON:
+ default:
+ pulldown:
+ set |= OTG1_DP_PULLDOWN;
+ clr |= OTG1_DP_PULLUP;
+ break;
+ }
+
+ # define toggle(OTG,ISP) do { \
+ if (otg_ctrl & OTG) set |= ISP; \
+ else clr |= ISP; \
+ } while (0)
+
+ if (!(isp->phy.otg->host))
+ otg_ctrl &= ~OTG_DRV_VBUS;
+
+ switch (isp->phy.state) {
+ case OTG_STATE_A_SUSPEND:
+ if (otg_ctrl & OTG_DRV_VBUS) {
+ set |= OTG1_VBUS_DRV;
+ break;
+ }
+ /* HNP failed for some reason (A_AIDL_BDIS timeout) */
+ notresponding(isp);
+
+ /* FALLTHROUGH */
+ case OTG_STATE_A_VBUS_ERR:
+ isp->phy.state = OTG_STATE_A_WAIT_VFALL;
+ pr_debug(" --> a_wait_vfall\n");
+ /* FALLTHROUGH */
+ case OTG_STATE_A_WAIT_VFALL:
+ /* FIXME usbcore thinks port power is still on ... */
+ clr |= OTG1_VBUS_DRV;
+ break;
+ case OTG_STATE_A_IDLE:
+ if (otg_ctrl & OTG_DRV_VBUS) {
+ isp->phy.state = OTG_STATE_A_WAIT_VRISE;
+ pr_debug(" --> a_wait_vrise\n");
+ }
+ /* FALLTHROUGH */
+ default:
+ toggle(OTG_DRV_VBUS, OTG1_VBUS_DRV);
+ }
+
+ toggle(OTG_PU_VBUS, OTG1_VBUS_CHRG);
+ toggle(OTG_PD_VBUS, OTG1_VBUS_DISCHRG);
+
+ # undef toggle
+
+ isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, set);
+ isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, clr);
+
+ /* HNP switch to host or peripheral; and SRP */
+ if (otg_change & OTG_PULLUP) {
+ u32 l;
+
+ switch (isp->phy.state) {
+ case OTG_STATE_B_IDLE:
+ if (clr & OTG1_DP_PULLUP)
+ break;
+ isp->phy.state = OTG_STATE_B_PERIPHERAL;
+ pr_debug(" --> b_peripheral\n");
+ break;
+ case OTG_STATE_A_SUSPEND:
+ if (clr & OTG1_DP_PULLUP)
+ break;
+ isp->phy.state = OTG_STATE_A_PERIPHERAL;
+ pr_debug(" --> a_peripheral\n");
+ break;
+ default:
+ break;
+ }
+ l = omap_readl(OTG_CTRL);
+ l |= OTG_PULLUP;
+ omap_writel(l, OTG_CTRL);
+ }
+
+ check_state(isp, __func__);
+ dump_regs(isp, "otg->isp1301");
+ }
+
+ static irqreturn_t omap_otg_irq(int irq, void *_isp)
+ {
+ u16 otg_irq = omap_readw(OTG_IRQ_SRC);
+ u32 otg_ctrl;
+ int ret = IRQ_NONE;
+ struct isp1301 *isp = _isp;
+ struct usb_otg *otg = isp->phy.otg;
+
+ /* update ISP1301 transceiver from OTG controller */
+ if (otg_irq & OPRT_CHG) {
+ omap_writew(OPRT_CHG, OTG_IRQ_SRC);
+ isp1301_defer_work(isp, WORK_UPDATE_ISP);
+ ret = IRQ_HANDLED;
+
+ /* SRP to become b_peripheral failed */
+ } else if (otg_irq & B_SRP_TMROUT) {
+ pr_debug("otg: B_SRP_TIMEOUT, %06x\n", omap_readl(OTG_CTRL));
+ notresponding(isp);
+
+ /* gadget drivers that care should monitor all kinds of
+ * remote wakeup (SRP, normal) using their own timer
+ * to give "check cable and A-device" messages.
+ */
+ if (isp->phy.state == OTG_STATE_B_SRP_INIT)
+ b_idle(isp, "srp_timeout");
+
+ omap_writew(B_SRP_TMROUT, OTG_IRQ_SRC);
+ ret = IRQ_HANDLED;
+
+ /* HNP to become b_host failed */
+ } else if (otg_irq & B_HNP_FAIL) {
+ pr_debug("otg: %s B_HNP_FAIL, %06x\n",
+ state_name(isp), omap_readl(OTG_CTRL));
+ notresponding(isp);
+
+ otg_ctrl = omap_readl(OTG_CTRL);
+ otg_ctrl |= OTG_BUSDROP;
+ otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS;
+ omap_writel(otg_ctrl, OTG_CTRL);
+
+ /* subset of b_peripheral()... */
+ isp->phy.state = OTG_STATE_B_PERIPHERAL;
+ pr_debug(" --> b_peripheral\n");
+
+ omap_writew(B_HNP_FAIL, OTG_IRQ_SRC);
+ ret = IRQ_HANDLED;
+
+ /* detect SRP from B-device ... */
+ } else if (otg_irq & A_SRP_DETECT) {
+ pr_debug("otg: %s SRP_DETECT, %06x\n",
+ state_name(isp), omap_readl(OTG_CTRL));
+
+ isp1301_defer_work(isp, WORK_UPDATE_OTG);
+ switch (isp->phy.state) {
+ case OTG_STATE_A_IDLE:
+ if (!otg->host)
+ break;
+ isp1301_defer_work(isp, WORK_HOST_RESUME);
+ otg_ctrl = omap_readl(OTG_CTRL);
+ otg_ctrl |= OTG_A_BUSREQ;
+ otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ)
+ & ~OTG_XCEIV_INPUTS
+ & OTG_CTRL_MASK;
+ omap_writel(otg_ctrl, OTG_CTRL);
+ break;
+ default:
+ break;
+ }
+
+ omap_writew(A_SRP_DETECT, OTG_IRQ_SRC);
+ ret = IRQ_HANDLED;
+
+ /* timer expired: T(a_wait_bcon) and maybe T(a_wait_vrise)
+ * we don't track them separately
+ */
+ } else if (otg_irq & A_REQ_TMROUT) {
+ otg_ctrl = omap_readl(OTG_CTRL);
+ pr_info("otg: BCON_TMOUT from %s, %06x\n",
+ state_name(isp), otg_ctrl);
+ notresponding(isp);
+
+ otg_ctrl |= OTG_BUSDROP;
+ otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS;
+ omap_writel(otg_ctrl, OTG_CTRL);
+ isp->phy.state = OTG_STATE_A_WAIT_VFALL;
+
+ omap_writew(A_REQ_TMROUT, OTG_IRQ_SRC);
+ ret = IRQ_HANDLED;
+
+ /* A-supplied voltage fell too low; overcurrent */
+ } else if (otg_irq & A_VBUS_ERR) {
+ otg_ctrl = omap_readl(OTG_CTRL);
+ printk(KERN_ERR "otg: %s, VBUS_ERR %04x ctrl %06x\n",
+ state_name(isp), otg_irq, otg_ctrl);
+
+ otg_ctrl |= OTG_BUSDROP;
+ otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS;
+ omap_writel(otg_ctrl, OTG_CTRL);
+ isp->phy.state = OTG_STATE_A_VBUS_ERR;
+
+ omap_writew(A_VBUS_ERR, OTG_IRQ_SRC);
+ ret = IRQ_HANDLED;
+
+ /* switch driver; the transceiver code activates it,
+ * ungating the udc clock or resuming OHCI.
+ */
+ } else if (otg_irq & DRIVER_SWITCH) {
+ int kick = 0;
+
+ otg_ctrl = omap_readl(OTG_CTRL);
+ printk(KERN_NOTICE "otg: %s, SWITCH to %s, ctrl %06x\n",
+ state_name(isp),
+ (otg_ctrl & OTG_DRIVER_SEL)
+ ? "gadget" : "host",
+ otg_ctrl);
+ isp1301_defer_work(isp, WORK_UPDATE_ISP);
+
+ /* role is peripheral */
+ if (otg_ctrl & OTG_DRIVER_SEL) {
+ switch (isp->phy.state) {
+ case OTG_STATE_A_IDLE:
+ b_idle(isp, __func__);
+ break;
+ default:
+ break;
+ }
+ isp1301_defer_work(isp, WORK_UPDATE_ISP);
+
+ /* role is host */
+ } else {
+ if (!(otg_ctrl & OTG_ID)) {
+ otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS;
+ omap_writel(otg_ctrl | OTG_A_BUSREQ, OTG_CTRL);
+ }
+
+ if (otg->host) {
+ switch (isp->phy.state) {
+ case OTG_STATE_B_WAIT_ACON:
+ isp->phy.state = OTG_STATE_B_HOST;
+ pr_debug(" --> b_host\n");
+ kick = 1;
+ break;
+ case OTG_STATE_A_WAIT_BCON:
+ isp->phy.state = OTG_STATE_A_HOST;
+ pr_debug(" --> a_host\n");
+ break;
+ case OTG_STATE_A_PERIPHERAL:
+ isp->phy.state = OTG_STATE_A_WAIT_BCON;
+ pr_debug(" --> a_wait_bcon\n");
+ break;
+ default:
+ break;
+ }
+ isp1301_defer_work(isp, WORK_HOST_RESUME);
+ }
+ }
+
+ omap_writew(DRIVER_SWITCH, OTG_IRQ_SRC);
+ ret = IRQ_HANDLED;
+
+ if (kick)
+ usb_bus_start_enum(otg->host, otg->host->otg_port);
+ }
+
+ check_state(isp, __func__);
+ return ret;
+ }
+
+ static struct platform_device *otg_dev;
+
+ static int isp1301_otg_init(struct isp1301 *isp)
+ {
+ u32 l;
+
+ if (!otg_dev)
+ return -ENODEV;
+
+ dump_regs(isp, __func__);
+ /* some of these values are board-specific... */
+ l = omap_readl(OTG_SYSCON_2);
+ l |= OTG_EN
+ /* for B-device: */
+ | SRP_GPDATA /* 9msec Bdev D+ pulse */
+ | SRP_GPDVBUS /* discharge after VBUS pulse */
+ // | (3 << 24) /* 2msec VBUS pulse */
+ /* for A-device: */
+ | (0 << 20) /* 200ms nominal A_WAIT_VRISE timer */
+ | SRP_DPW /* detect 167+ns SRP pulses */
+ | SRP_DATA | SRP_VBUS /* accept both kinds of SRP pulse */
+ ;
+ omap_writel(l, OTG_SYSCON_2);
+
+ update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE));
+ update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS));
+
+ check_state(isp, __func__);
+ pr_debug("otg: %s, %s %06x\n",
+ state_name(isp), __func__, omap_readl(OTG_CTRL));
+
+ omap_writew(DRIVER_SWITCH | OPRT_CHG
+ | B_SRP_TMROUT | B_HNP_FAIL
+ | A_VBUS_ERR | A_SRP_DETECT | A_REQ_TMROUT, OTG_IRQ_EN);
+
+ l = omap_readl(OTG_SYSCON_2);
+ l |= OTG_EN;
+ omap_writel(l, OTG_SYSCON_2);
+
+ return 0;
+ }
+
+ static int otg_probe(struct platform_device *dev)
+ {
+ // struct omap_usb_config *config = dev->platform_data;
+
+ otg_dev = dev;
+ return 0;
+ }
+
+ static int otg_remove(struct platform_device *dev)
+ {
+ otg_dev = NULL;
+ return 0;
+ }
+
+ static struct platform_driver omap_otg_driver = {
+ .probe = otg_probe,
+ .remove = otg_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "omap_otg",
+ },
+ };
+
+ static int otg_bind(struct isp1301 *isp)
+ {
+ int status;
+
+ if (otg_dev)
+ return -EBUSY;
+
+ status = platform_driver_register(&omap_otg_driver);
+ if (status < 0)
+ return status;
+
+ if (otg_dev)
+ status = request_irq(otg_dev->resource[1].start, omap_otg_irq,
+ 0, DRIVER_NAME, isp);
+ else
+ status = -ENODEV;
+
+ if (status < 0)
+ platform_driver_unregister(&omap_otg_driver);
+ return status;
+ }
+
+ static void otg_unbind(struct isp1301 *isp)
+ {
+ if (!otg_dev)
+ return;
+ free_irq(otg_dev->resource[1].start, isp);
+ }
+
+ #else
+
+ /* OTG controller isn't clocked */
+
+ #endif /* CONFIG_USB_OTG */
+
+ /*-------------------------------------------------------------------------*/
+
+ static void b_peripheral(struct isp1301 *isp)
+ {
+ u32 l;
+
+ l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS;
+ omap_writel(l, OTG_CTRL);
+
+ usb_gadget_vbus_connect(isp->phy.otg->gadget);
+
+ #ifdef CONFIG_USB_OTG
+ enable_vbus_draw(isp, 8);
+ otg_update_isp(isp);
+ #else
+ enable_vbus_draw(isp, 100);
+ /* UDC driver just set OTG_BSESSVLD */
+ isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_DP_PULLUP);
+ isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_DP_PULLDOWN);
+ isp->phy.state = OTG_STATE_B_PERIPHERAL;
+ pr_debug(" --> b_peripheral\n");
+ dump_regs(isp, "2periph");
+ #endif
+ }
+
+ static void isp_update_otg(struct isp1301 *isp, u8 stat)
+ {
+ struct usb_otg *otg = isp->phy.otg;
+ u8 isp_stat, isp_bstat;
+ enum usb_otg_state state = isp->phy.state;
+
+ if (stat & INTR_BDIS_ACON)
+ pr_debug("OTG: BDIS_ACON, %s\n", state_name(isp));
+
+ /* start certain state transitions right away */
+ isp_stat = isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE);
+ if (isp_stat & INTR_ID_GND) {
+ if (otg->default_a) {
+ switch (state) {
+ case OTG_STATE_B_IDLE:
+ a_idle(isp, "idle");
+ /* FALLTHROUGH */
+ case OTG_STATE_A_IDLE:
+ enable_vbus_source(isp);
+ /* FALLTHROUGH */
+ case OTG_STATE_A_WAIT_VRISE:
+ /* we skip over OTG_STATE_A_WAIT_BCON, since
+ * the HC will transition to A_HOST (or
+ * A_SUSPEND!) without our noticing except
+ * when HNP is used.
+ */
+ if (isp_stat & INTR_VBUS_VLD)
+ isp->phy.state = OTG_STATE_A_HOST;
+ break;
+ case OTG_STATE_A_WAIT_VFALL:
+ if (!(isp_stat & INTR_SESS_VLD))
+ a_idle(isp, "vfell");
+ break;
+ default:
+ if (!(isp_stat & INTR_VBUS_VLD))
+ isp->phy.state = OTG_STATE_A_VBUS_ERR;
+ break;
+ }
+ isp_bstat = isp1301_get_u8(isp, ISP1301_OTG_STATUS);
+ } else {
+ switch (state) {
+ case OTG_STATE_B_PERIPHERAL:
+ case OTG_STATE_B_HOST:
+ case OTG_STATE_B_WAIT_ACON:
+ usb_gadget_vbus_disconnect(otg->gadget);
+ break;
+ default:
+ break;
+ }
+ if (state != OTG_STATE_A_IDLE)
+ a_idle(isp, "id");
+ if (otg->host && state == OTG_STATE_A_IDLE)
+ isp1301_defer_work(isp, WORK_HOST_RESUME);
+ isp_bstat = 0;
+ }
+ } else {
+ u32 l;
+
+ /* if user unplugged mini-A end of cable,
+ * don't bypass A_WAIT_VFALL.
+ */
+ if (otg->default_a) {
+ switch (state) {
+ default:
+ isp->phy.state = OTG_STATE_A_WAIT_VFALL;
+ break;
+ case OTG_STATE_A_WAIT_VFALL:
+ state = OTG_STATE_A_IDLE;
+ /* khubd may take a while to notice and
+ * handle this disconnect, so don't go
+ * to B_IDLE quite yet.
+ */
+ break;
+ case OTG_STATE_A_IDLE:
+ host_suspend(isp);
+ isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1,
+ MC1_BDIS_ACON_EN);
+ isp->phy.state = OTG_STATE_B_IDLE;
+ l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
+ l &= ~OTG_CTRL_BITS;
+ omap_writel(l, OTG_CTRL);
+ break;
+ case OTG_STATE_B_IDLE:
+ break;
+ }
+ }
+ isp_bstat = isp1301_get_u8(isp, ISP1301_OTG_STATUS);
+
+ switch (isp->phy.state) {
+ case OTG_STATE_B_PERIPHERAL:
+ case OTG_STATE_B_WAIT_ACON:
+ case OTG_STATE_B_HOST:
+ if (likely(isp_bstat & OTG_B_SESS_VLD))
+ break;
+ enable_vbus_draw(isp, 0);
+ #ifndef CONFIG_USB_OTG
+ /* UDC driver will clear OTG_BSESSVLD */
+ isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1,
+ OTG1_DP_PULLDOWN);
+ isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1,
+ OTG1_DP_PULLUP);
+ dump_regs(isp, __func__);
+ #endif
+ /* FALLTHROUGH */
+ case OTG_STATE_B_SRP_INIT:
+ b_idle(isp, __func__);
+ l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS;
+ omap_writel(l, OTG_CTRL);
+ /* FALLTHROUGH */
+ case OTG_STATE_B_IDLE:
+ if (otg->gadget && (isp_bstat & OTG_B_SESS_VLD)) {
+ #ifdef CONFIG_USB_OTG
+ update_otg1(isp, isp_stat);
+ update_otg2(isp, isp_bstat);
+ #endif
+ b_peripheral(isp);
+ } else if (!(isp_stat & (INTR_VBUS_VLD|INTR_SESS_VLD)))
+ isp_bstat |= OTG_B_SESS_END;
+ break;
+ case OTG_STATE_A_WAIT_VFALL:
+ break;
+ default:
+ pr_debug("otg: unsupported b-device %s\n",
+ state_name(isp));
+ break;
+ }
+ }
+
+ if (state != isp->phy.state)
+ pr_debug(" isp, %s -> %s\n",
+ usb_otg_state_string(state), state_name(isp));
+
+ #ifdef CONFIG_USB_OTG
+ /* update the OTG controller state to match the isp1301; may
+ * trigger OPRT_CHG irqs for changes going to the isp1301.
+ */
+ update_otg1(isp, isp_stat);
+ update_otg2(isp, isp_bstat);
+ check_state(isp, __func__);
+ #endif
+
+ dump_regs(isp, "isp1301->otg");
+ }
+
+ /*-------------------------------------------------------------------------*/
+
+ static u8 isp1301_clear_latch(struct isp1301 *isp)
+ {
+ u8 latch = isp1301_get_u8(isp, ISP1301_INTERRUPT_LATCH);
+ isp1301_clear_bits(isp, ISP1301_INTERRUPT_LATCH, latch);
+ return latch;
+ }
+
+ static void
+ isp1301_work(struct work_struct *work)
+ {
+ struct isp1301 *isp = container_of(work, struct isp1301, work);
+ int stop;
+
+ /* implicit lock: we're the only task using this device */
+ isp->working = 1;
+ do {
+ stop = test_bit(WORK_STOP, &isp->todo);
+
+ #ifdef CONFIG_USB_OTG
+ /* transfer state from otg engine to isp1301 */
+ if (test_and_clear_bit(WORK_UPDATE_ISP, &isp->todo)) {
+ otg_update_isp(isp);
+ put_device(&isp->client->dev);
+ }
+ #endif
+ /* transfer state from isp1301 to otg engine */
+ if (test_and_clear_bit(WORK_UPDATE_OTG, &isp->todo)) {
+ u8 stat = isp1301_clear_latch(isp);
+
+ isp_update_otg(isp, stat);
+ put_device(&isp->client->dev);
+ }
+
+ if (test_and_clear_bit(WORK_HOST_RESUME, &isp->todo)) {
+ u32 otg_ctrl;
+
+ /*
+ * skip A_WAIT_VRISE; hc transitions invisibly
+ * skip A_WAIT_BCON; same.
+ */
+ switch (isp->phy.state) {
+ case OTG_STATE_A_WAIT_BCON:
+ case OTG_STATE_A_WAIT_VRISE:
+ isp->phy.state = OTG_STATE_A_HOST;
+ pr_debug(" --> a_host\n");
+ otg_ctrl = omap_readl(OTG_CTRL);
+ otg_ctrl |= OTG_A_BUSREQ;
+ otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ)
+ & OTG_CTRL_MASK;
+ omap_writel(otg_ctrl, OTG_CTRL);
+ break;
+ case OTG_STATE_B_WAIT_ACON:
+ isp->phy.state = OTG_STATE_B_HOST;
+ pr_debug(" --> b_host (acon)\n");
+ break;
+ case OTG_STATE_B_HOST:
+ case OTG_STATE_B_IDLE:
+ case OTG_STATE_A_IDLE:
+ break;
+ default:
+ pr_debug(" host resume in %s\n",
+ state_name(isp));
+ }
+ host_resume(isp);
+ // mdelay(10);
+ put_device(&isp->client->dev);
+ }
+
+ if (test_and_clear_bit(WORK_TIMER, &isp->todo)) {
+ #ifdef VERBOSE
+ dump_regs(isp, "timer");
+ if (!stop)
+ mod_timer(&isp->timer, jiffies + TIMER_JIFFIES);
+ #endif
+ put_device(&isp->client->dev);
+ }
+
+ if (isp->todo)
+ dev_vdbg(&isp->client->dev,
+ "work done, todo = 0x%lx\n",
+ isp->todo);
+ if (stop) {
+ dev_dbg(&isp->client->dev, "stop\n");
+ break;
+ }
+ } while (isp->todo);
+ isp->working = 0;
+ }
+
+ static irqreturn_t isp1301_irq(int irq, void *isp)
+ {
+ isp1301_defer_work(isp, WORK_UPDATE_OTG);
+ return IRQ_HANDLED;
+ }
+
+ static void isp1301_timer(unsigned long _isp)
+ {
+ isp1301_defer_work((void *)_isp, WORK_TIMER);
+ }
+
+ /*-------------------------------------------------------------------------*/
+
+ static void isp1301_release(struct device *dev)
+ {
+ struct isp1301 *isp;
+
+ isp = dev_get_drvdata(dev);
+
+ /* FIXME -- not with a "new style" driver, it doesn't!! */
+
+ /* ugly -- i2c hijacks our memory hook to wait_for_completion() */
+ if (isp->i2c_release)
+ isp->i2c_release(dev);
+ kfree(isp->phy.otg);
+ kfree (isp);
+ }
+
+ static struct isp1301 *the_transceiver;
+
- .remove = __exit_p(isp1301_remove),
++static int isp1301_remove(struct i2c_client *i2c)
+ {
+ struct isp1301 *isp;
+
+ isp = i2c_get_clientdata(i2c);
+
+ isp1301_clear_bits(isp, ISP1301_INTERRUPT_FALLING, ~0);
+ isp1301_clear_bits(isp, ISP1301_INTERRUPT_RISING, ~0);
+ free_irq(i2c->irq, isp);
+ #ifdef CONFIG_USB_OTG
+ otg_unbind(isp);
+ #endif
+ if (machine_is_omap_h2())
+ gpio_free(2);
+
+ isp->timer.data = 0;
+ set_bit(WORK_STOP, &isp->todo);
+ del_timer_sync(&isp->timer);
+ flush_work(&isp->work);
+
+ put_device(&i2c->dev);
+ the_transceiver = NULL;
+
+ return 0;
+ }
+
+ /*-------------------------------------------------------------------------*/
+
+ /* NOTE: three modes are possible here, only one of which
+ * will be standards-conformant on any given system:
+ *
+ * - OTG mode (dual-role), required if there's a Mini-AB connector
+ * - HOST mode, for when there's one or more A (host) connectors
+ * - DEVICE mode, for when there's a B/Mini-B (device) connector
+ *
+ * As a rule, you won't have an isp1301 chip unless it's there to
+ * support the OTG mode. Other modes help testing USB controllers
+ * in isolation from (full) OTG support, or maybe so later board
+ * revisions can help to support those feature.
+ */
+
+ #ifdef CONFIG_USB_OTG
+
+ static int isp1301_otg_enable(struct isp1301 *isp)
+ {
+ power_up(isp);
+ isp1301_otg_init(isp);
+
+ /* NOTE: since we don't change this, this provides
+ * a few more interrupts than are strictly needed.
+ */
+ isp1301_set_bits(isp, ISP1301_INTERRUPT_RISING,
+ INTR_VBUS_VLD | INTR_SESS_VLD | INTR_ID_GND);
+ isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING,
+ INTR_VBUS_VLD | INTR_SESS_VLD | INTR_ID_GND);
+
+ dev_info(&isp->client->dev, "ready for dual-role USB ...\n");
+
+ return 0;
+ }
+
+ #endif
+
+ /* add or disable the host device+driver */
+ static int
+ isp1301_set_host(struct usb_otg *otg, struct usb_bus *host)
+ {
+ struct isp1301 *isp = container_of(otg->phy, struct isp1301, phy);
+
+ if (!otg || isp != the_transceiver)
+ return -ENODEV;
+
+ if (!host) {
+ omap_writew(0, OTG_IRQ_EN);
+ power_down(isp);
+ otg->host = NULL;
+ return 0;
+ }
+
+ #ifdef CONFIG_USB_OTG
+ otg->host = host;
+ dev_dbg(&isp->client->dev, "registered host\n");
+ host_suspend(isp);
+ if (otg->gadget)
+ return isp1301_otg_enable(isp);
+ return 0;
+
+ #elif !defined(CONFIG_USB_GADGET_OMAP)
+ // FIXME update its refcount
+ otg->host = host;
+
+ power_up(isp);
+
+ if (machine_is_omap_h2())
+ isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0);
+
+ dev_info(&isp->client->dev, "A-Host sessions ok\n");
+ isp1301_set_bits(isp, ISP1301_INTERRUPT_RISING,
+ INTR_ID_GND);
+ isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING,
+ INTR_ID_GND);
+
+ /* If this has a Mini-AB connector, this mode is highly
+ * nonstandard ... but can be handy for testing, especially with
+ * the Mini-A end of an OTG cable. (Or something nonstandard
+ * like MiniB-to-StandardB, maybe built with a gender mender.)
+ */
+ isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_VBUS_DRV);
+
+ dump_regs(isp, __func__);
+
+ return 0;
+
+ #else
+ dev_dbg(&isp->client->dev, "host sessions not allowed\n");
+ return -EINVAL;
+ #endif
+
+ }
+
+ static int
+ isp1301_set_peripheral(struct usb_otg *otg, struct usb_gadget *gadget)
+ {
+ struct isp1301 *isp = container_of(otg->phy, struct isp1301, phy);
+
+ if (!otg || isp != the_transceiver)
+ return -ENODEV;
+
+ if (!gadget) {
+ omap_writew(0, OTG_IRQ_EN);
+ if (!otg->default_a)
+ enable_vbus_draw(isp, 0);
+ usb_gadget_vbus_disconnect(otg->gadget);
+ otg->gadget = NULL;
+ power_down(isp);
+ return 0;
+ }
+
+ #ifdef CONFIG_USB_OTG
+ otg->gadget = gadget;
+ dev_dbg(&isp->client->dev, "registered gadget\n");
+ /* gadget driver may be suspended until vbus_connect () */
+ if (otg->host)
+ return isp1301_otg_enable(isp);
+ return 0;
+
+ #elif !defined(CONFIG_USB_OHCI_HCD) && !defined(CONFIG_USB_OHCI_HCD_MODULE)
+ otg->gadget = gadget;
+ // FIXME update its refcount
+
+ {
+ u32 l;
+
+ l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
+ l &= ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS);
+ l |= OTG_ID;
+ omap_writel(l, OTG_CTRL);
+ }
+
+ power_up(isp);
+ isp->phy.state = OTG_STATE_B_IDLE;
+
+ if (machine_is_omap_h2() || machine_is_omap_h3())
+ isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0);
+
+ isp1301_set_bits(isp, ISP1301_INTERRUPT_RISING,
+ INTR_SESS_VLD);
+ isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING,
+ INTR_VBUS_VLD);
+ dev_info(&isp->client->dev, "B-Peripheral sessions ok\n");
+ dump_regs(isp, __func__);
+
+ /* If this has a Mini-AB connector, this mode is highly
+ * nonstandard ... but can be handy for testing, so long
+ * as you don't plug a Mini-A cable into the jack.
+ */
+ if (isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE) & INTR_VBUS_VLD)
+ b_peripheral(isp);
+
+ return 0;
+
+ #else
+ dev_dbg(&isp->client->dev, "peripheral sessions not allowed\n");
+ return -EINVAL;
+ #endif
+ }
+
+
+ /*-------------------------------------------------------------------------*/
+
+ static int
+ isp1301_set_power(struct usb_phy *dev, unsigned mA)
+ {
+ if (!the_transceiver)
+ return -ENODEV;
+ if (dev->state == OTG_STATE_B_PERIPHERAL)
+ enable_vbus_draw(the_transceiver, mA);
+ return 0;
+ }
+
+ static int
+ isp1301_start_srp(struct usb_otg *otg)
+ {
+ struct isp1301 *isp = container_of(otg->phy, struct isp1301, phy);
+ u32 otg_ctrl;
+
+ if (!otg || isp != the_transceiver
+ || isp->phy.state != OTG_STATE_B_IDLE)
+ return -ENODEV;
+
+ otg_ctrl = omap_readl(OTG_CTRL);
+ if (!(otg_ctrl & OTG_BSESSEND))
+ return -EINVAL;
+
+ otg_ctrl |= OTG_B_BUSREQ;
+ otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK;
+ omap_writel(otg_ctrl, OTG_CTRL);
+ isp->phy.state = OTG_STATE_B_SRP_INIT;
+
+ pr_debug("otg: SRP, %s ... %06x\n", state_name(isp),
+ omap_readl(OTG_CTRL));
+ #ifdef CONFIG_USB_OTG
+ check_state(isp, __func__);
+ #endif
+ return 0;
+ }
+
+ static int
+ isp1301_start_hnp(struct usb_otg *otg)
+ {
+ #ifdef CONFIG_USB_OTG
+ struct isp1301 *isp = container_of(otg->phy, struct isp1301, phy);
+ u32 l;
+
+ if (!otg || isp != the_transceiver)
+ return -ENODEV;
+ if (otg->default_a && (otg->host == NULL || !otg->host->b_hnp_enable))
+ return -ENOTCONN;
+ if (!otg->default_a && (otg->gadget == NULL
+ || !otg->gadget->b_hnp_enable))
+ return -ENOTCONN;
+
+ /* We want hardware to manage most HNP protocol timings.
+ * So do this part as early as possible...
+ */
+ switch (isp->phy.state) {
+ case OTG_STATE_B_HOST:
+ isp->phy.state = OTG_STATE_B_PERIPHERAL;
+ /* caller will suspend next */
+ break;
+ case OTG_STATE_A_HOST:
+ #if 0
+ /* autoconnect mode avoids irq latency bugs */
+ isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1,
+ MC1_BDIS_ACON_EN);
+ #endif
+ /* caller must suspend then clear A_BUSREQ */
+ usb_gadget_vbus_connect(otg->gadget);
+ l = omap_readl(OTG_CTRL);
+ l |= OTG_A_SETB_HNPEN;
+ omap_writel(l, OTG_CTRL);
+
+ break;
+ case OTG_STATE_A_PERIPHERAL:
+ /* initiated by B-Host suspend */
+ break;
+ default:
+ return -EILSEQ;
+ }
+ pr_debug("otg: HNP %s, %06x ...\n",
+ state_name(isp), omap_readl(OTG_CTRL));
+ check_state(isp, __func__);
+ return 0;
+ #else
+ /* srp-only */
+ return -EINVAL;
+ #endif
+ }
+
+ /*-------------------------------------------------------------------------*/
+
+ static int
+ isp1301_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+ {
+ int status;
+ struct isp1301 *isp;
+
+ if (the_transceiver)
+ return 0;
+
+ isp = kzalloc(sizeof *isp, GFP_KERNEL);
+ if (!isp)
+ return 0;
+
+ isp->phy.otg = kzalloc(sizeof *isp->phy.otg, GFP_KERNEL);
+ if (!isp->phy.otg) {
+ kfree(isp);
+ return 0;
+ }
+
+ INIT_WORK(&isp->work, isp1301_work);
+ init_timer(&isp->timer);
+ isp->timer.function = isp1301_timer;
+ isp->timer.data = (unsigned long) isp;
+
+ i2c_set_clientdata(i2c, isp);
+ isp->client = i2c;
+
+ /* verify the chip (shouldn't be necessary) */
+ status = isp1301_get_u16(isp, ISP1301_VENDOR_ID);
+ if (status != I2C_VENDOR_ID_PHILIPS) {
+ dev_dbg(&i2c->dev, "not philips id: %d\n", status);
+ goto fail;
+ }
+ status = isp1301_get_u16(isp, ISP1301_PRODUCT_ID);
+ if (status != I2C_PRODUCT_ID_PHILIPS_1301) {
+ dev_dbg(&i2c->dev, "not isp1301, %d\n", status);
+ goto fail;
+ }
+ isp->i2c_release = i2c->dev.release;
+ i2c->dev.release = isp1301_release;
+
+ /* initial development used chiprev 2.00 */
+ status = i2c_smbus_read_word_data(i2c, ISP1301_BCD_DEVICE);
+ dev_info(&i2c->dev, "chiprev %x.%02x, driver " DRIVER_VERSION "\n",
+ status >> 8, status & 0xff);
+
+ /* make like power-on reset */
+ isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_MASK);
+
+ isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_BI_DI);
+ isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, ~MC2_BI_DI);
+
+ isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1,
+ OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN);
+ isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1,
+ ~(OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN));
+
+ isp1301_clear_bits(isp, ISP1301_INTERRUPT_LATCH, ~0);
+ isp1301_clear_bits(isp, ISP1301_INTERRUPT_FALLING, ~0);
+ isp1301_clear_bits(isp, ISP1301_INTERRUPT_RISING, ~0);
+
+ #ifdef CONFIG_USB_OTG
+ status = otg_bind(isp);
+ if (status < 0) {
+ dev_dbg(&i2c->dev, "can't bind OTG\n");
+ goto fail;
+ }
+ #endif
+
+ if (machine_is_omap_h2()) {
+ /* full speed signaling by default */
+ isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1,
+ MC1_SPEED);
+ isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2,
+ MC2_SPD_SUSP_CTRL);
+
+ /* IRQ wired at M14 */
+ omap_cfg_reg(M14_1510_GPIO2);
+ if (gpio_request(2, "isp1301") == 0)
+ gpio_direction_input(2);
+ isp->irq_type = IRQF_TRIGGER_FALLING;
+ }
+
+ status = request_irq(i2c->irq, isp1301_irq,
+ isp->irq_type, DRIVER_NAME, isp);
+ if (status < 0) {
+ dev_dbg(&i2c->dev, "can't get IRQ %d, err %d\n",
+ i2c->irq, status);
+ goto fail;
+ }
+
+ isp->phy.dev = &i2c->dev;
+ isp->phy.label = DRIVER_NAME;
+ isp->phy.set_power = isp1301_set_power,
+
+ isp->phy.otg->phy = &isp->phy;
+ isp->phy.otg->set_host = isp1301_set_host,
+ isp->phy.otg->set_peripheral = isp1301_set_peripheral,
+ isp->phy.otg->start_srp = isp1301_start_srp,
+ isp->phy.otg->start_hnp = isp1301_start_hnp,
+
+ enable_vbus_draw(isp, 0);
+ power_down(isp);
+ the_transceiver = isp;
+
+ #ifdef CONFIG_USB_OTG
+ update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE));
+ update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS));
+ #endif
+
+ dump_regs(isp, __func__);
+
+ #ifdef VERBOSE
+ mod_timer(&isp->timer, jiffies + TIMER_JIFFIES);
+ dev_dbg(&i2c->dev, "scheduled timer, %d min\n", TIMER_MINUTES);
+ #endif
+
+ status = usb_add_phy(&isp->phy, USB_PHY_TYPE_USB2);
+ if (status < 0)
+ dev_err(&i2c->dev, "can't register transceiver, %d\n",
+ status);
+
+ return 0;
+
+ fail:
+ kfree(isp->phy.otg);
+ kfree(isp);
+ return -ENODEV;
+ }
+
+ static const struct i2c_device_id isp1301_id[] = {
+ { "isp1301_omap", 0 },
+ { }
+ };
+ MODULE_DEVICE_TABLE(i2c, isp1301_id);
+
+ static struct i2c_driver isp1301_driver = {
+ .driver = {
+ .name = "isp1301_omap",
+ },
+ .probe = isp1301_probe,
++ .remove = isp1301_remove,
+ .id_table = isp1301_id,
+ };
+
+ /*-------------------------------------------------------------------------*/
+
+ static int __init isp_init(void)
+ {
+ return i2c_add_driver(&isp1301_driver);
+ }
+ subsys_initcall(isp_init);
+
+ static void __exit isp_exit(void)
+ {
+ if (the_transceiver)
+ usb_remove_phy(&the_transceiver->phy);
+ i2c_del_driver(&isp1301_driver);
+ }
+ module_exit(isp_exit);
+
--- /dev/null
-static int __exit mv_u3d_phy_remove(struct platform_device *pdev)
+ /*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+ #include <linux/clk.h>
+ #include <linux/delay.h>
+ #include <linux/err.h>
+ #include <linux/io.h>
+ #include <linux/usb/otg.h>
+ #include <linux/platform_data/mv_usb.h>
+
+ #include "phy-mv-u3d-usb.h"
+
+ /*
+ * struct mv_u3d_phy - transceiver driver state
+ * @phy: transceiver structure
+ * @dev: The parent device supplied to the probe function
+ * @clk: usb phy clock
+ * @base: usb phy register memory base
+ */
+ struct mv_u3d_phy {
+ struct usb_phy phy;
+ struct mv_usb_platform_data *plat;
+ struct device *dev;
+ struct clk *clk;
+ void __iomem *base;
+ };
+
+ static u32 mv_u3d_phy_read(void __iomem *base, u32 reg)
+ {
+ void __iomem *addr, *data;
+
+ addr = base;
+ data = base + 0x4;
+
+ writel_relaxed(reg, addr);
+ return readl_relaxed(data);
+ }
+
+ static void mv_u3d_phy_set(void __iomem *base, u32 reg, u32 value)
+ {
+ void __iomem *addr, *data;
+ u32 tmp;
+
+ addr = base;
+ data = base + 0x4;
+
+ writel_relaxed(reg, addr);
+ tmp = readl_relaxed(data);
+ tmp |= value;
+ writel_relaxed(tmp, data);
+ }
+
+ static void mv_u3d_phy_clear(void __iomem *base, u32 reg, u32 value)
+ {
+ void __iomem *addr, *data;
+ u32 tmp;
+
+ addr = base;
+ data = base + 0x4;
+
+ writel_relaxed(reg, addr);
+ tmp = readl_relaxed(data);
+ tmp &= ~value;
+ writel_relaxed(tmp, data);
+ }
+
+ static void mv_u3d_phy_write(void __iomem *base, u32 reg, u32 value)
+ {
+ void __iomem *addr, *data;
+
+ addr = base;
+ data = base + 0x4;
+
+ writel_relaxed(reg, addr);
+ writel_relaxed(value, data);
+ }
+
+ void mv_u3d_phy_shutdown(struct usb_phy *phy)
+ {
+ struct mv_u3d_phy *mv_u3d_phy;
+ void __iomem *base;
+ u32 val;
+
+ mv_u3d_phy = container_of(phy, struct mv_u3d_phy, phy);
+ base = mv_u3d_phy->base;
+
+ /* Power down Reference Analog current, bit 15
+ * Power down PLL, bit 14
+ * Power down Receiver, bit 13
+ * Power down Transmitter, bit 12
+ * of USB3_POWER_PLL_CONTROL register
+ */
+ val = mv_u3d_phy_read(base, USB3_POWER_PLL_CONTROL);
+ val &= ~(USB3_POWER_PLL_CONTROL_PU);
+ mv_u3d_phy_write(base, USB3_POWER_PLL_CONTROL, val);
+
+ if (mv_u3d_phy->clk)
+ clk_disable(mv_u3d_phy->clk);
+ }
+
+ static int mv_u3d_phy_init(struct usb_phy *phy)
+ {
+ struct mv_u3d_phy *mv_u3d_phy;
+ void __iomem *base;
+ u32 val, count;
+
+ /* enable usb3 phy */
+ mv_u3d_phy = container_of(phy, struct mv_u3d_phy, phy);
+
+ if (mv_u3d_phy->clk)
+ clk_enable(mv_u3d_phy->clk);
+
+ base = mv_u3d_phy->base;
+
+ val = mv_u3d_phy_read(base, USB3_POWER_PLL_CONTROL);
+ val &= ~(USB3_POWER_PLL_CONTROL_PU_MASK);
+ val |= 0xF << USB3_POWER_PLL_CONTROL_PU_SHIFT;
+ mv_u3d_phy_write(base, USB3_POWER_PLL_CONTROL, val);
+ udelay(100);
+
+ mv_u3d_phy_write(base, USB3_RESET_CONTROL,
+ USB3_RESET_CONTROL_RESET_PIPE);
+ udelay(100);
+
+ mv_u3d_phy_write(base, USB3_RESET_CONTROL,
+ USB3_RESET_CONTROL_RESET_PIPE
+ | USB3_RESET_CONTROL_RESET_PHY);
+ udelay(100);
+
+ val = mv_u3d_phy_read(base, USB3_POWER_PLL_CONTROL);
+ val &= ~(USB3_POWER_PLL_CONTROL_REF_FREF_SEL_MASK
+ | USB3_POWER_PLL_CONTROL_PHY_MODE_MASK);
+ val |= (USB3_PLL_25MHZ << USB3_POWER_PLL_CONTROL_REF_FREF_SEL_SHIFT)
+ | (0x5 << USB3_POWER_PLL_CONTROL_PHY_MODE_SHIFT);
+ mv_u3d_phy_write(base, USB3_POWER_PLL_CONTROL, val);
+ udelay(100);
+
+ mv_u3d_phy_clear(base, USB3_KVCO_CALI_CONTROL,
+ USB3_KVCO_CALI_CONTROL_USE_MAX_PLL_RATE_MASK);
+ udelay(100);
+
+ val = mv_u3d_phy_read(base, USB3_SQUELCH_FFE);
+ val &= ~(USB3_SQUELCH_FFE_FFE_CAP_SEL_MASK
+ | USB3_SQUELCH_FFE_FFE_RES_SEL_MASK
+ | USB3_SQUELCH_FFE_SQ_THRESH_IN_MASK);
+ val |= ((0xD << USB3_SQUELCH_FFE_FFE_CAP_SEL_SHIFT)
+ | (0x7 << USB3_SQUELCH_FFE_FFE_RES_SEL_SHIFT)
+ | (0x8 << USB3_SQUELCH_FFE_SQ_THRESH_IN_SHIFT));
+ mv_u3d_phy_write(base, USB3_SQUELCH_FFE, val);
+ udelay(100);
+
+ val = mv_u3d_phy_read(base, USB3_GEN1_SET0);
+ val &= ~USB3_GEN1_SET0_G1_TX_SLEW_CTRL_EN_MASK;
+ val |= 1 << USB3_GEN1_SET0_G1_TX_EMPH_EN_SHIFT;
+ mv_u3d_phy_write(base, USB3_GEN1_SET0, val);
+ udelay(100);
+
+ val = mv_u3d_phy_read(base, USB3_GEN2_SET0);
+ val &= ~(USB3_GEN2_SET0_G2_TX_AMP_MASK
+ | USB3_GEN2_SET0_G2_TX_EMPH_AMP_MASK
+ | USB3_GEN2_SET0_G2_TX_SLEW_CTRL_EN_MASK);
+ val |= ((0x14 << USB3_GEN2_SET0_G2_TX_AMP_SHIFT)
+ | (1 << USB3_GEN2_SET0_G2_TX_AMP_ADJ_SHIFT)
+ | (0xA << USB3_GEN2_SET0_G2_TX_EMPH_AMP_SHIFT)
+ | (1 << USB3_GEN2_SET0_G2_TX_EMPH_EN_SHIFT));
+ mv_u3d_phy_write(base, USB3_GEN2_SET0, val);
+ udelay(100);
+
+ mv_u3d_phy_read(base, USB3_TX_EMPPH);
+ val &= ~(USB3_TX_EMPPH_AMP_MASK
+ | USB3_TX_EMPPH_EN_MASK
+ | USB3_TX_EMPPH_AMP_FORCE_MASK
+ | USB3_TX_EMPPH_PAR1_MASK
+ | USB3_TX_EMPPH_PAR2_MASK);
+ val |= ((0xB << USB3_TX_EMPPH_AMP_SHIFT)
+ | (1 << USB3_TX_EMPPH_EN_SHIFT)
+ | (1 << USB3_TX_EMPPH_AMP_FORCE_SHIFT)
+ | (0x1C << USB3_TX_EMPPH_PAR1_SHIFT)
+ | (1 << USB3_TX_EMPPH_PAR2_SHIFT));
+
+ mv_u3d_phy_write(base, USB3_TX_EMPPH, val);
+ udelay(100);
+
+ val = mv_u3d_phy_read(base, USB3_GEN2_SET1);
+ val &= ~(USB3_GEN2_SET1_G2_RX_SELMUPI_MASK
+ | USB3_GEN2_SET1_G2_RX_SELMUPF_MASK
+ | USB3_GEN2_SET1_G2_RX_SELMUFI_MASK
+ | USB3_GEN2_SET1_G2_RX_SELMUFF_MASK);
+ val |= ((1 << USB3_GEN2_SET1_G2_RX_SELMUPI_SHIFT)
+ | (1 << USB3_GEN2_SET1_G2_RX_SELMUPF_SHIFT)
+ | (1 << USB3_GEN2_SET1_G2_RX_SELMUFI_SHIFT)
+ | (1 << USB3_GEN2_SET1_G2_RX_SELMUFF_SHIFT));
+ mv_u3d_phy_write(base, USB3_GEN2_SET1, val);
+ udelay(100);
+
+ val = mv_u3d_phy_read(base, USB3_DIGITAL_LOOPBACK_EN);
+ val &= ~USB3_DIGITAL_LOOPBACK_EN_SEL_BITS_MASK;
+ val |= 1 << USB3_DIGITAL_LOOPBACK_EN_SEL_BITS_SHIFT;
+ mv_u3d_phy_write(base, USB3_DIGITAL_LOOPBACK_EN, val);
+ udelay(100);
+
+ val = mv_u3d_phy_read(base, USB3_IMPEDANCE_TX_SSC);
+ val &= ~USB3_IMPEDANCE_TX_SSC_SSC_AMP_MASK;
+ val |= 0xC << USB3_IMPEDANCE_TX_SSC_SSC_AMP_SHIFT;
+ mv_u3d_phy_write(base, USB3_IMPEDANCE_TX_SSC, val);
+ udelay(100);
+
+ val = mv_u3d_phy_read(base, USB3_IMPEDANCE_CALI_CTRL);
+ val &= ~USB3_IMPEDANCE_CALI_CTRL_IMP_CAL_THR_MASK;
+ val |= 0x4 << USB3_IMPEDANCE_CALI_CTRL_IMP_CAL_THR_SHIFT;
+ mv_u3d_phy_write(base, USB3_IMPEDANCE_CALI_CTRL, val);
+ udelay(100);
+
+ val = mv_u3d_phy_read(base, USB3_PHY_ISOLATION_MODE);
+ val &= ~(USB3_PHY_ISOLATION_MODE_PHY_GEN_RX_MASK
+ | USB3_PHY_ISOLATION_MODE_PHY_GEN_TX_MASK
+ | USB3_PHY_ISOLATION_MODE_TX_DRV_IDLE_MASK);
+ val |= ((1 << USB3_PHY_ISOLATION_MODE_PHY_GEN_RX_SHIFT)
+ | (1 << USB3_PHY_ISOLATION_MODE_PHY_GEN_TX_SHIFT));
+ mv_u3d_phy_write(base, USB3_PHY_ISOLATION_MODE, val);
+ udelay(100);
+
+ val = mv_u3d_phy_read(base, USB3_TXDETRX);
+ val &= ~(USB3_TXDETRX_VTHSEL_MASK);
+ val |= 0x1 << USB3_TXDETRX_VTHSEL_SHIFT;
+ mv_u3d_phy_write(base, USB3_TXDETRX, val);
+ udelay(100);
+
+ dev_dbg(mv_u3d_phy->dev, "start calibration\n");
+
+ calstart:
+ /* Perform Manual Calibration */
+ mv_u3d_phy_set(base, USB3_KVCO_CALI_CONTROL,
+ 1 << USB3_KVCO_CALI_CONTROL_CAL_START_SHIFT);
+
+ mdelay(1);
+
+ count = 0;
+ while (1) {
+ val = mv_u3d_phy_read(base, USB3_KVCO_CALI_CONTROL);
+ if (val & (1 << USB3_KVCO_CALI_CONTROL_CAL_DONE_SHIFT))
+ break;
+ else if (count > 50) {
+ dev_dbg(mv_u3d_phy->dev, "calibration failure, retry...\n");
+ goto calstart;
+ }
+ count++;
+ mdelay(1);
+ }
+
+ /* active PIPE interface */
+ mv_u3d_phy_write(base, USB3_PIPE_SM_CTRL,
+ 1 << USB3_PIPE_SM_CTRL_PHY_INIT_DONE);
+
+ return 0;
+ }
+
+ static int mv_u3d_phy_probe(struct platform_device *pdev)
+ {
+ struct mv_u3d_phy *mv_u3d_phy;
+ struct mv_usb_platform_data *pdata;
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ void __iomem *phy_base;
+ int ret;
+
+ pdata = pdev->dev.platform_data;
+ if (!pdata) {
+ dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
+ return -EINVAL;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(dev, "missing mem resource\n");
+ return -ENODEV;
+ }
+
+ phy_base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(phy_base))
+ return PTR_ERR(phy_base);
+
+ mv_u3d_phy = devm_kzalloc(dev, sizeof(*mv_u3d_phy), GFP_KERNEL);
+ if (!mv_u3d_phy)
+ return -ENOMEM;
+
+ mv_u3d_phy->dev = &pdev->dev;
+ mv_u3d_phy->plat = pdata;
+ mv_u3d_phy->base = phy_base;
+ mv_u3d_phy->phy.dev = mv_u3d_phy->dev;
+ mv_u3d_phy->phy.label = "mv-u3d-phy";
+ mv_u3d_phy->phy.init = mv_u3d_phy_init;
+ mv_u3d_phy->phy.shutdown = mv_u3d_phy_shutdown;
+
+ ret = usb_add_phy(&mv_u3d_phy->phy, USB_PHY_TYPE_USB3);
+ if (ret)
+ goto err;
+
+ if (!mv_u3d_phy->clk)
+ mv_u3d_phy->clk = clk_get(mv_u3d_phy->dev, "u3dphy");
+
+ platform_set_drvdata(pdev, mv_u3d_phy);
+
+ dev_info(&pdev->dev, "Initialized Marvell USB 3.0 PHY\n");
+ err:
+ return ret;
+ }
+
++static int mv_u3d_phy_remove(struct platform_device *pdev)
+ {
+ struct mv_u3d_phy *mv_u3d_phy = platform_get_drvdata(pdev);
+
+ usb_remove_phy(&mv_u3d_phy->phy);
+
+ if (mv_u3d_phy->clk) {
+ clk_put(mv_u3d_phy->clk);
+ mv_u3d_phy->clk = NULL;
+ }
+
+ return 0;
+ }
+
+ static struct platform_driver mv_u3d_phy_driver = {
+ .probe = mv_u3d_phy_probe,
+ .remove = mv_u3d_phy_remove,
+ .driver = {
+ .name = "mv-u3d-phy",
+ .owner = THIS_MODULE,
+ },
+ };
+
+ module_platform_driver(mv_u3d_phy_driver);
+ MODULE_DESCRIPTION("Marvell USB 3.0 PHY controller");
+ MODULE_AUTHOR("Yu Xu <yuxu@marvell.com>");
+ MODULE_LICENSE("GPL");
+ MODULE_ALIAS("platform:mv-u3d-phy");
--- /dev/null
-static int __exit twl4030_usb_remove(struct platform_device *pdev)
+ /*
+ * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
+ *
+ * Copyright (C) 2004-2007 Texas Instruments
+ * Copyright (C) 2008 Nokia Corporation
+ * Contact: Felipe Balbi <felipe.balbi@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Current status:
+ * - HS USB ULPI mode works.
+ * - 3-pin mode support may be added in future.
+ */
+
+ #include <linux/module.h>
+ #include <linux/init.h>
+ #include <linux/interrupt.h>
+ #include <linux/platform_device.h>
+ #include <linux/spinlock.h>
+ #include <linux/workqueue.h>
+ #include <linux/io.h>
+ #include <linux/delay.h>
+ #include <linux/usb/otg.h>
+ #include <linux/usb/musb-omap.h>
+ #include <linux/usb/ulpi.h>
+ #include <linux/i2c/twl.h>
+ #include <linux/regulator/consumer.h>
+ #include <linux/err.h>
+ #include <linux/slab.h>
+
+ /* Register defines */
+
+ #define MCPC_CTRL 0x30
+ #define MCPC_CTRL_RTSOL (1 << 7)
+ #define MCPC_CTRL_EXTSWR (1 << 6)
+ #define MCPC_CTRL_EXTSWC (1 << 5)
+ #define MCPC_CTRL_VOICESW (1 << 4)
+ #define MCPC_CTRL_OUT64K (1 << 3)
+ #define MCPC_CTRL_RTSCTSSW (1 << 2)
+ #define MCPC_CTRL_HS_UART (1 << 0)
+
+ #define MCPC_IO_CTRL 0x33
+ #define MCPC_IO_CTRL_MICBIASEN (1 << 5)
+ #define MCPC_IO_CTRL_CTS_NPU (1 << 4)
+ #define MCPC_IO_CTRL_RXD_PU (1 << 3)
+ #define MCPC_IO_CTRL_TXDTYP (1 << 2)
+ #define MCPC_IO_CTRL_CTSTYP (1 << 1)
+ #define MCPC_IO_CTRL_RTSTYP (1 << 0)
+
+ #define MCPC_CTRL2 0x36
+ #define MCPC_CTRL2_MCPC_CK_EN (1 << 0)
+
+ #define OTHER_FUNC_CTRL 0x80
+ #define OTHER_FUNC_CTRL_BDIS_ACON_EN (1 << 4)
+ #define OTHER_FUNC_CTRL_FIVEWIRE_MODE (1 << 2)
+
+ #define OTHER_IFC_CTRL 0x83
+ #define OTHER_IFC_CTRL_OE_INT_EN (1 << 6)
+ #define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5)
+ #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN (1 << 4)
+ #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT (1 << 3)
+ #define OTHER_IFC_CTRL_HIZ_ULPI (1 << 2)
+ #define OTHER_IFC_CTRL_ALT_INT_REROUTE (1 << 0)
+
+ #define OTHER_INT_EN_RISE 0x86
+ #define OTHER_INT_EN_FALL 0x89
+ #define OTHER_INT_STS 0x8C
+ #define OTHER_INT_LATCH 0x8D
+ #define OTHER_INT_VB_SESS_VLD (1 << 7)
+ #define OTHER_INT_DM_HI (1 << 6) /* not valid for "latch" reg */
+ #define OTHER_INT_DP_HI (1 << 5) /* not valid for "latch" reg */
+ #define OTHER_INT_BDIS_ACON (1 << 3) /* not valid for "fall" regs */
+ #define OTHER_INT_MANU (1 << 1)
+ #define OTHER_INT_ABNORMAL_STRESS (1 << 0)
+
+ #define ID_STATUS 0x96
+ #define ID_RES_FLOAT (1 << 4)
+ #define ID_RES_440K (1 << 3)
+ #define ID_RES_200K (1 << 2)
+ #define ID_RES_102K (1 << 1)
+ #define ID_RES_GND (1 << 0)
+
+ #define POWER_CTRL 0xAC
+ #define POWER_CTRL_OTG_ENAB (1 << 5)
+
+ #define OTHER_IFC_CTRL2 0xAF
+ #define OTHER_IFC_CTRL2_ULPI_STP_LOW (1 << 4)
+ #define OTHER_IFC_CTRL2_ULPI_TXEN_POL (1 << 3)
+ #define OTHER_IFC_CTRL2_ULPI_4PIN_2430 (1 << 2)
+ #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */
+ #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N (0 << 0)
+ #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N (1 << 0)
+
+ #define REG_CTRL_EN 0xB2
+ #define REG_CTRL_ERROR 0xB5
+ #define ULPI_I2C_CONFLICT_INTEN (1 << 0)
+
+ #define OTHER_FUNC_CTRL2 0xB8
+ #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN (1 << 0)
+
+ /* following registers do not have separate _clr and _set registers */
+ #define VBUS_DEBOUNCE 0xC0
+ #define ID_DEBOUNCE 0xC1
+ #define VBAT_TIMER 0xD3
+ #define PHY_PWR_CTRL 0xFD
+ #define PHY_PWR_PHYPWD (1 << 0)
+ #define PHY_CLK_CTRL 0xFE
+ #define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2)
+ #define PHY_CLK_CTRL_CLK32K_EN (1 << 1)
+ #define REQ_PHY_DPLL_CLK (1 << 0)
+ #define PHY_CLK_CTRL_STS 0xFF
+ #define PHY_DPLL_CLK (1 << 0)
+
+ /* In module TWL_MODULE_PM_MASTER */
+ #define STS_HW_CONDITIONS 0x0F
+
+ /* In module TWL_MODULE_PM_RECEIVER */
+ #define VUSB_DEDICATED1 0x7D
+ #define VUSB_DEDICATED2 0x7E
+ #define VUSB1V5_DEV_GRP 0x71
+ #define VUSB1V5_TYPE 0x72
+ #define VUSB1V5_REMAP 0x73
+ #define VUSB1V8_DEV_GRP 0x74
+ #define VUSB1V8_TYPE 0x75
+ #define VUSB1V8_REMAP 0x76
+ #define VUSB3V1_DEV_GRP 0x77
+ #define VUSB3V1_TYPE 0x78
+ #define VUSB3V1_REMAP 0x79
+
+ /* In module TWL4030_MODULE_INTBR */
+ #define PMBR1 0x0D
+ #define GPIO_USB_4PIN_ULPI_2430C (3 << 0)
+
+ struct twl4030_usb {
+ struct usb_phy phy;
+ struct device *dev;
+
+ /* TWL4030 internal USB regulator supplies */
+ struct regulator *usb1v5;
+ struct regulator *usb1v8;
+ struct regulator *usb3v1;
+
+ /* for vbus reporting with irqs disabled */
+ spinlock_t lock;
+
+ /* pin configuration */
+ enum twl4030_usb_mode usb_mode;
+
+ int irq;
+ enum omap_musb_vbus_id_status linkstat;
+ bool vbus_supplied;
+ u8 asleep;
+ bool irq_enabled;
+
+ struct delayed_work id_workaround_work;
+ };
+
+ /* internal define on top of container_of */
+ #define phy_to_twl(x) container_of((x), struct twl4030_usb, phy)
+
+ /*-------------------------------------------------------------------------*/
+
+ static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
+ u8 module, u8 data, u8 address)
+ {
+ u8 check;
+
+ if ((twl_i2c_write_u8(module, data, address) >= 0) &&
+ (twl_i2c_read_u8(module, &check, address) >= 0) &&
+ (check == data))
+ return 0;
+ dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
+ 1, module, address, check, data);
+
+ /* Failed once: Try again */
+ if ((twl_i2c_write_u8(module, data, address) >= 0) &&
+ (twl_i2c_read_u8(module, &check, address) >= 0) &&
+ (check == data))
+ return 0;
+ dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
+ 2, module, address, check, data);
+
+ /* Failed again: Return error */
+ return -EBUSY;
+ }
+
+ #define twl4030_usb_write_verify(twl, address, data) \
+ twl4030_i2c_write_u8_verify(twl, TWL_MODULE_USB, (data), (address))
+
+ static inline int twl4030_usb_write(struct twl4030_usb *twl,
+ u8 address, u8 data)
+ {
+ int ret = 0;
+
+ ret = twl_i2c_write_u8(TWL_MODULE_USB, data, address);
+ if (ret < 0)
+ dev_dbg(twl->dev,
+ "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
+ return ret;
+ }
+
+ static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
+ {
+ u8 data;
+ int ret = 0;
+
+ ret = twl_i2c_read_u8(module, &data, address);
+ if (ret >= 0)
+ ret = data;
+ else
+ dev_dbg(twl->dev,
+ "TWL4030:readb[0x%x,0x%x] Error %d\n",
+ module, address, ret);
+
+ return ret;
+ }
+
+ static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
+ {
+ return twl4030_readb(twl, TWL_MODULE_USB, address);
+ }
+
+ /*-------------------------------------------------------------------------*/
+
+ static inline int
+ twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
+ {
+ return twl4030_usb_write(twl, ULPI_SET(reg), bits);
+ }
+
+ static inline int
+ twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
+ {
+ return twl4030_usb_write(twl, ULPI_CLR(reg), bits);
+ }
+
+ /*-------------------------------------------------------------------------*/
+
+ static bool twl4030_is_driving_vbus(struct twl4030_usb *twl)
+ {
+ int ret;
+
+ ret = twl4030_usb_read(twl, PHY_CLK_CTRL_STS);
+ if (ret < 0 || !(ret & PHY_DPLL_CLK))
+ /*
+ * if clocks are off, registers are not updated,
+ * but we can assume we don't drive VBUS in this case
+ */
+ return false;
+
+ ret = twl4030_usb_read(twl, ULPI_OTG_CTRL);
+ if (ret < 0)
+ return false;
+
+ return (ret & (ULPI_OTG_DRVVBUS | ULPI_OTG_CHRGVBUS)) ? true : false;
+ }
+
+ static enum omap_musb_vbus_id_status
+ twl4030_usb_linkstat(struct twl4030_usb *twl)
+ {
+ int status;
+ enum omap_musb_vbus_id_status linkstat = OMAP_MUSB_UNKNOWN;
+
+ twl->vbus_supplied = false;
+
+ /*
+ * For ID/VBUS sensing, see manual section 15.4.8 ...
+ * except when using only battery backup power, two
+ * comparators produce VBUS_PRES and ID_PRES signals,
+ * which don't match docs elsewhere. But ... BIT(7)
+ * and BIT(2) of STS_HW_CONDITIONS, respectively, do
+ * seem to match up. If either is true the USB_PRES
+ * signal is active, the OTG module is activated, and
+ * its interrupt may be raised (may wake the system).
+ */
+ status = twl4030_readb(twl, TWL_MODULE_PM_MASTER, STS_HW_CONDITIONS);
+ if (status < 0)
+ dev_err(twl->dev, "USB link status err %d\n", status);
+ else if (status & (BIT(7) | BIT(2))) {
+ if (status & BIT(7)) {
+ if (twl4030_is_driving_vbus(twl))
+ status &= ~BIT(7);
+ else
+ twl->vbus_supplied = true;
+ }
+
+ if (status & BIT(2))
+ linkstat = OMAP_MUSB_ID_GROUND;
+ else if (status & BIT(7))
+ linkstat = OMAP_MUSB_VBUS_VALID;
+ else
+ linkstat = OMAP_MUSB_VBUS_OFF;
+ } else {
+ if (twl->linkstat != OMAP_MUSB_UNKNOWN)
+ linkstat = OMAP_MUSB_VBUS_OFF;
+ }
+
+ dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
+ status, status, linkstat);
+
+ /* REVISIT this assumes host and peripheral controllers
+ * are registered, and that both are active...
+ */
+
+ return linkstat;
+ }
+
+ static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
+ {
+ twl->usb_mode = mode;
+
+ switch (mode) {
+ case T2_USB_MODE_ULPI:
+ twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL,
+ ULPI_IFC_CTRL_CARKITMODE);
+ twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
+ twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL,
+ ULPI_FUNC_CTRL_XCVRSEL_MASK |
+ ULPI_FUNC_CTRL_OPMODE_MASK);
+ break;
+ case -1:
+ /* FIXME: power on defaults */
+ break;
+ default:
+ dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
+ mode);
+ break;
+ };
+ }
+
+ static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
+ {
+ unsigned long timeout;
+ int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
+
+ if (val >= 0) {
+ if (on) {
+ /* enable DPLL to access PHY registers over I2C */
+ val |= REQ_PHY_DPLL_CLK;
+ WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
+ (u8)val) < 0);
+
+ timeout = jiffies + HZ;
+ while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
+ PHY_DPLL_CLK)
+ && time_before(jiffies, timeout))
+ udelay(10);
+ if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
+ PHY_DPLL_CLK))
+ dev_err(twl->dev, "Timeout setting T2 HSUSB "
+ "PHY DPLL clock\n");
+ } else {
+ /* let ULPI control the DPLL clock */
+ val &= ~REQ_PHY_DPLL_CLK;
+ WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
+ (u8)val) < 0);
+ }
+ }
+ }
+
+ static void __twl4030_phy_power(struct twl4030_usb *twl, int on)
+ {
+ u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
+
+ if (on)
+ pwr &= ~PHY_PWR_PHYPWD;
+ else
+ pwr |= PHY_PWR_PHYPWD;
+
+ WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
+ }
+
+ static void twl4030_phy_power(struct twl4030_usb *twl, int on)
+ {
+ int ret;
+
+ if (on) {
+ ret = regulator_enable(twl->usb3v1);
+ if (ret)
+ dev_err(twl->dev, "Failed to enable usb3v1\n");
+
+ ret = regulator_enable(twl->usb1v8);
+ if (ret)
+ dev_err(twl->dev, "Failed to enable usb1v8\n");
+
+ /*
+ * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
+ * in twl4030) resets the VUSB_DEDICATED2 register. This reset
+ * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
+ * SLEEP. We work around this by clearing the bit after usv3v1
+ * is re-activated. This ensures that VUSB3V1 is really active.
+ */
+ twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
+
+ ret = regulator_enable(twl->usb1v5);
+ if (ret)
+ dev_err(twl->dev, "Failed to enable usb1v5\n");
+
+ __twl4030_phy_power(twl, 1);
+ twl4030_usb_write(twl, PHY_CLK_CTRL,
+ twl4030_usb_read(twl, PHY_CLK_CTRL) |
+ (PHY_CLK_CTRL_CLOCKGATING_EN |
+ PHY_CLK_CTRL_CLK32K_EN));
+ } else {
+ __twl4030_phy_power(twl, 0);
+ regulator_disable(twl->usb1v5);
+ regulator_disable(twl->usb1v8);
+ regulator_disable(twl->usb3v1);
+ }
+ }
+
+ static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off)
+ {
+ if (twl->asleep)
+ return;
+
+ twl4030_phy_power(twl, 0);
+ twl->asleep = 1;
+ dev_dbg(twl->dev, "%s\n", __func__);
+ }
+
+ static void __twl4030_phy_resume(struct twl4030_usb *twl)
+ {
+ twl4030_phy_power(twl, 1);
+ twl4030_i2c_access(twl, 1);
+ twl4030_usb_set_mode(twl, twl->usb_mode);
+ if (twl->usb_mode == T2_USB_MODE_ULPI)
+ twl4030_i2c_access(twl, 0);
+ }
+
+ static void twl4030_phy_resume(struct twl4030_usb *twl)
+ {
+ if (!twl->asleep)
+ return;
+ __twl4030_phy_resume(twl);
+ twl->asleep = 0;
+ dev_dbg(twl->dev, "%s\n", __func__);
+
+ /*
+ * XXX When VBUS gets driven after musb goes to A mode,
+ * ID_PRES related interrupts no longer arrive, why?
+ * Register itself is updated fine though, so we must poll.
+ */
+ if (twl->linkstat == OMAP_MUSB_ID_GROUND) {
+ cancel_delayed_work(&twl->id_workaround_work);
+ schedule_delayed_work(&twl->id_workaround_work, HZ);
+ }
+ }
+
+ static int twl4030_usb_ldo_init(struct twl4030_usb *twl)
+ {
+ /* Enable writing to power configuration registers */
+ twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
+ TWL4030_PM_MASTER_PROTECT_KEY);
+
+ twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
+ TWL4030_PM_MASTER_PROTECT_KEY);
+
+ /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/
+ /*twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/
+
+ /* input to VUSB3V1 LDO is from VBAT, not VBUS */
+ twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
+
+ /* Initialize 3.1V regulator */
+ twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP);
+
+ twl->usb3v1 = devm_regulator_get(twl->dev, "usb3v1");
+ if (IS_ERR(twl->usb3v1))
+ return -ENODEV;
+
+ twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
+
+ /* Initialize 1.5V regulator */
+ twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP);
+
+ twl->usb1v5 = devm_regulator_get(twl->dev, "usb1v5");
+ if (IS_ERR(twl->usb1v5))
+ return -ENODEV;
+
+ twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
+
+ /* Initialize 1.8V regulator */
+ twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP);
+
+ twl->usb1v8 = devm_regulator_get(twl->dev, "usb1v8");
+ if (IS_ERR(twl->usb1v8))
+ return -ENODEV;
+
+ twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
+
+ /* disable access to power configuration registers */
+ twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
+ TWL4030_PM_MASTER_PROTECT_KEY);
+
+ return 0;
+ }
+
+ static ssize_t twl4030_usb_vbus_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+ {
+ struct twl4030_usb *twl = dev_get_drvdata(dev);
+ unsigned long flags;
+ int ret = -EINVAL;
+
+ spin_lock_irqsave(&twl->lock, flags);
+ ret = sprintf(buf, "%s\n",
+ twl->vbus_supplied ? "on" : "off");
+ spin_unlock_irqrestore(&twl->lock, flags);
+
+ return ret;
+ }
+ static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
+
+ static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
+ {
+ struct twl4030_usb *twl = _twl;
+ enum omap_musb_vbus_id_status status;
+ bool status_changed = false;
+
+ status = twl4030_usb_linkstat(twl);
+
+ spin_lock_irq(&twl->lock);
+ if (status >= 0 && status != twl->linkstat) {
+ twl->linkstat = status;
+ status_changed = true;
+ }
+ spin_unlock_irq(&twl->lock);
+
+ if (status_changed) {
+ /* FIXME add a set_power() method so that B-devices can
+ * configure the charger appropriately. It's not always
+ * correct to consume VBUS power, and how much current to
+ * consume is a function of the USB configuration chosen
+ * by the host.
+ *
+ * REVISIT usb_gadget_vbus_connect(...) as needed, ditto
+ * its disconnect() sibling, when changing to/from the
+ * USB_LINK_VBUS state. musb_hdrc won't care until it
+ * starts to handle softconnect right.
+ */
+ omap_musb_mailbox(status);
+ }
+ sysfs_notify(&twl->dev->kobj, NULL, "vbus");
+
+ return IRQ_HANDLED;
+ }
+
+ static void twl4030_id_workaround_work(struct work_struct *work)
+ {
+ struct twl4030_usb *twl = container_of(work, struct twl4030_usb,
+ id_workaround_work.work);
+ enum omap_musb_vbus_id_status status;
+ bool status_changed = false;
+
+ status = twl4030_usb_linkstat(twl);
+
+ spin_lock_irq(&twl->lock);
+ if (status >= 0 && status != twl->linkstat) {
+ twl->linkstat = status;
+ status_changed = true;
+ }
+ spin_unlock_irq(&twl->lock);
+
+ if (status_changed) {
+ dev_dbg(twl->dev, "handle missing status change to %d\n",
+ status);
+ omap_musb_mailbox(status);
+ }
+
+ /* don't schedule during sleep - irq works right then */
+ if (status == OMAP_MUSB_ID_GROUND && !twl->asleep) {
+ cancel_delayed_work(&twl->id_workaround_work);
+ schedule_delayed_work(&twl->id_workaround_work, HZ);
+ }
+ }
+
+ static int twl4030_usb_phy_init(struct usb_phy *phy)
+ {
+ struct twl4030_usb *twl = phy_to_twl(phy);
+ enum omap_musb_vbus_id_status status;
+
+ /*
+ * Start in sleep state, we'll get called through set_suspend()
+ * callback when musb is runtime resumed and it's time to start.
+ */
+ __twl4030_phy_power(twl, 0);
+ twl->asleep = 1;
+
+ status = twl4030_usb_linkstat(twl);
+ twl->linkstat = status;
+
+ if (status == OMAP_MUSB_ID_GROUND || status == OMAP_MUSB_VBUS_VALID)
+ omap_musb_mailbox(twl->linkstat);
+
+ sysfs_notify(&twl->dev->kobj, NULL, "vbus");
+ return 0;
+ }
+
+ static int twl4030_set_suspend(struct usb_phy *x, int suspend)
+ {
+ struct twl4030_usb *twl = phy_to_twl(x);
+
+ if (suspend)
+ twl4030_phy_suspend(twl, 1);
+ else
+ twl4030_phy_resume(twl);
+
+ return 0;
+ }
+
+ static int twl4030_set_peripheral(struct usb_otg *otg,
+ struct usb_gadget *gadget)
+ {
+ if (!otg)
+ return -ENODEV;
+
+ otg->gadget = gadget;
+ if (!gadget)
+ otg->phy->state = OTG_STATE_UNDEFINED;
+
+ return 0;
+ }
+
+ static int twl4030_set_host(struct usb_otg *otg, struct usb_bus *host)
+ {
+ if (!otg)
+ return -ENODEV;
+
+ otg->host = host;
+ if (!host)
+ otg->phy->state = OTG_STATE_UNDEFINED;
+
+ return 0;
+ }
+
+ static int twl4030_usb_probe(struct platform_device *pdev)
+ {
+ struct twl4030_usb_data *pdata = pdev->dev.platform_data;
+ struct twl4030_usb *twl;
+ int status, err;
+ struct usb_otg *otg;
+ struct device_node *np = pdev->dev.of_node;
+
+ twl = devm_kzalloc(&pdev->dev, sizeof *twl, GFP_KERNEL);
+ if (!twl)
+ return -ENOMEM;
+
+ if (np)
+ of_property_read_u32(np, "usb_mode",
+ (enum twl4030_usb_mode *)&twl->usb_mode);
+ else if (pdata)
+ twl->usb_mode = pdata->usb_mode;
+ else {
+ dev_err(&pdev->dev, "twl4030 initialized without pdata\n");
+ return -EINVAL;
+ }
+
+ otg = devm_kzalloc(&pdev->dev, sizeof *otg, GFP_KERNEL);
+ if (!otg)
+ return -ENOMEM;
+
+ twl->dev = &pdev->dev;
+ twl->irq = platform_get_irq(pdev, 0);
+ twl->vbus_supplied = false;
+ twl->asleep = 1;
+ twl->linkstat = OMAP_MUSB_UNKNOWN;
+
+ twl->phy.dev = twl->dev;
+ twl->phy.label = "twl4030";
+ twl->phy.otg = otg;
+ twl->phy.type = USB_PHY_TYPE_USB2;
+ twl->phy.set_suspend = twl4030_set_suspend;
+ twl->phy.init = twl4030_usb_phy_init;
+
+ otg->phy = &twl->phy;
+ otg->set_host = twl4030_set_host;
+ otg->set_peripheral = twl4030_set_peripheral;
+
+ /* init spinlock for workqueue */
+ spin_lock_init(&twl->lock);
+
+ INIT_DELAYED_WORK(&twl->id_workaround_work, twl4030_id_workaround_work);
+
+ err = twl4030_usb_ldo_init(twl);
+ if (err) {
+ dev_err(&pdev->dev, "ldo init failed\n");
+ return err;
+ }
+ usb_add_phy_dev(&twl->phy);
+
+ platform_set_drvdata(pdev, twl);
+ if (device_create_file(&pdev->dev, &dev_attr_vbus))
+ dev_warn(&pdev->dev, "could not create sysfs file\n");
+
+ /* Our job is to use irqs and status from the power module
+ * to keep the transceiver disabled when nothing's connected.
+ *
+ * FIXME we actually shouldn't start enabling it until the
+ * USB controller drivers have said they're ready, by calling
+ * set_host() and/or set_peripheral() ... OTG_capable boards
+ * need both handles, otherwise just one suffices.
+ */
+ twl->irq_enabled = true;
+ status = devm_request_threaded_irq(twl->dev, twl->irq, NULL,
+ twl4030_usb_irq, IRQF_TRIGGER_FALLING |
+ IRQF_TRIGGER_RISING | IRQF_ONESHOT, "twl4030_usb", twl);
+ if (status < 0) {
+ dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
+ twl->irq, status);
+ return status;
+ }
+
+ dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
+ return 0;
+ }
+
- .remove = __exit_p(twl4030_usb_remove),
++static int twl4030_usb_remove(struct platform_device *pdev)
+ {
+ struct twl4030_usb *twl = platform_get_drvdata(pdev);
+ int val;
+
+ cancel_delayed_work(&twl->id_workaround_work);
+ device_remove_file(twl->dev, &dev_attr_vbus);
+
+ /* set transceiver mode to power on defaults */
+ twl4030_usb_set_mode(twl, -1);
+
+ /* autogate 60MHz ULPI clock,
+ * clear dpll clock request for i2c access,
+ * disable 32KHz
+ */
+ val = twl4030_usb_read(twl, PHY_CLK_CTRL);
+ if (val >= 0) {
+ val |= PHY_CLK_CTRL_CLOCKGATING_EN;
+ val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
+ twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
+ }
+
+ /* disable complete OTG block */
+ twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
+
+ if (!twl->asleep)
+ twl4030_phy_power(twl, 0);
+
+ return 0;
+ }
+
+ #ifdef CONFIG_OF
+ static const struct of_device_id twl4030_usb_id_table[] = {
+ { .compatible = "ti,twl4030-usb" },
+ {}
+ };
+ MODULE_DEVICE_TABLE(of, twl4030_usb_id_table);
+ #endif
+
+ static struct platform_driver twl4030_usb_driver = {
+ .probe = twl4030_usb_probe,
++ .remove = twl4030_usb_remove,
+ .driver = {
+ .name = "twl4030_usb",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(twl4030_usb_id_table),
+ },
+ };
+
+ static int __init twl4030_usb_init(void)
+ {
+ return platform_driver_register(&twl4030_usb_driver);
+ }
+ subsys_initcall(twl4030_usb_init);
+
+ static void __exit twl4030_usb_exit(void)
+ {
+ platform_driver_unregister(&twl4030_usb_driver);
+ }
+ module_exit(twl4030_usb_exit);
+
+ MODULE_ALIAS("platform:twl4030_usb");
+ MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
+ MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
+ MODULE_LICENSE("GPL");
--- /dev/null
-static int __exit twl6030_usb_remove(struct platform_device *pdev)
+ /*
+ * twl6030_usb - TWL6030 USB transceiver, talking to OMAP OTG driver.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Author: Hema HK <hemahk@ti.com>
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+ #include <linux/module.h>
+ #include <linux/init.h>
+ #include <linux/interrupt.h>
+ #include <linux/platform_device.h>
+ #include <linux/io.h>
+ #include <linux/usb/musb-omap.h>
+ #include <linux/usb/phy_companion.h>
+ #include <linux/usb/omap_usb.h>
+ #include <linux/i2c/twl.h>
+ #include <linux/regulator/consumer.h>
+ #include <linux/err.h>
+ #include <linux/slab.h>
+ #include <linux/delay.h>
+
+ /* usb register definitions */
+ #define USB_VENDOR_ID_LSB 0x00
+ #define USB_VENDOR_ID_MSB 0x01
+ #define USB_PRODUCT_ID_LSB 0x02
+ #define USB_PRODUCT_ID_MSB 0x03
+ #define USB_VBUS_CTRL_SET 0x04
+ #define USB_VBUS_CTRL_CLR 0x05
+ #define USB_ID_CTRL_SET 0x06
+ #define USB_ID_CTRL_CLR 0x07
+ #define USB_VBUS_INT_SRC 0x08
+ #define USB_VBUS_INT_LATCH_SET 0x09
+ #define USB_VBUS_INT_LATCH_CLR 0x0A
+ #define USB_VBUS_INT_EN_LO_SET 0x0B
+ #define USB_VBUS_INT_EN_LO_CLR 0x0C
+ #define USB_VBUS_INT_EN_HI_SET 0x0D
+ #define USB_VBUS_INT_EN_HI_CLR 0x0E
+ #define USB_ID_INT_SRC 0x0F
+ #define USB_ID_INT_LATCH_SET 0x10
+ #define USB_ID_INT_LATCH_CLR 0x11
+
+ #define USB_ID_INT_EN_LO_SET 0x12
+ #define USB_ID_INT_EN_LO_CLR 0x13
+ #define USB_ID_INT_EN_HI_SET 0x14
+ #define USB_ID_INT_EN_HI_CLR 0x15
+ #define USB_OTG_ADP_CTRL 0x16
+ #define USB_OTG_ADP_HIGH 0x17
+ #define USB_OTG_ADP_LOW 0x18
+ #define USB_OTG_ADP_RISE 0x19
+ #define USB_OTG_REVISION 0x1A
+
+ /* to be moved to LDO */
+ #define TWL6030_MISC2 0xE5
+ #define TWL6030_CFG_LDO_PD2 0xF5
+ #define TWL6030_BACKUP_REG 0xFA
+
+ #define STS_HW_CONDITIONS 0x21
+
+ /* In module TWL6030_MODULE_PM_MASTER */
+ #define STS_HW_CONDITIONS 0x21
+ #define STS_USB_ID BIT(2)
+
+ /* In module TWL6030_MODULE_PM_RECEIVER */
+ #define VUSB_CFG_TRANS 0x71
+ #define VUSB_CFG_STATE 0x72
+ #define VUSB_CFG_VOLTAGE 0x73
+
+ /* in module TWL6030_MODULE_MAIN_CHARGE */
+
+ #define CHARGERUSB_CTRL1 0x8
+
+ #define CONTROLLER_STAT1 0x03
+ #define VBUS_DET BIT(2)
+
+ struct twl6030_usb {
+ struct phy_companion comparator;
+ struct device *dev;
+
+ /* for vbus reporting with irqs disabled */
+ spinlock_t lock;
+
+ struct regulator *usb3v3;
+
+ /* used to set vbus, in atomic path */
+ struct work_struct set_vbus_work;
+
+ int irq1;
+ int irq2;
+ enum omap_musb_vbus_id_status linkstat;
+ u8 asleep;
+ bool irq_enabled;
+ bool vbus_enable;
+ const char *regulator;
+ };
+
+ #define comparator_to_twl(x) container_of((x), struct twl6030_usb, comparator)
+
+ /*-------------------------------------------------------------------------*/
+
+ static inline int twl6030_writeb(struct twl6030_usb *twl, u8 module,
+ u8 data, u8 address)
+ {
+ int ret = 0;
+
+ ret = twl_i2c_write_u8(module, data, address);
+ if (ret < 0)
+ dev_err(twl->dev,
+ "Write[0x%x] Error %d\n", address, ret);
+ return ret;
+ }
+
+ static inline u8 twl6030_readb(struct twl6030_usb *twl, u8 module, u8 address)
+ {
+ u8 data, ret = 0;
+
+ ret = twl_i2c_read_u8(module, &data, address);
+ if (ret >= 0)
+ ret = data;
+ else
+ dev_err(twl->dev,
+ "readb[0x%x,0x%x] Error %d\n",
+ module, address, ret);
+ return ret;
+ }
+
+ static int twl6030_start_srp(struct phy_companion *comparator)
+ {
+ struct twl6030_usb *twl = comparator_to_twl(comparator);
+
+ twl6030_writeb(twl, TWL_MODULE_USB, 0x24, USB_VBUS_CTRL_SET);
+ twl6030_writeb(twl, TWL_MODULE_USB, 0x84, USB_VBUS_CTRL_SET);
+
+ mdelay(100);
+ twl6030_writeb(twl, TWL_MODULE_USB, 0xa0, USB_VBUS_CTRL_CLR);
+
+ return 0;
+ }
+
+ static int twl6030_usb_ldo_init(struct twl6030_usb *twl)
+ {
+ /* Set to OTG_REV 1.3 and turn on the ID_WAKEUP_COMP */
+ twl6030_writeb(twl, TWL6030_MODULE_ID0 , 0x1, TWL6030_BACKUP_REG);
+
+ /* Program CFG_LDO_PD2 register and set VUSB bit */
+ twl6030_writeb(twl, TWL6030_MODULE_ID0 , 0x1, TWL6030_CFG_LDO_PD2);
+
+ /* Program MISC2 register and set bit VUSB_IN_VBAT */
+ twl6030_writeb(twl, TWL6030_MODULE_ID0 , 0x10, TWL6030_MISC2);
+
+ twl->usb3v3 = regulator_get(twl->dev, twl->regulator);
+ if (IS_ERR(twl->usb3v3))
+ return -ENODEV;
+
+ /* Program the USB_VBUS_CTRL_SET and set VBUS_ACT_COMP bit */
+ twl6030_writeb(twl, TWL_MODULE_USB, 0x4, USB_VBUS_CTRL_SET);
+
+ /*
+ * Program the USB_ID_CTRL_SET register to enable GND drive
+ * and the ID comparators
+ */
+ twl6030_writeb(twl, TWL_MODULE_USB, 0x14, USB_ID_CTRL_SET);
+
+ return 0;
+ }
+
+ static ssize_t twl6030_usb_vbus_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+ {
+ struct twl6030_usb *twl = dev_get_drvdata(dev);
+ unsigned long flags;
+ int ret = -EINVAL;
+
+ spin_lock_irqsave(&twl->lock, flags);
+
+ switch (twl->linkstat) {
+ case OMAP_MUSB_VBUS_VALID:
+ ret = snprintf(buf, PAGE_SIZE, "vbus\n");
+ break;
+ case OMAP_MUSB_ID_GROUND:
+ ret = snprintf(buf, PAGE_SIZE, "id\n");
+ break;
+ case OMAP_MUSB_VBUS_OFF:
+ ret = snprintf(buf, PAGE_SIZE, "none\n");
+ break;
+ default:
+ ret = snprintf(buf, PAGE_SIZE, "UNKNOWN\n");
+ }
+ spin_unlock_irqrestore(&twl->lock, flags);
+
+ return ret;
+ }
+ static DEVICE_ATTR(vbus, 0444, twl6030_usb_vbus_show, NULL);
+
+ static irqreturn_t twl6030_usb_irq(int irq, void *_twl)
+ {
+ struct twl6030_usb *twl = _twl;
+ enum omap_musb_vbus_id_status status = OMAP_MUSB_UNKNOWN;
+ u8 vbus_state, hw_state;
+ int ret;
+
+ hw_state = twl6030_readb(twl, TWL6030_MODULE_ID0, STS_HW_CONDITIONS);
+
+ vbus_state = twl6030_readb(twl, TWL_MODULE_MAIN_CHARGE,
+ CONTROLLER_STAT1);
+ if (!(hw_state & STS_USB_ID)) {
+ if (vbus_state & VBUS_DET) {
+ ret = regulator_enable(twl->usb3v3);
+ if (ret)
+ dev_err(twl->dev, "Failed to enable usb3v3\n");
+
+ twl->asleep = 1;
+ status = OMAP_MUSB_VBUS_VALID;
+ twl->linkstat = status;
+ omap_musb_mailbox(status);
+ } else {
+ if (twl->linkstat != OMAP_MUSB_UNKNOWN) {
+ status = OMAP_MUSB_VBUS_OFF;
+ twl->linkstat = status;
+ omap_musb_mailbox(status);
+ if (twl->asleep) {
+ regulator_disable(twl->usb3v3);
+ twl->asleep = 0;
+ }
+ }
+ }
+ }
+ sysfs_notify(&twl->dev->kobj, NULL, "vbus");
+
+ return IRQ_HANDLED;
+ }
+
+ static irqreturn_t twl6030_usbotg_irq(int irq, void *_twl)
+ {
+ struct twl6030_usb *twl = _twl;
+ enum omap_musb_vbus_id_status status = OMAP_MUSB_UNKNOWN;
+ u8 hw_state;
+ int ret;
+
+ hw_state = twl6030_readb(twl, TWL6030_MODULE_ID0, STS_HW_CONDITIONS);
+
+ if (hw_state & STS_USB_ID) {
+ ret = regulator_enable(twl->usb3v3);
+ if (ret)
+ dev_err(twl->dev, "Failed to enable usb3v3\n");
+
+ twl->asleep = 1;
+ twl6030_writeb(twl, TWL_MODULE_USB, 0x1, USB_ID_INT_EN_HI_CLR);
+ twl6030_writeb(twl, TWL_MODULE_USB, 0x10, USB_ID_INT_EN_HI_SET);
+ status = OMAP_MUSB_ID_GROUND;
+ twl->linkstat = status;
+ omap_musb_mailbox(status);
+ } else {
+ twl6030_writeb(twl, TWL_MODULE_USB, 0x10, USB_ID_INT_EN_HI_CLR);
+ twl6030_writeb(twl, TWL_MODULE_USB, 0x1, USB_ID_INT_EN_HI_SET);
+ }
+ twl6030_writeb(twl, TWL_MODULE_USB, status, USB_ID_INT_LATCH_CLR);
+
+ return IRQ_HANDLED;
+ }
+
+ static int twl6030_enable_irq(struct twl6030_usb *twl)
+ {
+ twl6030_writeb(twl, TWL_MODULE_USB, 0x1, USB_ID_INT_EN_HI_SET);
+ twl6030_interrupt_unmask(0x05, REG_INT_MSK_LINE_C);
+ twl6030_interrupt_unmask(0x05, REG_INT_MSK_STS_C);
+
+ twl6030_interrupt_unmask(TWL6030_CHARGER_CTRL_INT_MASK,
+ REG_INT_MSK_LINE_C);
+ twl6030_interrupt_unmask(TWL6030_CHARGER_CTRL_INT_MASK,
+ REG_INT_MSK_STS_C);
+ twl6030_usb_irq(twl->irq2, twl);
+ twl6030_usbotg_irq(twl->irq1, twl);
+
+ return 0;
+ }
+
+ static void otg_set_vbus_work(struct work_struct *data)
+ {
+ struct twl6030_usb *twl = container_of(data, struct twl6030_usb,
+ set_vbus_work);
+
+ /*
+ * Start driving VBUS. Set OPA_MODE bit in CHARGERUSB_CTRL1
+ * register. This enables boost mode.
+ */
+
+ if (twl->vbus_enable)
+ twl6030_writeb(twl, TWL_MODULE_MAIN_CHARGE , 0x40,
+ CHARGERUSB_CTRL1);
+ else
+ twl6030_writeb(twl, TWL_MODULE_MAIN_CHARGE , 0x00,
+ CHARGERUSB_CTRL1);
+ }
+
+ static int twl6030_set_vbus(struct phy_companion *comparator, bool enabled)
+ {
+ struct twl6030_usb *twl = comparator_to_twl(comparator);
+
+ twl->vbus_enable = enabled;
+ schedule_work(&twl->set_vbus_work);
+
+ return 0;
+ }
+
+ static int twl6030_usb_probe(struct platform_device *pdev)
+ {
+ u32 ret;
+ struct twl6030_usb *twl;
+ int status, err;
+ struct device_node *np = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
+ struct twl4030_usb_data *pdata = dev->platform_data;
+
+ twl = devm_kzalloc(dev, sizeof *twl, GFP_KERNEL);
+ if (!twl)
+ return -ENOMEM;
+
+ twl->dev = &pdev->dev;
+ twl->irq1 = platform_get_irq(pdev, 0);
+ twl->irq2 = platform_get_irq(pdev, 1);
+ twl->linkstat = OMAP_MUSB_UNKNOWN;
+
+ twl->comparator.set_vbus = twl6030_set_vbus;
+ twl->comparator.start_srp = twl6030_start_srp;
+
+ ret = omap_usb2_set_comparator(&twl->comparator);
+ if (ret == -ENODEV) {
+ dev_info(&pdev->dev, "phy not ready, deferring probe");
+ return -EPROBE_DEFER;
+ }
+
+ if (np) {
+ twl->regulator = "usb";
+ } else if (pdata) {
+ if (pdata->features & TWL6025_SUBCLASS)
+ twl->regulator = "ldousb";
+ else
+ twl->regulator = "vusb";
+ } else {
+ dev_err(&pdev->dev, "twl6030 initialized without pdata\n");
+ return -EINVAL;
+ }
+
+ /* init spinlock for workqueue */
+ spin_lock_init(&twl->lock);
+
+ err = twl6030_usb_ldo_init(twl);
+ if (err) {
+ dev_err(&pdev->dev, "ldo init failed\n");
+ return err;
+ }
+
+ platform_set_drvdata(pdev, twl);
+ if (device_create_file(&pdev->dev, &dev_attr_vbus))
+ dev_warn(&pdev->dev, "could not create sysfs file\n");
+
+ INIT_WORK(&twl->set_vbus_work, otg_set_vbus_work);
+
+ twl->irq_enabled = true;
+ status = request_threaded_irq(twl->irq1, NULL, twl6030_usbotg_irq,
+ IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING | IRQF_ONESHOT,
+ "twl6030_usb", twl);
+ if (status < 0) {
+ dev_err(&pdev->dev, "can't get IRQ %d, err %d\n",
+ twl->irq1, status);
+ device_remove_file(twl->dev, &dev_attr_vbus);
+ return status;
+ }
+
+ status = request_threaded_irq(twl->irq2, NULL, twl6030_usb_irq,
+ IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING | IRQF_ONESHOT,
+ "twl6030_usb", twl);
+ if (status < 0) {
+ dev_err(&pdev->dev, "can't get IRQ %d, err %d\n",
+ twl->irq2, status);
+ free_irq(twl->irq1, twl);
+ device_remove_file(twl->dev, &dev_attr_vbus);
+ return status;
+ }
+
+ twl->asleep = 0;
+ twl6030_enable_irq(twl);
+ dev_info(&pdev->dev, "Initialized TWL6030 USB module\n");
+
+ return 0;
+ }
+
- .remove = __exit_p(twl6030_usb_remove),
++static int twl6030_usb_remove(struct platform_device *pdev)
+ {
+ struct twl6030_usb *twl = platform_get_drvdata(pdev);
+
+ twl6030_interrupt_mask(TWL6030_USBOTG_INT_MASK,
+ REG_INT_MSK_LINE_C);
+ twl6030_interrupt_mask(TWL6030_USBOTG_INT_MASK,
+ REG_INT_MSK_STS_C);
+ free_irq(twl->irq1, twl);
+ free_irq(twl->irq2, twl);
+ regulator_put(twl->usb3v3);
+ device_remove_file(twl->dev, &dev_attr_vbus);
+ cancel_work_sync(&twl->set_vbus_work);
+
+ return 0;
+ }
+
+ #ifdef CONFIG_OF
+ static const struct of_device_id twl6030_usb_id_table[] = {
+ { .compatible = "ti,twl6030-usb" },
+ {}
+ };
+ MODULE_DEVICE_TABLE(of, twl6030_usb_id_table);
+ #endif
+
+ static struct platform_driver twl6030_usb_driver = {
+ .probe = twl6030_usb_probe,
++ .remove = twl6030_usb_remove,
+ .driver = {
+ .name = "twl6030_usb",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(twl6030_usb_id_table),
+ },
+ };
+
+ static int __init twl6030_usb_init(void)
+ {
+ return platform_driver_register(&twl6030_usb_driver);
+ }
+ subsys_initcall(twl6030_usb_init);
+
+ static void __exit twl6030_usb_exit(void)
+ {
+ platform_driver_unregister(&twl6030_usb_driver);
+ }
+ module_exit(twl6030_usb_exit);
+
+ MODULE_ALIAS("platform:twl6030_usb");
+ MODULE_AUTHOR("Hema HK <hemahk@ti.com>");
+ MODULE_DESCRIPTION("TWL6030 USB transceiver driver");
+ MODULE_LICENSE("GPL");