PKG_RELEASE:=1
ifneq ($(CONFIG_LINUX_2_6_27)$(CONFIG_LINUX_2_6_28),)
- PKG_VERSION:=2009-02-02
+ PKG_VERSION:=2009-02-07
PKG_SOURCE_URL:= \
http://www.orbit-lab.org/kernel/compat-wireless-2.6/2009/02 \
http://wireless.kernel.org/download/compat-wireless-2.6
- PKG_MD5SUM:=310b08184b16ead8cab3714bf5a57728
+ PKG_MD5SUM:=fed21ffa78c91e0f8067b8ca63a442b7
else
PKG_VERSION:=2008-08-06
PKG_SOURCE_URL:=http://www.orbit-lab.org/kernel/compat-wireless-2.6/2008/08
--- a/config.mk
+++ b/config.mk
-@@ -75,10 +75,10 @@ CONFIG_MAC80211_MESH=y
+@@ -78,10 +78,10 @@ CONFIG_MAC80211_MESH=y
CONFIG_CFG80211=m
# CONFIG_CFG80211_REG_DEBUG is not set
CONFIG_NL80211=y
-@@ -118,16 +118,16 @@ CONFIG_IWL3945_LEDS=y
+@@ -121,16 +121,16 @@ CONFIG_IWL3945_LEDS=y
CONFIG_B43=m
CONFIG_B43_PCI_AUTOSELECT=y
CONFIG_B43_PCICORE_AUTOSELECT=y
# CONFIG_B43LEGACY_RFKILL=y
# CONFIG_B43LEGACY_DEBUG=y
CONFIG_B43LEGACY_DMA=y
-@@ -137,17 +137,17 @@ CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
+@@ -140,17 +140,17 @@ CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
# CONFIG_B43LEGACY_PIO_MODE is not set
# The Intel ipws
# CONFIG_IPW2200_DEBUG is not set
# The above enables use a second interface prefixed 'rtap'.
# Example usage:
-@@ -269,15 +269,15 @@ CONFIG_SSB_SPROM=y
+@@ -272,15 +272,15 @@ CONFIG_SSB_SPROM=y
ifneq ($(CONFIG_USB),)
ifneq ($(CONFIG_LIBERTAS_THINFIRM_USB),m)
CONFIG_LIBERTAS_USB=m
-From adf33d3a207846709e2a5fb006f17dbc9225f7a9 Mon Sep 17 00:00:00 2001
+From 2c0af6ef6263ad5b581429953ad1b98e6d522e69 Mon Sep 17 00:00:00 2001
From: Ivo van Doorn <IvDoorn@gmail.com>
-Date: Fri, 23 Jan 2009 17:10:06 +0100
+Date: Wed, 4 Feb 2009 20:10:23 +0100
Subject: [PATCH] rt2x00: Implement support for 802.11n
Extend rt2x00lib capabilities to support 802.11n,
---
drivers/net/wireless/rt2x00/Kconfig | 3 +
drivers/net/wireless/rt2x00/Makefile | 1 +
- drivers/net/wireless/rt2x00/rt2x00.h | 5 ++
+ drivers/net/wireless/rt2x00/rt2x00.h | 4 +
drivers/net/wireless/rt2x00/rt2x00config.c | 5 ++
drivers/net/wireless/rt2x00/rt2x00dev.c | 91 ++++++++++++++++++++-------
drivers/net/wireless/rt2x00/rt2x00ht.c | 69 +++++++++++++++++++++
drivers/net/wireless/rt2x00/rt2x00lib.h | 24 +++++++
drivers/net/wireless/rt2x00/rt2x00queue.c | 1 +
- drivers/net/wireless/rt2x00/rt2x00queue.h | 26 +++++++-
- 9 files changed, 197 insertions(+), 28 deletions(-)
+ drivers/net/wireless/rt2x00/rt2x00queue.h | 33 ++++++++--
+ 9 files changed, 201 insertions(+), 30 deletions(-)
create mode 100644 drivers/net/wireless/rt2x00/rt2x00ht.c
--- a/drivers/net/wireless/rt2x00/Makefile
obj-$(CONFIG_RT2X00_LIB_PCI) += rt2x00pci.o
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
-@@ -108,6 +108,7 @@
- */
- #define ACK_SIZE 14
- #define IEEE80211_HEADER 24
-+#define AGGREGATION_SIZE 3840
- #define PLCP 48
- #define BEACON 100
- #define PREAMBLE 144
-@@ -357,6 +358,7 @@ static inline struct rt2x00_intf* vif_to
+@@ -357,6 +357,7 @@ static inline struct rt2x00_intf* vif_to
* for @tx_power_a, @tx_power_bg and @channels.
* @channels: Device/chipset specific channel values (See &struct rf_channel).
* @channels_info: Additional information for channels (See &struct channel_info).
*/
struct hw_mode_spec {
unsigned int supported_bands;
-@@ -370,6 +372,8 @@ struct hw_mode_spec {
+@@ -370,6 +371,8 @@ struct hw_mode_spec {
unsigned int num_channels;
const struct rf_channel *channels;
const struct channel_info *channels_info;
};
/*
-@@ -603,6 +607,7 @@ enum rt2x00_flags {
+@@ -606,6 +609,7 @@ enum rt2x00_flags {
CONFIG_EXTERNAL_LNA_BG,
CONFIG_DOUBLE_ANTENNA,
CONFIG_DISABLE_LINK_TUNING,
sizeof(libconf.rf));
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
-@@ -315,18 +315,54 @@ void rt2x00lib_txdone(struct queue_entry
+@@ -316,18 +316,54 @@ void rt2x00lib_txdone(struct queue_entry
}
EXPORT_SYMBOL_GPL(rt2x00lib_txdone);
/*
* Allocate a new sk_buffer. If no new buffer available, drop the
-@@ -375,26 +411,17 @@ void rt2x00lib_rxdone(struct rt2x00_dev
+@@ -376,26 +412,17 @@ void rt2x00lib_rxdone(struct rt2x00_dev
skb_trim(entry->skb, rxdesc.size);
/*
}
/*
-@@ -404,7 +431,7 @@ void rt2x00lib_rxdone(struct rt2x00_dev
+@@ -405,7 +432,7 @@ void rt2x00lib_rxdone(struct rt2x00_dev
rt2x00debug_update_crypto(rt2x00dev, &rxdesc);
rx_status->mactime = rxdesc.timestamp;
rx_status->qual = rt2x00link_calculate_signal(rt2x00dev, rxdesc.rssi);
rx_status->signal = rxdesc.rssi;
rx_status->noise = rxdesc.noise;
-@@ -439,72 +466,84 @@ const struct rt2x00_rate rt2x00_supporte
+@@ -440,72 +467,84 @@ const struct rt2x00_rate rt2x00_supporte
.bitrate = 10,
.ratemask = BIT(0),
.plcp = 0x00,
},
};
-@@ -580,6 +619,8 @@ static int rt2x00lib_probe_hw_modes(stru
+@@ -581,6 +620,8 @@ static int rt2x00lib_probe_hw_modes(stru
rt2x00dev->bands[IEEE80211_BAND_2GHZ].bitrates = rates;
hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
&rt2x00dev->bands[IEEE80211_BAND_2GHZ];
}
/*
-@@ -596,6 +637,8 @@ static int rt2x00lib_probe_hw_modes(stru
+@@ -597,6 +638,8 @@ static int rt2x00lib_probe_hw_modes(stru
rt2x00dev->bands[IEEE80211_BAND_5GHZ].bitrates = &rates[4];
hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
&rt2x00dev->bands[IEEE80211_BAND_5GHZ];
+ else
+ txdesc->mpdu_density = 0;
+
-+ txdesc->ba_size = 0; /* FIXME: What value is needed? */
++ txdesc->ba_size = 7; /* FIXME: What value is needed? */
+ txdesc->stbc = 0; /* FIXME: What value is needed? */
+
+ txdesc->mcs = rt2x00_get_rate_mcs(hwrate->mcs);
/*
* Radio control handlers.
*/
-@@ -330,6 +339,21 @@ static inline void rt2x00crypto_rx_inser
+@@ -341,6 +350,21 @@ static inline void rt2x00crypto_rx_inser
#endif /* CONFIG_RT2X00_LIB_CRYPTO */
/*
}
--- a/drivers/net/wireless/rt2x00/rt2x00queue.h
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.h
-@@ -145,6 +145,7 @@ static inline struct skb_frame_desc* get
+@@ -35,9 +35,12 @@
+ * for USB devices this restriction does not apply, but the value of
+ * 2432 makes sense since it is big enough to contain the maximum fragment
+ * size according to the ieee802.11 specs.
++ * The aggregation size depends on support from the driver, but should
++ * be something around 3840 bytes.
+ */
+-#define DATA_FRAME_SIZE 2432
+-#define MGMT_FRAME_SIZE 256
++#define DATA_FRAME_SIZE 2432
++#define MGMT_FRAME_SIZE 256
++#define AGGREGATION_SIZE 3840
+
+ /**
+ * DOC: Number of entries per queue
+@@ -145,6 +148,7 @@ static inline struct skb_frame_desc* get
*
* @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value.
* @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value.
* @RXDONE_MY_BSS: Does this frame originate from device's BSS.
* @RXDONE_CRYPTO_IV: Driver provided IV/EIV data.
* @RXDONE_CRYPTO_ICV: Driver provided ICV data.
-@@ -152,9 +153,10 @@ static inline struct skb_frame_desc* get
+@@ -152,9 +156,10 @@ static inline struct skb_frame_desc* get
enum rxdone_entry_desc_flags {
RXDONE_SIGNAL_PLCP = 1 << 0,
RXDONE_SIGNAL_BITRATE = 1 << 1,
};
/**
-@@ -163,7 +165,7 @@ enum rxdone_entry_desc_flags {
+@@ -163,7 +168,7 @@ enum rxdone_entry_desc_flags {
* from &rxdone_entry_desc to a signal value type.
*/
#define RXDONE_SIGNAL_MASK \
/**
* struct rxdone_entry_desc: RX Entry descriptor
-@@ -177,6 +179,7 @@ enum rxdone_entry_desc_flags {
+@@ -177,6 +182,7 @@ enum rxdone_entry_desc_flags {
* @size: Data size of the received frame.
* @flags: MAC80211 receive flags (See &enum mac80211_rx_flags).
* @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
* @cipher: Cipher type used during decryption.
* @cipher_status: Decryption status.
* @iv: IV/EIV data used during decryption.
-@@ -190,6 +193,7 @@ struct rxdone_entry_desc {
+@@ -190,6 +196,7 @@ struct rxdone_entry_desc {
int size;
int flags;
int dev_flags;
u8 cipher;
u8 cipher_status;
-@@ -243,6 +247,9 @@ struct txdone_entry_desc {
+@@ -243,6 +250,9 @@ struct txdone_entry_desc {
* @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared).
* @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware.
* @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware.
*/
enum txentry_desc_flags {
ENTRY_TXD_RTS_FRAME,
-@@ -258,6 +265,9 @@ enum txentry_desc_flags {
+@@ -258,6 +268,9 @@ enum txentry_desc_flags {
ENTRY_TXD_ENCRYPT_PAIRWISE,
ENTRY_TXD_ENCRYPT_IV,
ENTRY_TXD_ENCRYPT_MMIC,
};
/**
-@@ -271,7 +281,11 @@ enum txentry_desc_flags {
+@@ -271,7 +284,11 @@ enum txentry_desc_flags {
* @length_low: PLCP length low word.
* @signal: PLCP signal.
* @service: PLCP service.
* @retry_limit: Max number of retries.
* @aifs: AIFS value.
* @ifs: IFS value.
-@@ -291,7 +305,11 @@ struct txentry_desc {
+@@ -291,7 +308,11 @@ struct txentry_desc {
u16 signal;
u16 service;
-From 659988a6bb83536c5d0a01b0b58378cc1856c975 Mon Sep 17 00:00:00 2001
+From f2219a0f2f2f61656d2c3a524836f6f1e646ea33 Mon Sep 17 00:00:00 2001
From: Ivo van Doorn <IvDoorn@gmail.com>
-Date: Fri, 23 Jan 2009 17:13:03 +0100
+Date: Wed, 4 Feb 2009 20:43:00 +0100
Subject: [PATCH] rt2x00: Implement support for rt2800pci
Add support for the rt2800pci chipset.
---
drivers/net/wireless/rt2x00/Kconfig | 15 +
drivers/net/wireless/rt2x00/Makefile | 1 +
- drivers/net/wireless/rt2x00/rt2800pci.c | 2763 +++++++++++++++++++++++++++++++
- drivers/net/wireless/rt2x00/rt2800pci.h | 1881 +++++++++++++++++++++
+ drivers/net/wireless/rt2x00/rt2800pci.c | 2785 +++++++++++++++++++++++++++++++
+ drivers/net/wireless/rt2x00/rt2800pci.h | 1877 +++++++++++++++++++++
drivers/net/wireless/rt2x00/rt2x00.h | 4 +
- 5 files changed, 4664 insertions(+), 0 deletions(-)
+ 5 files changed, 4682 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/wireless/rt2x00/rt2800pci.c
create mode 100644 drivers/net/wireless/rt2x00/rt2800pci.h
obj-$(CONFIG_RT73USB) += rt73usb.o
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
-@@ -0,0 +1,2763 @@
+@@ -0,0 +1,2785 @@
+/*
+ Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
+ <http://rt2x00.serialmonkey.com>
+ struct rt2x00lib_crypto *crypto,
+ struct ieee80211_key_conf *key)
+{
++ struct mac_wcid_entry wcid_entry;
++ struct mac_iveiv_entry iveiv_entry;
+ u32 offset;
+ u32 reg;
+
+ offset = MAC_WCID_ATTR_ENTRY(crypto->aid);
+
-+ reg = 0;
++ rt2x00pci_register_read(rt2x00dev, offset, ®);
+ rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_KEYTAB,
+ !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE));
-+ rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_PAIRKEY_MODE,
-+ crypto->cipher);
++ rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_CIPHER, crypto->cipher);
+ rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_BSS_IDX,
-+ (crypto->cmd == SET_KEY) ? crypto->bssidx : 0);
++ (crypto->cmd == SET_KEY) * crypto->bssidx);
+ rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_RX_WIUDF, 0);
+ rt2x00pci_register_write(rt2x00dev, offset, reg);
++
++ offset = MAC_IVEIV_ENTRY(crypto->aid);
++
++ memset(&iveiv_entry, 0, sizeof(iveiv_entry));
++ if ((crypto->cipher == CIPHER_TKIP) ||
++ (crypto->cipher == CIPHER_TKIP_NO_MIC) ||
++ (crypto->cipher == CIPHER_AES))
++ iveiv_entry.iv[3] |= 0x20;
++ iveiv_entry.iv[3] |= key->keyidx << 6;
++ rt2x00pci_register_multiwrite(rt2x00dev, offset,
++ &iveiv_entry, sizeof(iveiv_entry));
++
++ offset = MAC_WCID_ENTRY(crypto->aid);
++
++ memset(&wcid_entry, 0, sizeof(wcid_entry));
++ if (crypto->cmd == SET_KEY)
++ memcpy(&wcid_entry, crypto->address, ETH_ALEN);
++ rt2x00pci_register_multiwrite(rt2x00dev, offset,
++ &wcid_entry, sizeof(wcid_entry));
+}
+
+static int rt2800pci_config_shared_key(struct rt2x00_dev *rt2x00dev,
+ struct hw_key_entry key_entry;
+ struct rt2x00_field32 field;
+ u32 offset;
-+ u32 mask;
+ u32 reg;
+
+ if (crypto->cmd == SET_KEY) {
++ key->hw_key_idx = (4 * crypto->bssidx) + key->keyidx;
++
+ memcpy(key_entry.key, crypto->key,
+ sizeof(key_entry.key));
+ memcpy(key_entry.tx_mic, crypto->tx_mic,
+ offset = SHARED_KEY_ENTRY(key->hw_key_idx);
+ rt2x00pci_register_multiwrite(rt2x00dev, offset,
+ &key_entry, sizeof(key_entry));
-+
-+ /*
-+ * The driver does not support the IV/EIV generation
-+ * in hardware. However it doesn't support the IV/EIV
-+ * inside the ieee80211 frame either, but requires it
-+ * to be provided seperately for the descriptor.
-+ * rt2x00lib will cut the IV/EIV data out of all frames
-+ * given to us by mac80211, but we must tell mac80211
-+ * to generate the IV/EIV data.
-+ */
-+ key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
+ }
+
+ /*
+ * The cipher types are stored over multiple registers
+ * starting with SHARED_KEY_MODE_BASE each word will have
-+ * 32 bits and contains the cipher types for 2 modes each.
++ * 32 bits and contains the cipher types for 2 bssidx each.
+ * Using the correct defines correctly will cause overhead,
+ * so just calculate the correct offset.
+ */
-+ mask = key->hw_key_idx % 8;
-+ field.bit_offset = (3 * mask);
++ field.bit_offset = (4 * key->keyidx);
+ field.bit_mask = 0x7 << field.bit_offset;
+
+ offset = SHARED_KEY_MODE_ENTRY(key->hw_key_idx / 8);
+ rt2x00pci_register_read(rt2x00dev, offset, ®);
+ rt2x00_set_field32(®, field,
-+ (crypto->cmd == SET_KEY) ? crypto->cipher : 0);
++ (crypto->cmd == SET_KEY) * crypto->cipher);
+ rt2x00pci_register_write(rt2x00dev, offset, reg);
+
+ /*
+ struct hw_key_entry key_entry;
+ u32 offset;
+
-+ /*
-+ * 1 pairwise key is possible per AID, this means that the AID
-+ * equals our hw_key_idx.
-+ */
-+ key->hw_key_idx = crypto->aid;
-+
+ if (crypto->cmd == SET_KEY) {
++ /*
++ * 1 pairwise key is possible per AID, this means that the AID
++ * equals our hw_key_idx.
++ */
++ key->hw_key_idx = crypto->aid;
++
+ memcpy(key_entry.key, crypto->key,
+ sizeof(key_entry.key));
+ memcpy(key_entry.tx_mic, crypto->tx_mic,
+ offset = PAIRWISE_KEY_ENTRY(key->hw_key_idx);
+ rt2x00pci_register_multiwrite(rt2x00dev, offset,
+ &key_entry, sizeof(key_entry));
-+
-+ /*
-+ * The driver does not support the IV/EIV generation
-+ * in hardware. However it doesn't support the IV/EIV
-+ * inside the ieee80211 frame either, but requires it
-+ * to be provided seperately for the descriptor.
-+ * rt2x00lib will cut the IV/EIV data out of all frames
-+ * given to us by mac80211, but we must tell mac80211
-+ * to generate the IV/EIV data.
-+ */
-+ key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
+ }
+
+ /*
+ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_PSPOLL,
+ !(filter_flags & FIF_CONTROL));
+ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BA, 1);
-+ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, 1);
++ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, 0);
+ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_CNTL,
+ !(filter_flags & FIF_CONTROL));
+ rt2x00pci_register_write(rt2x00dev, RX_FILTER_CFG, reg);
+
+ rt2x00pci_register_read(rt2x00dev, TX_TIMEOUT_CFG, ®);
+ rt2x00_set_field32(®, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT,
-+ erp->ack_timeout);
++ DIV_ROUND_UP(erp->ack_timeout, erp->slot_time));
+ rt2x00pci_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
+
+ rt2x00pci_register_read(rt2x00dev, AUTO_RSP_CFG, ®);
+
+ rt2x00pci_register_write(rt2x00dev, LEGACY_BASIC_RATE,
+ erp->basic_rates);
-+ rt2x00pci_register_write(rt2x00dev, HT_BASIC_RATE,
-+ erp->basic_rates >> 32);
++ rt2x00pci_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
+
+ rt2x00pci_register_read(rt2x00dev, BKOFF_SLOT_CFG, ®);
+ rt2x00_set_field32(®, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
+ */
+ rt2x00pci_register_read(rt2x00dev, RX_STA_CNT0, ®);
+ qual->rx_failed = rt2x00_get_field32(reg, RX_STA_CNT0_CRC_ERR);
-+
-+ /*
-+ * Update False CCA count from register.
-+ */
-+ rt2x00pci_register_read(rt2x00dev, RX_STA_CNT1, ®);
-+ qual->false_cca = rt2x00_get_field32(reg, RX_STA_CNT1_FALSE_CCA);
+}
+
+static u8 rt2800pci_get_default_vgc(struct rt2x00_dev *rt2x00dev)
+ return FIRMWARE_RT2860;
+}
+
-+static u16 rt2800pci_get_firmware_crc(const void *data, const size_t len)
++static int rt2800pci_check_firmware(struct rt2x00_dev *rt2x00dev,
++ const u8 *data, const size_t len)
+{
++ u16 fw_crc;
+ u16 crc;
+
+ /*
++ * Only support 8kb firmware files.
++ */
++ if (len != 8192)
++ return FW_BAD_LENGTH;
++
++ /*
++ * The last 2 bytes in the firmware array are the crc checksum itself,
++ * this means that we should never pass those 2 bytes to the crc
++ * algorithm.
++ */
++ fw_crc = (data[len - 2] << 8 | data[len - 1]);
++
++ /*
+ * Use the crc ccitt algorithm.
+ * This will return the same value as the legacy driver which
+ * used bit ordering reversion on the both the firmware bytes
+ * before input input as well as on the final output.
+ * Obviously using crc ccitt directly is much more efficient.
-+ * The last 2 bytes in the firmware array are the crc checksum itself,
-+ * this means that we should never pass those 2 bytes to the crc
-+ * algorithm.
+ */
+ crc = crc_ccitt(~0, data, len - 2);
+
+ * will be swapped, use swab16 to convert the crc to the correct
+ * value.
+ */
-+ return swab16(crc);
++ crc = swab16(crc);
++
++ return (fw_crc == crc) ? FW_OK : FW_BAD_CRC;
+}
+
+static int rt2800pci_load_firmware(struct rt2x00_dev *rt2x00dev,
-+ const void *data, const size_t len)
++ const u8 *data, const size_t len)
+{
+ unsigned int i;
+ u32 reg;
+
-+ if (len != 8192) {
-+ ERROR(rt2x00dev, "Invalid firmware file length (len=%zu)\n", len);
-+ return -ENOENT;
-+ }
-+
+ /*
+ * Wait for stable hardware.
+ */
+ rt2x00pci_register_write(rt2x00dev, TX_BASE_PTR0, entry_priv->desc_dma);
+ rt2x00pci_register_write(rt2x00dev, TX_MAX_CNT0, rt2x00dev->tx[0].limit);
+ rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX0, 0);
++ rt2x00pci_register_write(rt2x00dev, TX_DTX_IDX0, 0);
+
+ entry_priv = rt2x00dev->tx[1].entries[0].priv_data;
+ rt2x00pci_register_write(rt2x00dev, TX_BASE_PTR1, entry_priv->desc_dma);
+ rt2x00pci_register_write(rt2x00dev, TX_MAX_CNT1, rt2x00dev->tx[1].limit);
+ rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX1, 0);
++ rt2x00pci_register_write(rt2x00dev, TX_DTX_IDX1, 0);
+
+ entry_priv = rt2x00dev->tx[2].entries[0].priv_data;
+ rt2x00pci_register_write(rt2x00dev, TX_BASE_PTR2, entry_priv->desc_dma);
+ rt2x00pci_register_write(rt2x00dev, TX_MAX_CNT2, rt2x00dev->tx[2].limit);
+ rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX2, 0);
++ rt2x00pci_register_write(rt2x00dev, TX_DTX_IDX2, 0);
+
+ entry_priv = rt2x00dev->tx[3].entries[0].priv_data;
+ rt2x00pci_register_write(rt2x00dev, TX_BASE_PTR3, entry_priv->desc_dma);
+ rt2x00pci_register_write(rt2x00dev, TX_MAX_CNT3, rt2x00dev->tx[3].limit);
+ rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX3, 0);
++ rt2x00pci_register_write(rt2x00dev, TX_DTX_IDX3, 0);
+
+ entry_priv = rt2x00dev->rx->entries[0].priv_data;
+ rt2x00pci_register_write(rt2x00dev, RX_BASE_PTR, entry_priv->desc_dma);
+ rt2x00pci_register_write(rt2x00dev, RX_MAX_CNT, rt2x00dev->rx[0].limit);
+ rt2x00pci_register_write(rt2x00dev, RX_CRX_IDX, 0);
++ rt2x00pci_register_write(rt2x00dev, RX_DRX_IDX, 0);
+
+ /*
+ * Enable global DMA configuration
+ rt2x00_set_field32(®, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
+ rt2x00pci_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+
-+ rt2x00pci_register_write(rt2x00dev, TX_SW_CFG0, 0x00040a06);
++ rt2x00pci_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
+ rt2x00pci_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
+
+ rt2x00pci_register_read(rt2x00dev, TX_LINK_CFG, ®);
+ rt2x00pci_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
+
+ rt2x00pci_register_read(rt2x00dev, CCK_PROT_CFG, ®);
-+ rt2x00_set_field32(®, CCK_PROT_CFG_PROTECT_RATE, 3);
++ rt2x00_set_field32(®, CCK_PROT_CFG_PROTECT_RATE, 8);
+ rt2x00_set_field32(®, CCK_PROT_CFG_PROTECT_CTRL, 0);
+ rt2x00_set_field32(®, CCK_PROT_CFG_PROTECT_NAV, 1);
+ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_CCK, 1);
+ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
+ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_MM20, 1);
-+ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 0);
++ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1);
+ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
+ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+ rt2x00pci_register_write(rt2x00dev, CCK_PROT_CFG, reg);
+
+ rt2x00pci_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
-+ rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_RATE, 3);
++ rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_RATE, 8);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_CTRL, 0);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_NAV, 1);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_CCK, 1);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_MM20, 1);
-+ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 0);
++ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+ rt2x00pci_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
+ rt2x00pci_register_read(rt2x00dev, LG_FBK_CFG0, ®);
+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS0FBK, 8);
+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS1FBK, 8);
-+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS2FBK, 10);
-+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS3FBK, 11);
-+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS4FBK, 12);
-+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS5FBK, 13);
-+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS6FBK, 14);
-+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS7FBK, 15);
++ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS2FBK, 3);
++ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS3FBK, 10);
++ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS4FBK, 11);
++ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS5FBK, 12);
++ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS6FBK, 13);
++ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS7FBK, 14);
+ rt2x00pci_register_write(rt2x00dev, LG_FBK_CFG0, reg);
+
+ rt2x00pci_register_read(rt2x00dev, LG_FBK_CFG1, ®);
+ */
+ rt2x00_desc_read(txwi, 0, &word);
+ rt2x00_set_field32(&word, TXWI_W0_FRAG,
-+ test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags) ||
+ test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
+ rt2x00_set_field32(&word, TXWI_W0_MIMO_PS, 0);
+ rt2x00_set_field32(&word, TXWI_W0_CF_ACK, 0);
+ rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX(qidx), idx);
+}
+
++static void rt2800pci_kill_tx_queue(struct rt2x00_dev *rt2x00dev,
++ const enum data_queue_qid qid)
++{
++ u32 reg;
++
++ if (qid == QID_BEACON) {
++ rt2x00pci_register_write(rt2x00dev, BCN_TIME_CFG, 0);
++ return;
++ }
++
++ rt2x00pci_register_read(rt2x00dev, WPDMA_RST_IDX, ®);
++ rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX0, (qid == QID_AC_BE));
++ rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX1, (qid == QID_AC_BK));
++ rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX2, (qid == QID_AC_VI));
++ rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX3, (qid == QID_AC_VO));
++ rt2x00pci_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
++}
++
+/*
+ * RX control handlers
+ */
+
+ rxdesc->rssi =
+ (rt2x00_get_field32(rxwi2, RXWI_W2_RSSI0) +
-+ rt2x00_get_field32(rxwi2, RXWI_W2_RSSI1) +
-+ rt2x00_get_field32(rxwi2, RXWI_W2_RSSI2)) / 3;
++ rt2x00_get_field32(rxwi2, RXWI_W2_RSSI1)) / 2;
+
+ rxdesc->noise =
+ (rt2x00_get_field32(rxwi3, RXWI_W3_SNR0) +
+ eeprom.data = rt2x00dev;
+ eeprom.register_read = rt2800pci_eepromregister_read;
+ eeprom.register_write = rt2800pci_eepromregister_write;
-+ eeprom.width = rt2x00_get_field32(reg, E2PROM_CSR_TYPE_93C46) ?
++ eeprom.width = !rt2x00_get_field32(reg, E2PROM_CSR_TYPE) ?
+ PCI_EEPROM_WIDTH_93C46 : PCI_EEPROM_WIDTH_93C66;
+ eeprom.reg_data_in = 0;
+ eeprom.reg_data_out = 0;
+ .irq_handler = rt2800pci_interrupt,
+ .probe_hw = rt2800pci_probe_hw,
+ .get_firmware_name = rt2800pci_get_firmware_name,
-+ .get_firmware_crc = rt2800pci_get_firmware_crc,
++ .check_firmware = rt2800pci_check_firmware,
+ .load_firmware = rt2800pci_load_firmware,
+ .initialize = rt2x00pci_initialize,
+ .uninitialize = rt2x00pci_uninitialize,
+ .write_tx_data = rt2x00pci_write_tx_data,
+ .write_beacon = rt2800pci_write_beacon,
+ .kick_tx_queue = rt2800pci_kick_tx_queue,
++ .kill_tx_queue = rt2800pci_kill_tx_queue,
+ .fill_rxdone = rt2800pci_fill_rxdone,
+ .config_shared_key = rt2800pci_config_shared_key,
+ .config_pairwise_key = rt2800pci_config_pairwise_key,
+module_exit(rt2800pci_exit);
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800pci.h
-@@ -0,0 +1,1881 @@
+@@ -0,0 +1,1877 @@
+/*
+ Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
+ <http://rt2x00.serialmonkey.com>
+/*
+ * E2PROM_CSR: EEPROM control register.
+ * RELOAD: Write 1 to reload eeprom content.
-+ * TYPE_93C46: 1: 93c46, 0:93c66.
++ * TYPE: 0: 93c46, 1:93c66.
+ * LOAD_STATUS: 1:loading, 0:done.
+ */
+#define E2PROM_CSR 0x0004
+#define E2PROM_CSR_CHIP_SELECT FIELD32(0x00000002)
+#define E2PROM_CSR_DATA_IN FIELD32(0x00000004)
+#define E2PROM_CSR_DATA_OUT FIELD32(0x00000008)
-+#define E2PROM_CSR_TYPE_93C46 FIELD32(0x00000020)
++#define E2PROM_CSR_TYPE FIELD32(0x00000030)
+#define E2PROM_CSR_LOAD_STATUS FIELD32(0x00000040)
+#define E2PROM_CSR_RELOAD FIELD32(0x00000080)
+
+#define MPDU_DENSITY_CNT_RX_ZERO_DEL FIELD32(0xffff0000)
+
+/*
-+ * Security key table memory, base address = 0x1800
-+ */
-+struct hw_pairwise_ta_entry {
-+ u8 address[6];
-+ u8 reserved[2];
-+} __attribute__ ((packed));
-+
-+struct wcid_entry {
-+ u8 rx_ba_bitmat7;
-+ u8 rx_ba_bitmat0;
-+ u8 mac[6];
-+} __attribute__ ((packed));
-+
-+struct hw_key_entry {
-+ u8 key[16];
-+ u8 tx_mic[8];
-+ u8 rx_mic[8];
-+} __attribute__ ((packed));
-+
-+/*
+ * Security key table memory.
+ * MAC_WCID_BASE: 8-bytes (use only 6 bytes) * 256 entry
+ * PAIRWISE_KEY_TABLE_BASE: 32-byte * 256 entry
-+ * PAIRWISE_IVEIV_TABLE_BASE: 8-byte * 256-entry
+ * MAC_IVEIV_TABLE_BASE: 8-byte * 256-entry
+ * MAC_WCID_ATTRIBUTE_BASE: 4-byte * 256-entry
+ * SHARED_KEY_TABLE_BASE: 32-byte * 16-entry
-+ * SHARED_KEY_MODE_BASE: 32-byte * 16-entry
++ * SHARED_KEY_MODE_BASE: 4-byte * 16-entry
+ */
+#define MAC_WCID_BASE 0x1800
+#define PAIRWISE_KEY_TABLE_BASE 0x4000
-+#define PAIRWISE_IVEIV_TABLE_BASE 0x6000
+#define MAC_IVEIV_TABLE_BASE 0x6000
+#define MAC_WCID_ATTRIBUTE_BASE 0x6800
+#define SHARED_KEY_TABLE_BASE 0x6c00
+#define SHARED_KEY_MODE_BASE 0x7000
+
++#define MAC_WCID_ENTRY(__idx) \
++ ( MAC_WCID_BASE + ((__idx) * sizeof(struct mac_wcid_entry)) )
++#define PAIRWISE_KEY_ENTRY(__idx) \
++ ( PAIRWISE_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
++#define MAC_IVEIV_ENTRY(__idx) \
++ ( MAC_IVEIV_TABLE_BASE + ((__idx) & sizeof(struct mac_iveiv_entry)) )
++#define MAC_WCID_ATTR_ENTRY(__idx) \
++ ( MAC_WCID_ATTRIBUTE_BASE + ((__idx) * sizeof(u32)) )
+#define SHARED_KEY_ENTRY(__idx) \
-+ ( SHARED_KEY_TABLE_BASE + \
-+ ((__idx) * sizeof(struct hw_key_entry)) )
++ ( SHARED_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
+#define SHARED_KEY_MODE_ENTRY(__idx) \
+ ( SHARED_KEY_MODE_BASE + ((__idx) * sizeof(u32)) )
-+#define PAIRWISE_KEY_ENTRY(__idx) \
-+ ( PAIRWISE_KEY_TABLE_BASE + \
-+ ((__idx) * sizeof(struct hw_key_entry)) )
+
-+#define MAC_WCID_ENTRY(__idx) \
-+ ( MAC_WCID_BASE + (2 * sizeof(u32) * (__idx)) )
-+#define MAC_WCID_ATTR_ENTRY(__idx) \
-+ ( MAC_WCID_ATTRIBUTE_BASE + ((__idx) * sizeof(u32)) )
++struct mac_wcid_entry {
++ u8 mac[6];
++ u8 reserved[2];
++} __attribute__ ((packed));
++
++struct hw_key_entry {
++ u8 key[16];
++ u8 tx_mic[8];
++ u8 rx_mic[8];
++} __attribute__ ((packed));
++
++struct mac_iveiv_entry {
++ u8 iv[8];
++} __attribute__ ((packed));
++
++/*
++ * MAC_IVEIV:
++ */
++#define MAC_IVEIV_EIV FIELD32(0x20000000)
++#define MAC_IVEIV_KEYIDX FIELD32(0xc0000000)
+
+/*
+ * MAC_WCID_ATTRIBUTE:
-+ * KEYTAB: 0: shared key table, 1: pairwise key table
-+ * BSS_IDX: multipleBSS index for the WCID
+ */
+#define MAC_WCID_ATTRIBUTE_KEYTAB FIELD32(0x00000001)
-+#define MAC_WCID_ATTRIBUTE_PAIRKEY_MODE FIELD32(0x0000000e)
++#define MAC_WCID_ATTRIBUTE_CIPHER FIELD32(0x0000000e)
+#define MAC_WCID_ATTRIBUTE_BSS_IDX FIELD32(0x00000070)
+#define MAC_WCID_ATTRIBUTE_RX_WIUDF FIELD32(0x00000380)
+
+#endif /* RT2800PCI_H */
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
-@@ -139,6 +139,10 @@ struct rt2x00_chip {
+@@ -138,6 +138,10 @@ struct rt2x00_chip {
#define RT2561 0x0302
#define RT2661 0x0401
#define RT2571 0x1300
-From e380f1fa260d81cba1ebb1b6c333ef8c31f2a8c5 Mon Sep 17 00:00:00 2001
+From ec4f9f97afa3f792cf64035b8458bf2f8648a76f Mon Sep 17 00:00:00 2001
From: Ivo van Doorn <IvDoorn@gmail.com>
-Date: Fri, 23 Jan 2009 17:16:11 +0100
+Date: Wed, 4 Feb 2009 20:45:56 +0100
Subject: [PATCH] rt2x00: Implement support for rt2800usb
Add support for the rt2800usb chipset.
---
drivers/net/wireless/rt2x00/Kconfig | 14 +
drivers/net/wireless/rt2x00/Makefile | 1 +
- drivers/net/wireless/rt2x00/rt2800usb.c | 2905 +++++++++++++++++++++++++++++++
- drivers/net/wireless/rt2x00/rt2800usb.h | 1944 +++++++++++++++++++++
+ drivers/net/wireless/rt2x00/rt2800usb.c | 2928 +++++++++++++++++++++++++++++++
+ drivers/net/wireless/rt2x00/rt2800usb.h | 1940 ++++++++++++++++++++
drivers/net/wireless/rt2x00/rt2x00.h | 7 +
- 5 files changed, 4871 insertions(+), 0 deletions(-)
+ 5 files changed, 4890 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/wireless/rt2x00/rt2800usb.c
create mode 100644 drivers/net/wireless/rt2x00/rt2800usb.h
+obj-$(CONFIG_RT2800USB) += rt2800usb.o
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
-@@ -0,0 +1,2905 @@
+@@ -0,0 +1,2928 @@
+/*
+ Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
+ <http://rt2x00.serialmonkey.com>
+ struct rt2x00lib_crypto *crypto,
+ struct ieee80211_key_conf *key)
+{
++ struct mac_wcid_entry wcid_entry;
++ struct mac_iveiv_entry iveiv_entry;
+ u32 offset;
+ u32 reg;
+
+ offset = MAC_WCID_ATTR_ENTRY(crypto->aid);
+
-+ reg = 0;
++ rt2x00usb_register_read(rt2x00dev, offset, ®);
+ rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_KEYTAB,
+ !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE));
-+ rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_PAIRKEY_MODE,
-+ crypto->cipher);
++ rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_CIPHER, crypto->cipher);
+ rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_BSS_IDX,
-+ (crypto->cmd == SET_KEY) ? crypto->bssidx : 0);
++ (crypto->cmd == SET_KEY) * crypto->bssidx);
+ rt2x00_set_field32(®, MAC_WCID_ATTRIBUTE_RX_WIUDF, 0);
+ rt2x00usb_register_write(rt2x00dev, offset, reg);
++
++ offset = MAC_IVEIV_ENTRY(crypto->aid);
++
++ memset(&iveiv_entry, 0, sizeof(iveiv_entry));
++ if ((crypto->cipher == CIPHER_TKIP) ||
++ (crypto->cipher == CIPHER_TKIP_NO_MIC) ||
++ (crypto->cipher == CIPHER_AES))
++ iveiv_entry.iv[3] |= 0x20;
++ iveiv_entry.iv[3] |= key->keyidx << 6;
++ rt2x00usb_register_multiwrite(rt2x00dev, offset,
++ &iveiv_entry, sizeof(iveiv_entry));
++
++ offset = MAC_WCID_ENTRY(crypto->aid);
++
++ memset(&wcid_entry, 0, sizeof(wcid_entry));
++ if (crypto->cmd == SET_KEY)
++ memcpy(&wcid_entry, crypto->address, ETH_ALEN);
++ rt2x00usb_register_multiwrite(rt2x00dev, offset,
++ &wcid_entry, sizeof(wcid_entry));
+}
+
+static int rt2800usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00_field32 field;
+ int timeout;
+ u32 offset;
-+ u32 mask;
+ u32 reg;
+
+ if (crypto->cmd == SET_KEY) {
++ key->hw_key_idx = (4 * crypto->bssidx) + key->keyidx;
++
+ memcpy(key_entry.key, crypto->key,
+ sizeof(key_entry.key));
+ memcpy(key_entry.tx_mic, crypto->tx_mic,
+ offset, &key_entry,
+ sizeof(key_entry),
+ timeout);
-+
-+ /*
-+ * The driver does not support the IV/EIV generation
-+ * in hardware. However it doesn't support the IV/EIV
-+ * inside the ieee80211 frame either, but requires it
-+ * to be provided seperately for the descriptor.
-+ * rt2x00lib will cut the IV/EIV data out of all frames
-+ * given to us by mac80211, but we must tell mac80211
-+ * to generate the IV/EIV data.
-+ */
-+ key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
+ }
+
+ /*
+ * The cipher types are stored over multiple registers
+ * starting with SHARED_KEY_MODE_BASE each word will have
-+ * 32 bits and contains the cipher types for 2 modes each.
++ * 32 bits and contains the cipher types for 2 bssidx each.
+ * Using the correct defines correctly will cause overhead,
+ * so just calculate the correct offset.
+ */
-+ mask = key->hw_key_idx % 8;
-+ field.bit_offset = (3 * mask);
++ field.bit_offset = (4 * key->keyidx);
+ field.bit_mask = 0x7 << field.bit_offset;
+
+ offset = SHARED_KEY_MODE_ENTRY(key->hw_key_idx / 8);
++
+ rt2x00usb_register_read(rt2x00dev, offset, ®);
+ rt2x00_set_field32(®, field,
-+ (crypto->cmd == SET_KEY) ? crypto->cipher : 0);
++ (crypto->cmd == SET_KEY) * crypto->cipher);
+ rt2x00usb_register_write(rt2x00dev, offset, reg);
+
+ /*
+ int timeout;
+ u32 offset;
+
-+ /*
-+ * 1 pairwise key is possible per AID, this means that the AID
-+ * equals our hw_key_idx.
-+ */
-+ key->hw_key_idx = crypto->aid;
-+
+ if (crypto->cmd == SET_KEY) {
++ /*
++ * 1 pairwise key is possible per AID, this means that the AID
++ * equals our hw_key_idx.
++ */
++ key->hw_key_idx = crypto->aid;
++
+ memcpy(key_entry.key, crypto->key,
+ sizeof(key_entry.key));
+ memcpy(key_entry.tx_mic, crypto->tx_mic,
+ offset, &key_entry,
+ sizeof(key_entry),
+ timeout);
-+
-+ /*
-+ * The driver does not support the IV/EIV generation
-+ * in hardware. However it doesn't support the IV/EIV
-+ * inside the ieee80211 frame either, but requires it
-+ * to be provided seperately for the descriptor.
-+ * rt2x00lib will cut the IV/EIV data out of all frames
-+ * given to us by mac80211, but we must tell mac80211
-+ * to generate the IV/EIV data.
-+ */
-+ key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
+ }
+
+ /*
+ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_PSPOLL,
+ !(filter_flags & FIF_CONTROL));
+ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BA, 1);
-+ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, 1);
++ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, 0);
+ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_CNTL,
+ !(filter_flags & FIF_CONTROL));
+ rt2x00usb_register_write(rt2x00dev, RX_FILTER_CFG, reg);
+
+ rt2x00usb_register_read(rt2x00dev, TX_TIMEOUT_CFG, ®);
+ rt2x00_set_field32(®, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT,
-+ erp->ack_timeout);
++ DIV_ROUND_UP(erp->ack_timeout, erp->slot_time));
+ rt2x00usb_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
+
+ rt2x00usb_register_read(rt2x00dev, AUTO_RSP_CFG, ®);
+
+ rt2x00usb_register_write(rt2x00dev, LEGACY_BASIC_RATE,
+ erp->basic_rates);
-+ rt2x00usb_register_write(rt2x00dev, HT_BASIC_RATE,
-+ erp->basic_rates >> 32);
++ rt2x00usb_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
+
+ rt2x00usb_register_read(rt2x00dev, BKOFF_SLOT_CFG, ®);
+ rt2x00_set_field32(®, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
+ */
+ rt2x00usb_register_read(rt2x00dev, RX_STA_CNT0, ®);
+ qual->rx_failed = rt2x00_get_field32(reg, RX_STA_CNT0_CRC_ERR);
-+
-+ /*
-+ * Update False CCA count from register.
-+ */
-+ rt2x00usb_register_read(rt2x00dev, RX_STA_CNT1, ®);
-+ qual->false_cca = rt2x00_get_field32(reg, RX_STA_CNT1_FALSE_CCA);
+}
+
+static u8 rt2800usb_get_default_vgc(struct rt2x00_dev *rt2x00dev)
+ return FIRMWARE_RT2870;
+}
+
-+static u16 rt2800usb_get_firmware_crc(const void *data, const size_t len)
++static bool rt2800usb_check_crc(const u8 *data, const size_t len)
+{
++ u16 fw_crc;
+ u16 crc;
+
+ /*
++ * The last 2 bytes in the firmware array are the crc checksum itself,
++ * this means that we should never pass those 2 bytes to the crc
++ * algorithm.
++ */
++ fw_crc = (data[len - 2] << 8 | data[len - 1]);
++
++ /*
+ * Use the crc ccitt algorithm.
+ * This will return the same value as the legacy driver which
+ * used bit ordering reversion on the both the firmware bytes
+ * before input input as well as on the final output.
+ * Obviously using crc ccitt directly is much more efficient.
-+ * The last 2 bytes in the firmware array are the crc checksum itself,
-+ * this means that we should never pass those 2 bytes to the crc
-+ * algorithm.
+ */
+ crc = crc_ccitt(~0, data, len - 2);
+
+ * will be swapped, use swab16 to convert the crc to the correct
+ * value.
+ */
-+ return swab16(crc);
++ crc = swab16(crc);
++
++ return fw_crc == crc;
+}
+
-+static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
-+ const void *data, const size_t len)
++static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
++ const u8 *data, const size_t len)
+{
-+ unsigned int i;
-+ int status;
-+ u32 reg;
-+ u32 offset;
-+ u32 length;
+ u16 chipset = (rt2x00_rev(&rt2x00dev->chip) >> 16) & 0xffff;
++ size_t offset = 0;
+
+ /*
+ * Firmware files:
+ * within the file. The first blob is the same firmware as (a),
+ * but the second blob is for the additional chipsets.
+ */
-+ if (len != 4096 && len != 8192) {
-+ ERROR(rt2x00dev, "Invalid firmware file length (len=%zu)\n", len);
-+ return -ENOENT;
++ if (len != 4096 && len != 8192)
++ return FW_BAD_LENGTH;
++
++ /*
++ * Check if we need the upper 4kb firmware data or not.
++ */
++ if ((len == 4096) &&
++ (chipset != 0x2860) &&
++ (chipset != 0x2872) &&
++ (chipset != 0x3070))
++ return FW_BAD_VERSION;
++
++ /*
++ * 8kb firmware files must be checked as if it were
++ * 2 seperate firmware files.
++ */
++ while (offset < len) {
++ if (!rt2800usb_check_crc(data + offset, 4096))
++ return FW_BAD_CRC;
++
++ offset += 4096;
+ }
+
++ return FW_OK;
++}
++
++static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
++ const u8 *data, const size_t len)
++{
++ unsigned int i;
++ int status;
++ u32 reg;
++ u32 offset;
++ u32 length;
++ u16 chipset = (rt2x00_rev(&rt2x00dev->chip) >> 16) & 0xffff;
++
++ /*
++ * Check which section of the firmware we need.
++ */
+ if ((chipset == 0x2860) || (chipset == 0x2872) || (chipset == 0x3070)) {
+ offset = 0;
+ length = 4096;
-+ } else if (len == 8192) {
++ } else {
+ offset = 4096;
+ length = 4096;
-+ } else {
-+ ERROR(rt2x00dev,
-+ "Current firmware does not support detected chipset %04x.\n",
-+ chipset);
-+ ERROR(rt2x00dev,
-+ "Please upgrade to a more recent firmware version.\n");
-+ return -ENOENT;
+ }
+
+ /*
+ rt2x00usb_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
+ rt2x00usb_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
+ } else {
-+ rt2x00usb_register_write(rt2x00dev, TX_SW_CFG0, 0x00040a06);
++ rt2x00usb_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
+ rt2x00usb_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
+ }
+
+ rt2x00usb_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
+
+ rt2x00usb_register_read(rt2x00dev, CCK_PROT_CFG, ®);
-+ rt2x00_set_field32(®, CCK_PROT_CFG_PROTECT_RATE, 3);
++ rt2x00_set_field32(®, CCK_PROT_CFG_PROTECT_RATE, 8);
+ rt2x00_set_field32(®, CCK_PROT_CFG_PROTECT_CTRL, 0);
+ rt2x00_set_field32(®, CCK_PROT_CFG_PROTECT_NAV, 1);
+ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_CCK, 1);
+ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
+ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_MM20, 1);
-+ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 0);
++ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1);
+ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
+ rt2x00_set_field32(®, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+ rt2x00usb_register_write(rt2x00dev, CCK_PROT_CFG, reg);
+
+ rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
-+ rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_RATE, 3);
++ rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_RATE, 8);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_CTRL, 0);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_NAV, 1);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_CCK, 1);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_MM20, 1);
-+ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 0);
++ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+ rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
+ rt2x00usb_register_read(rt2x00dev, LG_FBK_CFG0, ®);
+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS0FBK, 8);
+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS1FBK, 8);
-+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS2FBK, 10);
-+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS3FBK, 11);
-+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS4FBK, 12);
-+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS5FBK, 13);
-+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS6FBK, 14);
-+ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS7FBK, 15);
++ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS2FBK, 3);
++ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS3FBK, 10);
++ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS4FBK, 11);
++ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS5FBK, 12);
++ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS6FBK, 13);
++ rt2x00_set_field32(®, LG_FBK_CFG0_OFDMMCS7FBK, 14);
+ rt2x00usb_register_write(rt2x00dev, LG_FBK_CFG0, reg);
+
+ rt2x00usb_register_read(rt2x00dev, LG_FBK_CFG1, ®);
+{
+ struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
+ __le32 *txi = skbdesc->desc;
-+ __le32 *txwi = txi + TXINFO_DESC_SIZE;
++ __le32 *txwi = &txi[TXINFO_DESC_SIZE / sizeof(__le32)];
+ u32 word;
+
+ /*
+ */
+ rt2x00_desc_read(txwi, 0, &word);
+ rt2x00_set_field32(&word, TXWI_W0_FRAG,
-+ test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags) ||
+ test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
+ rt2x00_set_field32(&word, TXWI_W0_MIMO_PS, 0);
+ rt2x00_set_field32(&word, TXWI_W0_CF_ACK, 0);
+ */
+ rt2x00_desc_read(txi, 0, &word);
+ rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_PKT_LEN,
-+ roundup(skb->len + TXWI_DESC_SIZE, 4));
++ skb->len + TXWI_DESC_SIZE);
+ rt2x00_set_field32(&word, TXINFO_W0_WIV, 1);
+ rt2x00_set_field32(&word, TXINFO_W0_QSEL, 2);
+ rt2x00_set_field32(&word, TXINFO_W0_SW_USE_LAST_ROUND, 0);
+ int length;
+
+ /*
-+ * The length _must_ be a multiple of 4,
++ * The length _must_ include 4 bytes padding,
++ * it should always be multiple of 4,
+ * but it must _not_ be a multiple of the USB packet size.
+ */
-+ length = roundup(entry->skb->len, 4);
++ length = roundup(entry->skb->len + 4, 4);
+ length += (4 * !(length % entry->queue->usb_maxpacket));
+
+ return length;
+ struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
+ struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
+ __le32 *rxd = (__le32 *)entry->skb->data;
-+ __le32 *rxwi = (__le32 *)(entry->skb->data + skbdesc->desc_len);
++ __le32 *rxwi;
+ u32 rxd0;
+ u32 rxwi0;
+ u32 rxwi1;
+ */
+ memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
+ rxd = (__le32 *)skbdesc->desc;
++ rxwi = &rxd[RXD_DESC_SIZE / sizeof(__le32)];
+
+ /*
+ * It is now safe to read the descriptor on all architectures.
+
+ rxdesc->rssi =
+ (rt2x00_get_field32(rxwi2, RXWI_W2_RSSI0) +
-+ rt2x00_get_field32(rxwi2, RXWI_W2_RSSI1) +
-+ rt2x00_get_field32(rxwi2, RXWI_W2_RSSI2)) / 3;
++ rt2x00_get_field32(rxwi2, RXWI_W2_RSSI1)) / 2;
+
+ rxdesc->noise =
+ (rt2x00_get_field32(rxwi3, RXWI_W3_SNR0) +
+ /*
+ * Remove RXWI descriptor from start of buffer.
+ */
-+ skb_pull(entry->skb, RXWI_DESC_SIZE + skbdesc->desc_len);
++ skb_pull(entry->skb, skbdesc->desc_len);
+ skb_trim(entry->skb, rxdesc->size);
+}
+
+static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
+ .probe_hw = rt2800usb_probe_hw,
+ .get_firmware_name = rt2800usb_get_firmware_name,
-+ .get_firmware_crc = rt2800usb_get_firmware_crc,
++ .check_firmware = rt2800usb_check_firmware,
+ .load_firmware = rt2800usb_load_firmware,
+ .initialize = rt2x00usb_initialize,
+ .uninitialize = rt2x00usb_uninitialize,
+ .write_beacon = rt2800usb_write_beacon,
+ .get_tx_data_len = rt2800usb_get_tx_data_len,
+ .kick_tx_queue = rt2800usb_kick_tx_queue,
++ .kill_tx_queue = rt2x00usb_kill_tx_queue,
+ .fill_rxdone = rt2800usb_fill_rxdone,
+ .config_shared_key = rt2800usb_config_shared_key,
+ .config_pairwise_key = rt2800usb_config_pairwise_key,
+static const struct data_queue_desc rt2800usb_queue_rx = {
+ .entry_num = RX_ENTRIES,
+ .data_size = DATA_FRAME_SIZE,
-+ .desc_size = RXD_DESC_SIZE,
++ .desc_size = RXD_DESC_SIZE + RXWI_DESC_SIZE,
+ .priv_size = sizeof(struct queue_entry_priv_usb),
+};
+
+module_exit(rt2800usb_exit);
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800usb.h
-@@ -0,0 +1,1944 @@
+@@ -0,0 +1,1940 @@
+/*
+ Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
+ <http://rt2x00.serialmonkey.com>
+#define MPDU_DENSITY_CNT_RX_ZERO_DEL FIELD32(0xffff0000)
+
+/*
-+ * Security key table memory, base address = 0x1800
-+ */
-+struct hw_pairwise_ta_entry {
-+ u8 address[6];
-+ u8 reserved[2];
-+} __attribute__ ((packed));
-+
-+struct wcid_entry {
-+ u8 rx_ba_bitmat7;
-+ u8 rx_ba_bitmat0;
-+ u8 mac[6];
-+} __attribute__ ((packed));
-+
-+struct hw_key_entry {
-+ u8 key[16];
-+ u8 tx_mic[8];
-+ u8 rx_mic[8];
-+} __attribute__ ((packed));
-+
-+/*
+ * Security key table memory.
+ * MAC_WCID_BASE: 8-bytes (use only 6 bytes) * 256 entry
+ * PAIRWISE_KEY_TABLE_BASE: 32-byte * 256 entry
-+ * PAIRWISE_IVEIV_TABLE_BASE: 8-byte * 256-entry
+ * MAC_IVEIV_TABLE_BASE: 8-byte * 256-entry
+ * MAC_WCID_ATTRIBUTE_BASE: 4-byte * 256-entry
+ * SHARED_KEY_TABLE_BASE: 32-byte * 16-entry
-+ * SHARED_KEY_MODE_BASE: 32-byte * 16-entry
++ * SHARED_KEY_MODE_BASE: 4-byte * 16-entry
+ */
+#define MAC_WCID_BASE 0x1800
+#define PAIRWISE_KEY_TABLE_BASE 0x4000
-+#define PAIRWISE_IVEIV_TABLE_BASE 0x6000
+#define MAC_IVEIV_TABLE_BASE 0x6000
+#define MAC_WCID_ATTRIBUTE_BASE 0x6800
+#define SHARED_KEY_TABLE_BASE 0x6c00
+#define SHARED_KEY_MODE_BASE 0x7000
+
++#define MAC_WCID_ENTRY(__idx) \
++ ( MAC_WCID_BASE + ((__idx) * sizeof(struct mac_wcid_entry)) )
++#define PAIRWISE_KEY_ENTRY(__idx) \
++ ( PAIRWISE_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
++#define MAC_IVEIV_ENTRY(__idx) \
++ ( MAC_IVEIV_TABLE_BASE + ((__idx) & sizeof(struct mac_iveiv_entry)) )
++#define MAC_WCID_ATTR_ENTRY(__idx) \
++ ( MAC_WCID_ATTRIBUTE_BASE + ((__idx) * sizeof(u32)) )
+#define SHARED_KEY_ENTRY(__idx) \
-+ ( SHARED_KEY_TABLE_BASE + \
-+ ((__idx) * sizeof(struct hw_key_entry)) )
++ ( SHARED_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
+#define SHARED_KEY_MODE_ENTRY(__idx) \
+ ( SHARED_KEY_MODE_BASE + ((__idx) * sizeof(u32)) )
-+#define PAIRWISE_KEY_ENTRY(__idx) \
-+ ( PAIRWISE_KEY_TABLE_BASE + \
-+ ((__idx) * sizeof(struct hw_key_entry)) )
+
-+#define MAC_WCID_ENTRY(__idx) \
-+ ( MAC_WCID_BASE + (2 * sizeof(u32) * (__idx)) )
-+#define MAC_WCID_ATTR_ENTRY(__idx) \
-+ ( MAC_WCID_ATTRIBUTE_BASE + ((__idx) * sizeof(u32)) )
++struct mac_wcid_entry {
++ u8 mac[6];
++ u8 reserved[2];
++} __attribute__ ((packed));
++
++struct hw_key_entry {
++ u8 key[16];
++ u8 tx_mic[8];
++ u8 rx_mic[8];
++} __attribute__ ((packed));
++
++struct mac_iveiv_entry {
++ u8 iv[8];
++} __attribute__ ((packed));
++
++/*
++ * MAC_IVEIV:
++ */
++#define MAC_IVEIV_EIV FIELD32(0x20000000)
++#define MAC_IVEIV_KEYIDX FIELD32(0xc0000000)
+
+/*
+ * MAC_WCID_ATTRIBUTE:
-+ * KEYTAB: 0: shared key table, 1: pairwise key table
-+ * BSS_IDX: multipleBSS index for the WCID
+ */
+#define MAC_WCID_ATTRIBUTE_KEYTAB FIELD32(0x00000001)
-+#define MAC_WCID_ATTRIBUTE_PAIRKEY_MODE FIELD32(0x0000000e)
++#define MAC_WCID_ATTRIBUTE_CIPHER FIELD32(0x0000000e)
+#define MAC_WCID_ATTRIBUTE_BSS_IDX FIELD32(0x00000070)
+#define MAC_WCID_ATTRIBUTE_RX_WIUDF FIELD32(0x00000380)
+
+#endif /* RT2800USB_H */
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
-@@ -143,6 +143,7 @@ struct rt2x00_chip {
+@@ -142,6 +142,7 @@ struct rt2x00_chip {
#define RT2860D 0x0681 /* 2.4GHz, 5GHz PCI/CB */
#define RT2890 0x0701 /* 2.4GHz PCIe */
#define RT2890D 0x0781 /* 2.4GHz, 5GHz PCIe */
u16 rf;
u32 rev;
-@@ -778,6 +779,12 @@ struct rt2x00_dev {
+@@ -780,6 +781,12 @@ struct rt2x00_dev {
u8 freq_offset;
/*
+++ /dev/null
-When freeing rx dma descriptors, use the right buffer size.
-Fixes kernel oopses on module unload on ixp4xx and most likely
-other platforms as well.
-
-Signed-off-by: Felix Fietkau <nbd@openwrt.org>
-
---- a/drivers/net/wireless/ath5k/base.c
-+++ b/drivers/net/wireless/ath5k/base.c
-@@ -310,6 +310,19 @@ static inline void ath5k_txbuf_free(stru
- bf->skb = NULL;
- }
-
-+static inline void ath5k_rxbuf_free(struct ath5k_softc *sc,
-+ struct ath5k_buf *bf)
-+{
-+ BUG_ON(!bf);
-+ if (!bf->skb)
-+ return;
-+ pci_unmap_single(sc->pdev, bf->skbaddr, sc->rxbufsize,
-+ PCI_DMA_FROMDEVICE);
-+ dev_kfree_skb_any(bf->skb);
-+ bf->skb = NULL;
-+}
-+
-+
- /* Queues setup */
- static struct ath5k_txq *ath5k_txq_setup(struct ath5k_softc *sc,
- int qtype, int subtype);
-@@ -1343,7 +1356,7 @@ ath5k_desc_free(struct ath5k_softc *sc,
- list_for_each_entry(bf, &sc->txbuf, list)
- ath5k_txbuf_free(sc, bf);
- list_for_each_entry(bf, &sc->rxbuf, list)
-- ath5k_txbuf_free(sc, bf);
-+ ath5k_rxbuf_free(sc, bf);
-
- /* Free memory associated with all descriptors */
- pci_free_consistent(pdev, sc->desc_len, sc->desc, sc->desc_daddr);
--- a/drivers/net/wireless/ath9k/main.c
+++ b/drivers/net/wireless/ath9k/main.c
-@@ -989,6 +989,9 @@ static void ath_unregister_led(struct at
+@@ -1026,6 +1026,9 @@ static void ath_unregister_led(struct at
static void ath_deinit_leds(struct ath_softc *sc)
{
+ if (AR_SREV_9100(sc->sc_ah))
+ return;
+
+ cancel_delayed_work_sync(&sc->ath_led_blink_work);
ath_unregister_led(&sc->assoc_led);
sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
- ath_unregister_led(&sc->tx_led);
-@@ -1002,6 +1005,9 @@ static void ath_init_leds(struct ath_sof
+@@ -1040,6 +1043,9 @@ static void ath_init_leds(struct ath_sof
char *trigger;
int ret;
--- a/config.mk
+++ b/config.mk
-@@ -95,7 +95,7 @@ ifneq ($(CONFIG_PCI),)
+@@ -98,7 +98,7 @@ ifneq ($(CONFIG_PCI),)
CONFIG_ATH5K=m
# CONFIG_ATH5K_DEBUG is not set
CONFIG_ATH9K=m
projects / openwrt / staging / rmilecki.git / commitdiff