plat: fix switch statements to comply with MISRA rules

Ensure (where possible) that switch statements in plat comply with MISRA
rules 16.1 - 16.7.

Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f
Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>

diff --git a/plat/arm/board/fvp/fvp_pm.c b/plat/arm/board/fvp/fvp_pm.c
index f61cdb3c3699e2ef5967577460741c6cdd5d0871..0fa83a5c030eb250ac47100b6d95865b8a98cb82 100644 (file)
--- a/plat/arm/board/fvp/fvp_pm.c
+++ b/plat/arm/board/fvp/fvp_pm.c
@@ -324,13 +324,11 @@ static int fvp_node_hw_state(u_register_t target_cpu,
        if (psysr == PSYSR_INVALID)
                return PSCI_E_INVALID_PARAMS;
 
-       switch (power_level) {
-       case ARM_PWR_LVL0:
+       if (power_level == ARM_PWR_LVL0) {
                ret = (psysr & PSYSR_AFF_L0) ? HW_ON : HW_OFF;
-               break;
-       case ARM_PWR_LVL1:
+       } else {
+               /* power_level == ARM_PWR_LVL1 */
                ret = (psysr & PSYSR_AFF_L1) ? HW_ON : HW_OFF;
-               break;
        }
 
        return ret;

diff --git a/plat/arm/common/arm_bl2_setup.c b/plat/arm/common/arm_bl2_setup.c
index 7add61dabc463609360e46696eb401e14fbd0398..8a6c7680e25f3085c4955748fedd07bcd11fad3d 100644 (file)
--- a/plat/arm/common/arm_bl2_setup.c
+++ b/plat/arm/common/arm_bl2_setup.c
@@ -305,6 +305,9 @@ int arm_bl2_handle_post_image_load(unsigned int image_id)
                }
                break;
 #endif
+       default:
+               /* Do nothing in default case */
+               break;
        }
 
        return err;

diff --git a/plat/common/plat_gicv2.c b/plat/common/plat_gicv2.c
index ca6c03b010804a6019b86b3512ed23c7ad0ebffc..026ea713228779d278fbe558d598ab32bd40b863 100644 (file)
--- a/plat/common/plat_gicv2.c
+++ b/plat/common/plat_gicv2.c
@@ -190,6 +190,8 @@ void plat_ic_set_interrupt_priority(unsigned int id, unsigned int priority)
 
 int plat_ic_has_interrupt_type(unsigned int type)
 {
+       int has_interrupt_type = 0;
+
        switch (type) {
 #if GICV2_G0_FOR_EL3
        case INTR_TYPE_EL3:
@@ -197,10 +199,14 @@ int plat_ic_has_interrupt_type(unsigned int type)
        case INTR_TYPE_S_EL1:
 #endif
        case INTR_TYPE_NS:
-               return 1;
+               has_interrupt_type = 1;
+               break;
        default:
-               return 0;
+               /* Do nothing in default case */
+               break;
        }
+
+       return has_interrupt_type;
 }
 
 void plat_ic_set_interrupt_type(unsigned int id, unsigned int type)
@@ -221,6 +227,7 @@ void plat_ic_set_interrupt_type(unsigned int id, unsigned int type)
                break;
        default:
                assert(0);
+               break;
        }
 
        gicv2_set_interrupt_type(id, gicv2_type);
@@ -260,6 +267,7 @@ void plat_ic_set_spi_routing(unsigned int id, unsigned int routing_mode,
                break;
        default:
                assert(0);
+               break;
        }
 
        gicv2_set_spi_routing(id, proc_num);

diff --git a/plat/common/plat_gicv3.c b/plat/common/plat_gicv3.c
index cf9aca229ff5413974ad7ccffa25b3c8aeee7187..26a4973f99903c2ca57cc5ecd933ca53efa1690f 100644 (file)
--- a/plat/common/plat_gicv3.c
+++ b/plat/common/plat_gicv3.c
@@ -247,6 +247,7 @@ void plat_ic_set_spi_routing(unsigned int id, unsigned int routing_mode,
                break;
        default:
                assert(0);
+               break;
        }
 
        gicv3_set_spi_routing(id, irm, mpidr);

diff --git a/plat/hisilicon/hikey/hikey_bl2_setup.c b/plat/hisilicon/hikey/hikey_bl2_setup.c
index 8bb282485613b09e240c179654c85786880ee145..a78bb1e91147a116b78520007c1e8069c003e7b4 100644 (file)
--- a/plat/hisilicon/hikey/hikey_bl2_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl2_setup.c
@@ -175,6 +175,9 @@ int hikey_bl2_handle_post_image_load(unsigned int image_id)
                }
                break;
 #endif
+       default:
+               /* Do nothing in default case */
+               break;
        }
 
        return err;

diff --git a/plat/hisilicon/hikey960/hikey960_bl2_setup.c b/plat/hisilicon/hikey960/hikey960_bl2_setup.c
index 11bbf9e15106485fcf6c44e5bfe42ef3d29d0b2c..6e726d2f521249ceb7c3bcd1c5ff1fb608737d5f 100644 (file)
--- a/plat/hisilicon/hikey960/hikey960_bl2_setup.c
+++ b/plat/hisilicon/hikey960/hikey960_bl2_setup.c
@@ -267,6 +267,9 @@ int hikey960_bl2_handle_post_image_load(unsigned int image_id)
                }
                break;
 #endif
+       default:
+               /* Do nothing in default case */
+               break;
        }
 
        return err;

diff --git a/plat/hisilicon/poplar/bl2_plat_setup.c b/plat/hisilicon/poplar/bl2_plat_setup.c
index 177630b0359fce4be4299934b348d9c0a39dfb41..2671994a2ad32fbc85365cadf6d76abc64177ad7 100644 (file)
--- a/plat/hisilicon/poplar/bl2_plat_setup.c
+++ b/plat/hisilicon/poplar/bl2_plat_setup.c
@@ -193,6 +193,9 @@ int poplar_bl2_handle_post_image_load(unsigned int image_id)
                }
                break;
 #endif
+       default:
+               /* Do nothing in default case */
+               break;
        }
 
        return err;

diff --git a/plat/mediatek/common/custom/oem_svc.c b/plat/mediatek/common/custom/oem_svc.c
index 08baed874e672eb283a691d14c67bae5edb8305d..49e7571ded765de4d22602074353552737aa766b 100644 (file)
--- a/plat/mediatek/common/custom/oem_svc.c
+++ b/plat/mediatek/common/custom/oem_svc.c
@@ -41,15 +41,8 @@ uint64_t oem_smc_handler(uint32_t smc_fid,
                        void *handle,
                        uint64_t flags)
 {
-       uint64_t rc;
-
-       switch (smc_fid) {
-       default:
-               rc = SMC_UNK;
-               WARN("Unimplemented OEM Call: 0x%x\n", smc_fid);
-       }
-
-       SMC_RET1(handle, rc);
+       WARN("Unimplemented OEM Call: 0x%x\n", smc_fid);
+       SMC_RET1(handle, SMC_UNK);
 }
 
 /*

diff --git a/plat/mediatek/common/mtk_sip_svc.c b/plat/mediatek/common/mtk_sip_svc.c
index beb2a69786d5f7e21109923ea2d022a1d871e70a..869a959048bea585b51bd5c8a610758452bbf5a2 100644 (file)
--- a/plat/mediatek/common/mtk_sip_svc.c
+++ b/plat/mediatek/common/mtk_sip_svc.c
@@ -71,6 +71,9 @@ uint64_t mediatek_sip_handler(uint32_t smc_fid,
                        boot_to_kernel(x1, x2, x3, x4);
                        SMC_RET0(handle);
 #endif
+               default:
+                       /* Do nothing in default case */
+                       break;
                }
        }
 

diff --git a/plat/qemu/qemu_bl2_setup.c b/plat/qemu/qemu_bl2_setup.c
index 7650873e26748ce9fe67ddd5ff7505c670471528..997c85d7adc16afb3a053f23509a85cea5949a59 100644 (file)
--- a/plat/qemu/qemu_bl2_setup.c
+++ b/plat/qemu/qemu_bl2_setup.c
@@ -287,6 +287,9 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id)
                bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
                bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry();
                break;
+       default:
+               /* Do nothing in default case */
+               break;
        }
 
        return err;

diff --git a/plat/rockchip/common/rockchip_sip_svc.c b/plat/rockchip/common/rockchip_sip_svc.c
index 40cc94b7d4ef11d630ccabf6ab31aac69b394358..eca4f99accf834a3e28f98c94b07ddac1d386859 100644 (file)
--- a/plat/rockchip/common/rockchip_sip_svc.c
+++ b/plat/rockchip/common/rockchip_sip_svc.c
@@ -59,13 +59,11 @@ uint64_t sip_smc_handler(uint32_t smc_fid,
        case SIP_SVC_UID:
                /* Return UID to the caller */
                SMC_UUID_RET(handle, rk_sip_svc_uid);
-               break;
 
        case SIP_SVC_VERSION:
                /* Return the version of current implementation */
                SMC_RET2(handle, RK_SIP_SVC_VERSION_MAJOR,
                        RK_SIP_SVC_VERSION_MINOR);
-               break;
 
        default:
                return rockchip_plat_sip_handler(smc_fid, x1, x2, x3, x4,

diff --git a/plat/rockchip/rk3368/plat_sip_calls.c b/plat/rockchip/rk3368/plat_sip_calls.c
index 7383d2f202909a614df591bfe4a71a170a3affa0..03fee88cbc7f8a6781b79725d6748df17bf2d2f5 100644 (file)
--- a/plat/rockchip/rk3368/plat_sip_calls.c
+++ b/plat/rockchip/rk3368/plat_sip_calls.c
@@ -19,9 +19,6 @@ uint64_t rockchip_plat_sip_handler(uint32_t smc_fid,
                                   void *handle,
                                   uint64_t flags)
 {
-       switch (smc_fid) {
-       default:
-               ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
-               SMC_RET1(handle, SMC_UNK);
-       }
+       ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
+       SMC_RET1(handle, SMC_UNK);
 }

diff --git a/plat/rockchip/rk3399/drivers/dram/dfs.c b/plat/rockchip/rk3399/drivers/dram/dfs.c
index d629e4bfb6b04b3c8e2a79929d8a7bb8fbae8116..70d9423b313d82513deb8804ef32b2e5e5d93a77 100644 (file)
--- a/plat/rockchip/rk3399/drivers/dram/dfs.c
+++ b/plat/rockchip/rk3399/drivers/dram/dfs.c
@@ -207,6 +207,9 @@ static void sdram_timing_cfg_init(struct timing_related_config *ptiming_config,
                ptiming_config->rdbi = 0;
                ptiming_config->wdbi = 0;
                break;
+       default:
+               /* Do nothing in default case */
+               break;
        }
        ptiming_config->dramds = drv_config->dram_side_drv;
        ptiming_config->dramodt = drv_config->dram_side_dq_odt;

diff --git a/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c b/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c
index 2e196b54c175d56166c2811b5685731796492954..3527f0e5ecec121cc24f9a5260f0448f489e5881 100644 (file)
--- a/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c
+++ b/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c
@@ -1314,5 +1314,8 @@ void dram_get_parameter(struct timing_related_config *timing_config,
        case LPDDR4:
                lpddr4_get_parameter(timing_config, pdram_timing);
                break;
+       default:
+               /* Do nothing in default case */
+               break;
        }
 }

diff --git a/plat/rockchip/rk3399/drivers/pmu/pmu.c b/plat/rockchip/rk3399/drivers/pmu/pmu.c
index caea7a7237854563b36799ed26302f74210450de..ed1ea8b63c91d8a2d7eb46e836c0de2a27199e1e 100644 (file)
--- a/plat/rockchip/rk3399/drivers/pmu/pmu.c
+++ b/plat/rockchip/rk3399/drivers/pmu/pmu.c
@@ -310,6 +310,7 @@ static int pmu_set_power_domain(uint32_t pd_id, uint32_t pd_state)
                pmu_bus_idle_req(BUS_ID_PERIHP, state);
                break;
        default:
+               /* Do nothing in default case */
                break;
        }
 
@@ -647,12 +648,8 @@ int rockchip_soc_cores_pwr_dm_off(void)
 int rockchip_soc_hlvl_pwr_dm_off(uint32_t lvl,
                                 plat_local_state_t lvl_state)
 {
-       switch (lvl) {
-       case MPIDR_AFFLVL1:
+       if (lvl == MPIDR_AFFLVL1) {
                clst_pwr_domain_suspend(lvl_state);
-               break;
-       default:
-               break;
        }
 
        return PSCI_E_SUCCESS;
@@ -675,12 +672,8 @@ int rockchip_soc_cores_pwr_dm_suspend(void)
 
 int rockchip_soc_hlvl_pwr_dm_suspend(uint32_t lvl, plat_local_state_t lvl_state)
 {
-       switch (lvl) {
-       case MPIDR_AFFLVL1:
+       if (lvl == MPIDR_AFFLVL1) {
                clst_pwr_domain_suspend(lvl_state);
-               break;
-       default:
-               break;
        }
 
        return PSCI_E_SUCCESS;
@@ -698,12 +691,8 @@ int rockchip_soc_cores_pwr_dm_on_finish(void)
 int rockchip_soc_hlvl_pwr_dm_on_finish(uint32_t lvl,
                                       plat_local_state_t lvl_state)
 {
-       switch (lvl) {
-       case MPIDR_AFFLVL1:
+       if (lvl == MPIDR_AFFLVL1) {
                clst_pwr_domain_resume(lvl_state);
-               break;
-       default:
-               break;
        }
 
        return PSCI_E_SUCCESS;
@@ -721,11 +710,8 @@ int rockchip_soc_cores_pwr_dm_resume(void)
 
 int rockchip_soc_hlvl_pwr_dm_resume(uint32_t lvl, plat_local_state_t lvl_state)
 {
-       switch (lvl) {
-       case MPIDR_AFFLVL1:
+       if (lvl == MPIDR_AFFLVL1) {
                clst_pwr_domain_resume(lvl_state);
-       default:
-               break;
        }
 
        return PSCI_E_SUCCESS;

diff --git a/plat/rpi3/rpi3_bl2_setup.c b/plat/rpi3/rpi3_bl2_setup.c
index 1fd822e9aba80a8f6770b739bb69d0ff83b5e914..86c66d022128204f1a4033f80bc4231f194a2fa3 100644 (file)
--- a/plat/rpi3/rpi3_bl2_setup.c
+++ b/plat/rpi3/rpi3_bl2_setup.c
@@ -83,6 +83,9 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
                bl_mem_params->ep_info.spsr = rpi3_get_spsr_for_bl33_entry();
                break;
 
+       default:
+               /* Do nothing in default case */
+               break;
        }
 
        return err;

diff --git a/plat/socionext/uniphier/uniphier_bl2_setup.c b/plat/socionext/uniphier/uniphier_bl2_setup.c
index 54b30e5b11e92bff8711ec6d2580ebee666387a8..f7ae4264641122988ac8cbb27060bc0e9eb44345 100644 (file)
--- a/plat/socionext/uniphier/uniphier_bl2_setup.c
+++ b/plat/socionext/uniphier/uniphier_bl2_setup.c
@@ -85,6 +85,7 @@ void bl2_el3_plat_arch_setup(void)
                break;
        default:
                plat_error_handler(-ENOTSUP);
+               break;
        }
 
        if (!skip_scp) {

diff --git a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
index d7a7d4e2e8f0396bab04a2055c4484ae43602be7..fd054beb9450b08eaae8a6aab6db4e3eb29c9386 100644 (file)
--- a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
+++ b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
@@ -48,6 +48,9 @@ unsigned int zynqmp_get_uart_clk(void)
                return 25000000;
        case ZYNQMP_CSU_VERSION_QEMU:
                return 133000000;
+       default:
+               /* Do nothing in default case */
+               break;
        }
 
        return 100000000;
@@ -187,6 +190,9 @@ static void zynqmp_print_platform_name(void)
        case ZYNQMP_CSU_VERSION_SILICON:
                label = "silicon";
                break;
+       default:
+               /* Do nothing in default case */
+               break;
        }
 
        NOTICE("ATF running on XCZU%s/%s v%d/RTL%d.%d at 0x%x%s\n",
@@ -258,6 +264,9 @@ unsigned int plat_get_syscnt_freq2(void)
                return 4000000;
        case ZYNQMP_CSU_VERSION_QEMU:
                return 50000000;
+       default:
+               /* Do nothing in default case */
+               break;
        }
 
        return mmio_read_32(IOU_SCNTRS_BASEFREQ);