ravb: clear RIC1 in init instead of stop
authorKazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Mon, 14 Dec 2015 16:24:58 +0000 (01:24 +0900)
committerDavid S. Miller <davem@davemloft.net>
Mon, 14 Dec 2015 19:33:09 +0000 (14:33 -0500)
AVB-DMAC Receive FIFO Warning interrupt is not enabled, so it is not
necessary to disable the interrupt in ravb_close().
On the other hand, this patch disables the interrupt in ravb_dmac_init() to
prevent the possibility that the interrupt is issued by the state that
a boot loader left.

Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/renesas/ravb_main.c

index 1cf12264861cf62c17f133e6595860e64a97193c..120cc2565d16c44b39245b8ea62680890dce824b 100644 (file)
@@ -410,9 +410,11 @@ static int ravb_dmac_init(struct net_device *ndev)
        /* Timestamp enable */
        ravb_write(ndev, TCCR_TFEN, TCCR);
 
-       /* Interrupt enable: */
+       /* Interrupt init: */
        /* Frame receive */
        ravb_write(ndev, RIC0_FRE0 | RIC0_FRE1, RIC0);
+       /* Disable FIFO full warning */
+       ravb_write(ndev, 0, RIC1);
        /* Receive FIFO full error, descriptor empty */
        ravb_write(ndev, RIC2_QFE0 | RIC2_QFE1 | RIC2_RFFE, RIC2);
        /* Frame transmitted, timestamp FIFO updated */
@@ -1478,7 +1480,6 @@ static int ravb_close(struct net_device *ndev)
 
        /* Disable interrupts by clearing the interrupt masks. */
        ravb_write(ndev, 0, RIC0);
-       ravb_write(ndev, 0, RIC1);
        ravb_write(ndev, 0, RIC2);
        ravb_write(ndev, 0, TIC);