/* Variable to store the address of TB_FW_CONFIG file */
static void *tb_fw_cfg_dtb;
+static size_t tb_fw_cfg_dtb_size;
#if TRUSTED_BOARD_BOOT
ERROR("BL1: unable to write shared Mbed TLS heap information to DTB\n");
panic();
}
+ /*
+ * Ensure that the info written to the DTB is visible to other
+ * images. It's critical because BL2 won't be able to proceed
+ * without the heap info.
+ */
+ flush_dcache_range((uintptr_t)tb_fw_cfg_dtb,
+ tb_fw_cfg_dtb_size);
}
}
SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY,
VERSION_2, image_info_t, 0),
.image_info.image_base = ARM_TB_FW_CONFIG_BASE,
- .image_info.image_max_size = ARM_TB_FW_CONFIG_LIMIT - ARM_TB_FW_CONFIG_BASE,
+ .image_info.image_max_size =
+ ARM_TB_FW_CONFIG_LIMIT - ARM_TB_FW_CONFIG_BASE
};
VERBOSE("BL1: Loading TB_FW_CONFIG\n");
/* At this point we know that a DTB is indeed available */
config_base = arm_tb_fw_info.image_info.image_base;
tb_fw_cfg_dtb = (void *)config_base;
+ tb_fw_cfg_dtb_size = (size_t)arm_tb_fw_info.image_info.image_max_size;
/* The BL2 ep_info arg0 is modified to point to TB_FW_CONFIG */
image_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID);