fsl_esdhc: Fix max clock frequency
authorJerry Huang <Changm-Ming.Huang@freescale.com>
Thu, 25 Nov 2010 17:06:10 +0000 (17:06 +0000)
committerWolfgang Denk <wd@denx.de>
Sat, 18 Dec 2010 22:15:24 +0000 (23:15 +0100)
The max clock of MMC is 52MHz

Signed-off-by: Jerry Huang <Changm-Ming.Huang@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
drivers/mmc/fsl_esdhc.c

index 73d5cd3826afb5efe5434e8c498f475f76f8b338..7bab2f66d7a8d50c1df30bf150f38ac2a505cf10 100644 (file)
@@ -477,7 +477,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
                mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 
        mmc->f_min = 400000;
-       mmc->f_max = MIN(gd->sdhc_clk, 50000000);
+       mmc->f_max = MIN(gd->sdhc_clk, 52000000);
 
        mmc_register(mmc);