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drm/amd/powerplay: delete SMUM_FIELD_MASK
author
Rex Zhu
<Rex.Zhu@amd.com>
Wed, 20 Sep 2017 09:33:55 +0000
(17:33 +0800)
committer
Alex Deucher
<alexander.deucher@amd.com>
Tue, 26 Sep 2017 19:14:36 +0000
(15:14 -0400)
repeated defining in hwmgr.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c
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diff --git
a/drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c
b/drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c
index efdc1cb7ab634ba6d4c080df8f3617834b986ac2..78ab0556e48f7c0fd2cb316d1ea606e7b802a1ce 100644
(file)
--- a/
drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c
+++ b/
drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c
@@
-205,11
+205,11
@@
static int cz_load_mec_firmware(struct pp_hwmgr *hwmgr)
cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_CNTL, tmp);
reg_data = smu_lower_32_bits(info.mc_addr) &
-
SMU
M_FIELD_MASK(CP_CPC_IC_BASE_LO, IC_BASE_LO);
+
PH
M_FIELD_MASK(CP_CPC_IC_BASE_LO, IC_BASE_LO);
cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_LO, reg_data);
reg_data = smu_upper_32_bits(info.mc_addr) &
-
SMU
M_FIELD_MASK(CP_CPC_IC_BASE_HI, IC_BASE_HI);
+
PH
M_FIELD_MASK(CP_CPC_IC_BASE_HI, IC_BASE_HI);
cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_HI, reg_data);
return 0;