drm/amd/display: update blending mode and set output denorm
authorEric Bernstein <eric.bernstein@amd.com>
Thu, 14 Sep 2017 22:01:40 +0000 (18:01 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Sat, 21 Oct 2017 20:41:56 +0000 (16:41 -0400)
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h

index 6e56fa3a135b9deba305a6ffdca2fe71c415b1ed..334f072cea1df145bce4c7fd20792b85612695b2 100644 (file)
@@ -313,10 +313,34 @@ static int mpc10_mpcc_add(struct mpc *mpc, struct mpcc_cfg *cfg)
        return mpcc_id;
 }
 
+static void mpc10_update_blend_mode(
+               struct mpc *mpc,
+               struct mpcc_cfg *cfg)
+{
+       struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc);
+       int mpcc_id, z_idx;
+       int alpha_blnd_mode = cfg->per_pixel_alpha ?
+                       BLND_PP_ALPHA : BLND_GLOBAL_ALPHA;
+
+       /* find z_idx for the dpp that requires blending mode update*/
+       for (z_idx = 0; z_idx < cfg->tree_cfg->num_pipes; z_idx++)
+               if (cfg->tree_cfg->dpp[z_idx] == cfg->dpp_id)
+                       break;
+
+       ASSERT(z_idx < cfg->tree_cfg->num_pipes);
+       mpcc_id = cfg->tree_cfg->mpcc[z_idx];
+
+       REG_UPDATE_2(MPCC_CONTROL[mpcc_id],
+                       MPCC_ALPHA_BLND_MODE, alpha_blnd_mode,
+                       MPCC_ALPHA_MULTIPLIED_MODE, cfg->pre_multiplied_alpha);
+}
+
 const struct mpc_funcs dcn10_mpc_funcs = {
                .add = mpc10_mpcc_add,
                .remove = mpc10_mpcc_remove,
-               .wait_for_idle = mpc10_assert_idle_mpcc
+               .wait_for_idle = mpc10_assert_idle_mpcc,
+               .set_denorm = NULL,
+               .update_blend_mode = mpc10_update_blend_mode
 };
 
 void dcn10_mpc_construct(struct dcn10_mpc *mpc10,
@@ -337,3 +361,4 @@ void dcn10_mpc_construct(struct dcn10_mpc *mpc10,
        mpc10->mpcc_in_use_mask = 0;
        mpc10->num_mpcc = num_mpcc;
 }
+
index 2d3de5b68e34cfcca74adef36513bfc8cefe00cd..fb590f5353a04746e9f8dcdc69ebb4d8b19e5e0d 100644 (file)
@@ -51,6 +51,10 @@ struct mpc_funcs {
                        int opp_id,
                        int mpcc_inst);
        void (*wait_for_idle)(struct mpc *mpc, int id);
+       void (*set_denorm)(struct mpc *mpc,
+                       int opp_id,
+                       enum dc_color_depth output_depth);
+       void (*update_blend_mode)(struct mpc *mpc, struct mpcc_cfg *cfg);
 };
 
 #endif