Apply compile-time check for AArch64-only cores

Some cores support only AArch64 mode. In those cores, only a limited
subset of the AArch32 system registers are implemented. Hence, if TF-A
is supposed to run on AArch64-only cores, it must be compiled with
CTX_INCLUDE_AARCH32_REGS=0.

Currently, the default settings for compiling TF-A are with the AArch32
system registers included. So, if we compile TF-A the default way and
attempt to run it on an AArch64-only core, we only get a runtime panic.

Now a compile-time check has been added to ensure that this flag has the
appropriate value when AArch64-only cores are included in the build.

Change-Id: I298ec550037fafc9347baafb056926d149197d4c
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

diff --git a/lib/cpus/aarch64/cortex_a76.S b/lib/cpus/aarch64/cortex_a76.S
index b48283cbb9e8a9cc70532212d614908d8e0b689e..868667ebc2fbbd09f64f7366569249c4c7e9df4a 100644 (file)
--- a/lib/cpus/aarch64/cortex_a76.S
+++ b/lib/cpus/aarch64/cortex_a76.S
@@ -18,6 +18,11 @@
 #error "Cortex-A76 must be compiled with HW_ASSISTED_COHERENCY enabled"
 #endif
 
+/* 64-bit only core */
+#if CTX_INCLUDE_AARCH32_REGS == 1
+#error "Cortex-A76 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
+#endif
+
 #define ESR_EL3_A64_SMC0       0x5e000000
 #define ESR_EL3_A32_SMC0       0x4e000000
 

diff --git a/lib/cpus/aarch64/cortex_a76ae.S b/lib/cpus/aarch64/cortex_a76ae.S
index 46e9450f29d4f2736114d251c3b193ae3a51d2b8..888f98b5052589e489c579bc31028ddcd9312774 100644 (file)
--- a/lib/cpus/aarch64/cortex_a76ae.S
+++ b/lib/cpus/aarch64/cortex_a76ae.S
@@ -11,6 +11,11 @@
 /* Hardware handled coherency */
 #if HW_ASSISTED_COHERENCY == 0
 #error "Cortex-A76AE must be compiled with HW_ASSISTED_COHERENCY enabled"
+#endif
+
+/* 64-bit only core */
+#if CTX_INCLUDE_AARCH32_REGS == 1
+#error "Cortex-A76AE supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
 #endif
 
        /* ---------------------------------------------

diff --git a/lib/cpus/aarch64/cortex_deimos.S b/lib/cpus/aarch64/cortex_deimos.S
index e73e89f73843c7605170030d4ca23bf684ac3af0..df4c128532624c0e6653d6d140d0c563f3d5e18f 100644 (file)
--- a/lib/cpus/aarch64/cortex_deimos.S
+++ b/lib/cpus/aarch64/cortex_deimos.S
@@ -14,6 +14,11 @@
 /* Hardware handled coherency */
 #if HW_ASSISTED_COHERENCY == 0
 #error "Deimos must be compiled with HW_ASSISTED_COHERENCY enabled"
+#endif
+
+/* 64-bit only core */
+#if CTX_INCLUDE_AARCH32_REGS == 1
+#error "Cortex-Deimos supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
 #endif
 
        /* ---------------------------------------------

diff --git a/lib/cpus/aarch64/neoverse_e1.S b/lib/cpus/aarch64/neoverse_e1.S
index 71e7b5171866abff46b181daac610ab5857b7b3f..d840da84b4a637df0042944c377a76651c06179c 100644 (file)
--- a/lib/cpus/aarch64/neoverse_e1.S
+++ b/lib/cpus/aarch64/neoverse_e1.S
@@ -16,6 +16,11 @@
 #error "Neoverse E1 must be compiled with HW_ASSISTED_COHERENCY enabled"
 #endif
 
+/* 64-bit only core */
+#if CTX_INCLUDE_AARCH32_REGS == 1
+#error "Neoverse-E1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
+#endif
+
 func neoverse_e1_cpu_pwr_dwn
        mrs     x0, NEOVERSE_E1_CPUPWRCTLR_EL1
        orr     x0, x0, #NEOVERSE_E1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT

diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S
index a0babb0ef6af3b9c4bb0347411a110bfa4e9c1a5..dadaf98b42aede5bf23791508be5676963a90d6f 100644 (file)
--- a/lib/cpus/aarch64/neoverse_n1.S
+++ b/lib/cpus/aarch64/neoverse_n1.S
@@ -15,6 +15,11 @@
 #error "Neoverse N1 must be compiled with HW_ASSISTED_COHERENCY enabled"
 #endif
 
+/* 64-bit only core */
+#if CTX_INCLUDE_AARCH32_REGS == 1
+#error "Neoverse-N1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
+#endif
+
 /* --------------------------------------------------
  * Errata Workaround for Neoverse N1 Errata
  * This applies to revision r0p0 and r1p0 of Neoverse N1.

diff --git a/lib/cpus/aarch64/neoverse_zeus.S b/lib/cpus/aarch64/neoverse_zeus.S
index c5241afab0529a70ea0d88e0fcc10b100c74affc..3d850137c108b3ac4e6d4eb36c31c5963291508d 100644 (file)
--- a/lib/cpus/aarch64/neoverse_zeus.S
+++ b/lib/cpus/aarch64/neoverse_zeus.S
@@ -14,6 +14,11 @@
 /* Hardware handled coherency */
 #if HW_ASSISTED_COHERENCY == 0
 #error "Neoverse Zeus must be compiled with HW_ASSISTED_COHERENCY enabled"
+#endif
+
+/* 64-bit only core */
+#if CTX_INCLUDE_AARCH32_REGS == 1
+#error "Neoverse-Zeus supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
 #endif
 
        /* ---------------------------------------------

diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index dbc5c21ba6f5aad9b85c231b9d25bf81eff64272..3cbdfbc4643b384bbc41dd4e661b8de27ac9e0cd 100644 (file)
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -96,8 +96,8 @@ FVP_CPU_LIBS          :=      lib/cpus/${ARCH}/aem_generic.S
 
 ifeq (${ARCH}, aarch64)
 
-# select a different set of CPU files, depending on whether we compile with
-# hardware assisted coherency configurations or not
+# select a different set of CPU files, depending on whether we compile for
+# hardware assisted coherency cores or not
 ifeq (${HW_ASSISTED_COHERENCY}, 0)
        FVP_CPU_LIBS    +=      lib/cpus/aarch64/cortex_a35.S                   \
                                lib/cpus/aarch64/cortex_a53.S                   \
@@ -105,14 +105,19 @@ ifeq (${HW_ASSISTED_COHERENCY}, 0)
                                lib/cpus/aarch64/cortex_a72.S                   \
                                lib/cpus/aarch64/cortex_a73.S
 else
-       FVP_CPU_LIBS    +=      lib/cpus/aarch64/cortex_a55.S                   \
-                               lib/cpus/aarch64/cortex_a75.S                   \
-                               lib/cpus/aarch64/cortex_a76.S                   \
-                               lib/cpus/aarch64/cortex_a76ae.S                 \
-                               lib/cpus/aarch64/neoverse_n1.S                  \
-                               lib/cpus/aarch64/neoverse_e1.S                  \
-                               lib/cpus/aarch64/cortex_deimos.S                \
-                               lib/cpus/aarch64/neoverse_zeus.S
+       # AArch64-only cores
+       ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
+               FVP_CPU_LIBS    +=      lib/cpus/aarch64/cortex_a76.S           \
+                                       lib/cpus/aarch64/cortex_a76ae.S         \
+                                       lib/cpus/aarch64/neoverse_n1.S          \
+                                       lib/cpus/aarch64/neoverse_e1.S          \
+                                       lib/cpus/aarch64/cortex_deimos.S        \
+                                       lib/cpus/aarch64/neoverse_zeus.S
+       # AArch64/AArch32
+       else
+               FVP_CPU_LIBS    +=      lib/cpus/aarch64/cortex_a55.S           \
+                                       lib/cpus/aarch64/cortex_a75.S
+       endif
 endif
 
 else