-LINUX_VERSION-6.6 = .44
-LINUX_KERNEL_HASH-6.6.44 = 93218296934915636fe6ba08e125948424cc270fd8948502c0ab91087a9fccd8
+LINUX_VERSION-6.6 = .45
+LINUX_KERNEL_HASH-6.6.45 = 121bed240767e4a0959c1609e78eeaaf3e0620d9d1a5ed1f6e36bdf609c4f179
list_for_each_entry(p, head, list) {
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
-@@ -620,48 +620,53 @@ static void tcp_options_write(struct tcp
+@@ -622,48 +622,53 @@ static void tcp_options_write(struct tcp
u16 options = opts->options; /* mungable copy */
if (unlikely(OPTION_MD5 & options)) {
}
if (unlikely(opts->num_sack_blocks)) {
-@@ -669,16 +674,17 @@ static void tcp_options_write(struct tcp
+@@ -671,16 +676,17 @@ static void tcp_options_write(struct tcp
tp->duplicate_sack : tp->selective_acks;
int this_sack;
}
tp->rx_opt.dsack = 0;
-@@ -691,13 +697,14 @@ static void tcp_options_write(struct tcp
+@@ -693,13 +699,14 @@ static void tcp_options_write(struct tcp
if (foc->exp) {
len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len;
EXPORT_SYMBOL(xfrm_parse_spi);
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
-@@ -4214,14 +4214,16 @@ static bool tcp_parse_aligned_timestamp(
+@@ -4225,14 +4225,16 @@ static bool tcp_parse_aligned_timestamp(
{
const __be32 *ptr = (const __be32 *)(th + 1);
--- a/net/bluetooth/hci_sync.c
+++ b/net/bluetooth/hci_sync.c
-@@ -4672,6 +4672,7 @@ static const struct {
+@@ -4693,6 +4693,7 @@ static const struct {
*/
static int hci_dev_setup_sync(struct hci_dev *hdev)
{
int ret = 0;
bool invalid_bdaddr;
size_t i;
-@@ -4700,7 +4701,8 @@ static int hci_dev_setup_sync(struct hci
+@@ -4721,7 +4722,8 @@ static int hci_dev_setup_sync(struct hci
test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
if (!ret) {
if (test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks) &&
+++ /dev/null
-From 225990c487c1023e7b3aa89beb6a68011fbc0461 Mon Sep 17 00:00:00 2001
-From: Mark Mentovai <mark@mentovai.com>
-Date: Thu, 25 Jul 2024 16:41:44 -0400
-Subject: [PATCH] net: phy: realtek: add support for RTL8366S Gigabit PHY
-
-The PHY built in to the Realtek RTL8366S switch controller was
-previously supported by genphy_driver. This PHY does not implement MMD
-operations. Since commit 9b01c885be36 ("net: phy: c22: migrate to
-genphy_c45_write_eee_adv()"), MMD register reads have been made during
-phy_probe to determine EEE support. For genphy_driver, these reads are
-transformed into 802.3 annex 22D clause 45-over-clause 22
-mmd_phy_indirect operations that perform MII register writes to
-MII_MMD_CTRL and MII_MMD_DATA. This overwrites those two MII registers,
-which on this PHY are reserved and have another function, rendering the
-PHY unusable while so configured.
-
-Proper support for this PHY is restored by providing a phy_driver that
-declares MMD operations as unsupported by using the helper functions
-provided for that purpose, while remaining otherwise identical to
-genphy_driver.
-
-Fixes: 9b01c885be36 ("net: phy: c22: migrate to genphy_c45_write_eee_adv()")
-Reported-by: Russell Senior <russell@personaltelco.net>
-Closes: https://github.com/openwrt/openwrt/issues/15981
-Link: https://github.com/openwrt/openwrt/issues/15739
-Signed-off-by: Mark Mentovai <mark@mentovai.com>
-Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/phy/realtek.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -1083,6 +1083,13 @@ static struct phy_driver realtek_drvs[]
- .handle_interrupt = genphy_handle_interrupt_no_ack,
- .suspend = genphy_suspend,
- .resume = genphy_resume,
-+ }, {
-+ PHY_ID_MATCH_EXACT(0x001cc960),
-+ .name = "RTL8366S Gigabit Ethernet",
-+ .suspend = genphy_suspend,
-+ .resume = genphy_resume,
-+ .read_mmd = genphy_read_mmd_unsupported,
-+ .write_mmd = genphy_write_mmd_unsupported,
- },
- };
-
static void r8168fp_adjust_ocp_cmd(struct rtl8169_private *tp, u32 *cmd, int type)
{
/* based on RTL8168FP_OOBMAC_BASE in vendor driver */
-@@ -5258,6 +5316,7 @@ static int rtl_init_one(struct pci_dev *
+@@ -5254,6 +5312,7 @@ static int rtl_init_one(struct pci_dev *
raw_spin_lock_init(&tp->cfg9346_usage_lock);
raw_spin_lock_init(&tp->config25_lock);
raw_spin_lock_init(&tp->mac_ocp_lock);
dev->tstats = devm_netdev_alloc_pcpu_stats(&pdev->dev,
struct pcpu_sw_netstats);
-@@ -5414,6 +5473,12 @@ static int rtl_init_one(struct pci_dev *
+@@ -5410,6 +5469,12 @@ static int rtl_init_one(struct pci_dev *
if (rc)
return rc;
obj-$(CONFIG_R8169) += r8169.o
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5473,11 +5473,10 @@ static int rtl_init_one(struct pci_dev *
+@@ -5469,11 +5469,10 @@ static int rtl_init_one(struct pci_dev *
if (rc)
return rc;
padto = max_t(unsigned int, padto, ETH_ZLEN);
break;
default:
-@@ -5225,7 +5282,7 @@ static void rtl_hw_initialize(struct rtl
+@@ -5221,7 +5278,7 @@ static void rtl_hw_initialize(struct rtl
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
rtl_hw_init_8168g(tp);
break;
void r8169_get_led_name(struct rtl8169_private *tp, int idx,
char *buf, int buf_len)
{
-@@ -5530,10 +5581,12 @@ static int rtl_init_one(struct pci_dev *
+@@ -5526,10 +5577,12 @@ static int rtl_init_one(struct pci_dev *
if (rc)
return rc;
u32 ocp_base;
};
-@@ -5126,6 +5128,8 @@ static void rtl_remove_one(struct pci_de
+@@ -5122,6 +5124,8 @@ static void rtl_remove_one(struct pci_de
cancel_work_sync(&tp->wk.work);
unregister_netdev(tp->dev);
if (tp->dash_type != RTL_DASH_NONE)
-@@ -5586,9 +5590,9 @@ static int rtl_init_one(struct pci_dev *
+@@ -5582,9 +5586,9 @@ static int rtl_init_one(struct pci_dev *
if (IS_ENABLED(CONFIG_R8169_LEDS)) {
if (rtl_is_8125(tp))
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5128,7 +5128,8 @@ static void rtl_remove_one(struct pci_de
+@@ -5124,7 +5124,8 @@ static void rtl_remove_one(struct pci_de
cancel_work_sync(&tp->wk.work);
interval = jiffies_to_msecs(
--- a/include/linux/leds.h
+++ b/include/linux/leds.h
-@@ -588,6 +588,9 @@ enum led_trigger_netdev_modes {
+@@ -586,6 +586,9 @@ enum led_trigger_netdev_modes {
TRIGGER_NETDEV_LINK_10,
TRIGGER_NETDEV_LINK_100,
TRIGGER_NETDEV_LINK_1000,
# CONFIG_PCMCIA_XIRCOM is not set
# CONFIG_PCNET32 is not set
# CONFIG_PCPU_DEV_REFCNT is not set
+CONFIG_PCP_BATCH_SCALE_MAX=5
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_PCS_MTK_USXGMII is not set
# CONFIG_PCS_XPCS is not set
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -1989,7 +1989,7 @@ config PADATA
+@@ -1990,7 +1990,7 @@ config PADATA
bool
config ASN1
(transaction layer end-to-end CRC checking).
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
-@@ -1600,6 +1600,8 @@ void pci_walk_bus_locked(struct pci_bus
+@@ -1602,6 +1602,8 @@ void pci_walk_bus_locked(struct pci_bus
void *userdata);
int pci_cfg_space_size(struct pci_dev *dev);
unsigned char pci_bus_max_busnr(struct pci_bus *bus);
struct qcom_cpufreq_drv;
struct qcom_cpufreq_match_data {
-@@ -203,6 +205,57 @@ len_error:
+@@ -207,6 +209,57 @@ len_error:
return ret;
}
static const struct qcom_cpufreq_match_data match_data_kryo = {
.get_version = qcom_cpufreq_kryo_name_version,
};
-@@ -217,6 +270,10 @@ static const struct qcom_cpufreq_match_d
+@@ -221,6 +274,10 @@ static const struct qcom_cpufreq_match_d
.genpd_names = qcs404_genpd_names,
};
static int qcom_cpufreq_probe(struct platform_device *pdev)
{
struct qcom_cpufreq_drv *drv;
-@@ -359,6 +416,7 @@ static const struct of_device_id qcom_cp
+@@ -353,6 +410,7 @@ static const struct of_device_id qcom_cp
{ .compatible = "qcom,apq8096", .data = &match_data_kryo },
{ .compatible = "qcom,msm8996", .data = &match_data_kryo },
{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
struct qcom_cpufreq_drv;
struct qcom_cpufreq_match_data {
-@@ -256,6 +261,44 @@ static int qcom_cpufreq_ipq6018_name_ver
+@@ -260,6 +265,44 @@ static int qcom_cpufreq_ipq6018_name_ver
return 0;
}
static const struct qcom_cpufreq_match_data match_data_kryo = {
.get_version = qcom_cpufreq_kryo_name_version,
};
-@@ -274,6 +317,10 @@ static const struct qcom_cpufreq_match_d
+@@ -278,6 +321,10 @@ static const struct qcom_cpufreq_match_d
.get_version = qcom_cpufreq_ipq6018_name_version,
};
static int qcom_cpufreq_probe(struct platform_device *pdev)
{
struct qcom_cpufreq_drv *drv;
-@@ -418,6 +465,7 @@ static const struct of_device_id qcom_cp
+@@ -412,6 +459,7 @@ static const struct of_device_id qcom_cp
{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
{ .compatible = "qcom,ipq6018", .data = &match_data_ipq6018 },
{ .compatible = "qcom,ipq8064", .data = &match_data_krait },
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
-@@ -721,8 +721,8 @@
+@@ -723,8 +723,8 @@
compatible = "qcom,ipq8074-apcs-apps-global",
"qcom,ipq6018-apcs-apps-global";
reg = <0x0b111000 0x1000>;
power-domains = <&gcc USB0_GDSC>;
resets = <&gcc GCC_USB0_BCR>;
-@@ -674,6 +681,13 @@
+@@ -675,6 +682,13 @@
<133330000>,
<19200000>;
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
-@@ -755,7 +755,7 @@
+@@ -757,7 +757,7 @@
reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
ranges = <0 0xb00a000 0xffd>;
compatible = "arm,gic-v2m-frame";
msi-controller;
reg = <0x0 0xffd>;
-@@ -868,8 +868,7 @@
+@@ -870,8 +870,7 @@
ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>, /* I/O */
<0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 0 142
-@@ -930,8 +929,7 @@
+@@ -932,8 +931,7 @@
ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>, /* I/O */
<0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */
spmi_bus: spmi@200f000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x0200f000 0x001000>,
-@@ -970,6 +1001,56 @@
+@@ -972,6 +1003,56 @@
"axi_s_sticky";
status = "disabled";
};
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
-@@ -1051,6 +1051,117 @@
+@@ -1053,6 +1053,117 @@
};
};
};
projects / openwrt / staging / thess.git / commitdiff