drm/i915: Get correct display clock on 945gm
authorArthur Heymans <arthur@aheymans.xyz>
Tue, 31 Jan 2017 23:50:26 +0000 (00:50 +0100)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 7 Feb 2017 17:46:00 +0000 (19:46 +0200)
This is according to Mobile Intel® 945 Express Chipset
Family datasheet.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Link: http://patchwork.freedesktop.org/patch/msgid/20170131235026.26003-1-arthur@aheymans.xyz
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c

index a9538ae816734b424efb8c51f80c9d07dcfc1497..4b5761d7716c6923cd6f88c6311a858006e8bbdc 100644 (file)
@@ -119,7 +119,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define GCFGC  0xf0 /* 915+ only */
 #define   GC_LOW_FREQUENCY_ENABLE      (1 << 7)
 #define   GC_DISPLAY_CLOCK_190_200_MHZ (0 << 4)
-#define   GC_DISPLAY_CLOCK_333_MHZ     (4 << 4)
+#define   GC_DISPLAY_CLOCK_333_320_MHZ (4 << 4)
 #define   GC_DISPLAY_CLOCK_267_MHZ_PNV (0 << 4)
 #define   GC_DISPLAY_CLOCK_333_MHZ_PNV (1 << 4)
 #define   GC_DISPLAY_CLOCK_444_MHZ_PNV (2 << 4)
index 45e5874968869c27efb3e220e3fda3b63c0ac713..d0d042495dc7c507a517a7bb957173aa8b165024 100644 (file)
@@ -7411,6 +7411,26 @@ static int i945_get_display_clock_speed(struct drm_i915_private *dev_priv)
        return 400000;
 }
 
+static int i945gm_get_display_clock_speed(struct drm_i915_private *dev_priv)
+{
+       struct pci_dev *pdev = dev_priv->drm.pdev;
+       u16 gcfgc = 0;
+
+       pci_read_config_word(pdev, GCFGC, &gcfgc);
+
+       if (gcfgc & GC_LOW_FREQUENCY_ENABLE)
+               return 133333;
+       else {
+               switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
+               case GC_DISPLAY_CLOCK_333_320_MHZ:
+                       return 320000;
+               default:
+               case GC_DISPLAY_CLOCK_190_200_MHZ:
+                       return 200000;
+               }
+       }
+}
+
 static int i915_get_display_clock_speed(struct drm_i915_private *dev_priv)
 {
        return 333333;
@@ -7457,7 +7477,7 @@ static int i915gm_get_display_clock_speed(struct drm_i915_private *dev_priv)
                return 133333;
        else {
                switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
-               case GC_DISPLAY_CLOCK_333_MHZ:
+               case GC_DISPLAY_CLOCK_333_320_MHZ:
                        return 333333;
                default:
                case GC_DISPLAY_CLOCK_190_200_MHZ:
@@ -16268,9 +16288,12 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
        else if (IS_I915G(dev_priv))
                dev_priv->display.get_display_clock_speed =
                        i915_get_display_clock_speed;
-       else if (IS_I945GM(dev_priv) || IS_I845G(dev_priv))
+       else if (IS_I845G(dev_priv))
                dev_priv->display.get_display_clock_speed =
                        i9xx_misc_get_display_clock_speed;
+       else if (IS_I945GM(dev_priv))
+               dev_priv->display.get_display_clock_speed =
+                       i945gm_get_display_clock_speed;
        else if (IS_I915GM(dev_priv))
                dev_priv->display.get_display_clock_speed =
                        i915gm_get_display_clock_speed;