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drm/i915: Correct the Ref clock value for BXT
author
Deepak M
<m.deepak@intel.com>
Fri, 4 Dec 2015 14:17:38 +0000
(19:47 +0530)
committer
Daniel Vetter
<daniel.vetter@ffwll.ch>
Fri, 4 Dec 2015 16:21:36 +0000
(17:21 +0100)
The reference clock for BXT is 19.2 MHz not 19.5 MHz, updating the
correct value here.
Signed-off-by: Deepak M <m.deepak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link:
http://patchwork.freedesktop.org/patch/msgid/1449238659-12473-2-git-send-email-m.deepak@intel.com
drivers/gpu/drm/i915/i915_reg.h
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diff --git
a/drivers/gpu/drm/i915/i915_reg.h
b/drivers/gpu/drm/i915/i915_reg.h
index d326c54ff6671eacbecdf6c83bf1b9e22f79dbc7..206b213a74e15ae8c5b746ae5674369504fa20b5 100644
(file)
--- a/
drivers/gpu/drm/i915/i915_reg.h
+++ b/
drivers/gpu/drm/i915/i915_reg.h
@@
-7714,7
+7714,7
@@
enum skl_disp_power_wells {
#define BXT_DSI_PLL_RATIO_MAX 0x7D
#define BXT_DSI_PLL_RATIO_MIN 0x22
#define BXT_DSI_PLL_RATIO_MASK 0xFF
-#define BXT_REF_CLOCK_KHZ 19
5
00
+#define BXT_REF_CLOCK_KHZ 19
2
00
#define BXT_DSI_PLL_ENABLE _MMIO(0x46080)
#define BXT_DSI_PLL_DO_ENABLE (1 << 31)