u8 out_data_toggle[MAX_DEVICE][MAX_ENDPOINT];
struct dwc2_core_regs *regs;
int root_hub_devnum;
+ bool ext_vbus;
};
#ifndef CONFIG_DM_USB
usbcfg = readl(®s->gusbcfg);
/* Program the ULPI External VBUS bit if needed */
-#ifdef CONFIG_DWC2_PHY_ULPI_EXT_VBUS
- usbcfg |= (DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV |
- DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR |
- DWC2_GUSBCFG_INDICATOR_PASSTHROUGH);
-#else
- usbcfg &= ~DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV;
-#endif
+ if (priv->ext_vbus) {
+ usbcfg |= (DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV |
+ DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR |
+ DWC2_GUSBCFG_INDICATOR_PASSTHROUGH);
+ } else {
+ usbcfg &= ~DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV;
+ }
/* Set external TS Dline pulsing */
#ifdef CONFIG_DWC2_TS_DLINE
return -ENODEV;
}
+#ifdef CONFIG_DWC2_PHY_ULPI_EXT_VBUS
+ priv->ext_vbus = 1;
+#else
+ priv->ext_vbus = 0;
+#endif
+
dwc_otg_core_init(priv);
dwc_otg_core_host_init(regs);