drm/i915/tgl: Add missing ddi clock select during DP init sequence
authorClinton A Taylor <clinton.a.taylor@intel.com>
Fri, 20 Sep 2019 20:58:05 +0000 (13:58 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Mon, 23 Sep 2019 17:38:11 +0000 (10:38 -0700)
Step 4.b was complete missed because it is only required to TC and TBT.

Bspec: 49190
Reviewed-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Clinton A Taylor <clinton.a.taylor@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190920205810.211048-2-jose.souza@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c

index 0c0da9f6c2e8872aaf5a0a6946a3ec109fe0f581..dfd6b064cbc3d309abf634027f30c35c3700210e 100644 (file)
@@ -3230,11 +3230,14 @@ static void tgl_ddi_pre_enable_dp(struct intel_encoder *encoder,
        intel_edp_panel_on(intel_dp);
 
        /*
-        * 1.b, 3. and 4. is done before tgl_ddi_pre_enable_dp() by:
+        * 1.b, 3. and 4.a is done before tgl_ddi_pre_enable_dp() by:
         * haswell_crtc_enable()->intel_encoders_pre_pll_enable() and
         * haswell_crtc_enable()->intel_enable_shared_dpll()
         */
 
+       /* 4.b */
+       intel_ddi_clk_select(encoder, crtc_state);
+
        /* 5. */
        if (!intel_phy_is_tc(dev_priv, phy) ||
            dig_port->tc_mode != TC_PORT_TBT_ALT)