drm/amdgpu: update IH IV ring entry for soc-15
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 3 Mar 2017 20:08:30 +0000 (15:08 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Mar 2017 03:54:36 +0000 (23:54 -0400)
Reflect the new format on soc-15 asics.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h

index 043620dfdacbe2ac40ae520eb76eef482e8a2a98..a3da1a122fc8d8eb3dc21bbbed9716d0b1c59efa 100644 (file)
@@ -93,11 +93,14 @@ struct amdgpu_ih_ring {
 struct amdgpu_iv_entry {
        unsigned client_id;
        unsigned src_id;
-       unsigned src_data[AMDGPU_IH_SRC_DATA_MAX_SIZE_DW];
        unsigned ring_id;
        unsigned vm_id;
        unsigned vm_id_src;
+       uint64_t timestamp;
+       unsigned timestamp_src;
        unsigned pas_id;
+       unsigned pasid_src;
+       unsigned src_data[AMDGPU_IH_SRC_DATA_MAX_SIZE_DW];
        const uint32_t *iv_entry;
 };