drm/amdgpu: Expose more GPU sensor queries
authorRex Zhu <Rex.Zhu@amd.com>
Wed, 17 Jan 2018 05:18:47 +0000 (13:18 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 19 Feb 2018 19:17:57 +0000 (14:17 -0500)
Add sub-queries for stable pstate shader/memory clock.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
include/uapi/drm/amdgpu_drm.h

index 9f189ab07cdd7951c6e3ab79827ead42e95594a9..b929986dd3d792d01d74c66c750f520008bd8efd 100644 (file)
@@ -758,6 +758,24 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                                return -EINVAL;
                        }
                        break;
+               case AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_SCLK:
+                       /* get stable pstate sclk in Mhz */
+                       if (amdgpu_dpm_read_sensor(adev,
+                                                  AMDGPU_PP_SENSOR_STABLE_PSTATE_SCLK,
+                                                  (void *)&ui32, &ui32_size)) {
+                               return -EINVAL;
+                       }
+                       ui32 /= 100;
+                       break;
+               case AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK:
+                       /* get stable pstate mclk in Mhz */
+                       if (amdgpu_dpm_read_sensor(adev,
+                                                  AMDGPU_PP_SENSOR_STABLE_PSTATE_MCLK,
+                                                  (void *)&ui32, &ui32_size)) {
+                               return -EINVAL;
+                       }
+                       ui32 /= 100;
+                       break;
                default:
                        DRM_DEBUG_KMS("Invalid request %d\n",
                                      info->sensor_info.type);
index 4d21191aaed0f92aeb5cfd3e345b9befa8e549f8..1816bd8200d1f3f2e23cfcc4f1e502c001c8fa35 100644 (file)
@@ -664,6 +664,10 @@ struct drm_amdgpu_cs_chunk_data {
        #define AMDGPU_INFO_SENSOR_VDDNB                0x6
        /* Subquery id: Query graphics voltage */
        #define AMDGPU_INFO_SENSOR_VDDGFX               0x7
+       /* Subquery id: Query GPU stable pstate shader clock */
+       #define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_SCLK               0x8
+       /* Subquery id: Query GPU stable pstate memory clock */
+       #define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK               0x9
 /* Number of VRAM page faults on CPU access. */
 #define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS   0x1E
 #define AMDGPU_INFO_VRAM_LOST_COUNTER          0x1F