drm/i915/tgl: Guard and warn if more than one eDP panel is present
authorJosé Roberto de Souza <jose.souza@intel.com>
Fri, 23 Aug 2019 08:20:37 +0000 (01:20 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Tue, 27 Aug 2019 15:27:49 +0000 (08:27 -0700)
On TGL+ it's possible to have PSR1 enabled in other ports besides DDIA.
PSR2 is still limited to DDIA. However currently we handle only one
instance of PSR struct. Lets guard intel_psr_init_dpcd() against
multiple eDP panels and warn about it.

v2: Reword commit message to be TGL+ only and with the info where
PSR1/PSR2 are supported (Lucas)

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823082055.5992-6-lucas.demarchi@intel.com
drivers/gpu/drm/i915/display/intel_psr.c

index 28b62e5872044fa4c9ba827eb0f60b805d9c2fc2..78e920015a000166c8c6316d4e5aa2c2d09dbe04 100644 (file)
@@ -283,6 +283,11 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
        struct drm_i915_private *dev_priv =
                to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
 
+       if (dev_priv->psr.dp) {
+               DRM_WARN("More than one eDP panel found, PSR support should be extended\n");
+               return;
+       }
+
        drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
                         sizeof(intel_dp->psr_dpcd));
 
@@ -305,7 +310,6 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
        dev_priv->psr.sink_sync_latency =
                intel_dp_get_sink_sync_latency(intel_dp);
 
-       WARN_ON(dev_priv->psr.dp);
        dev_priv->psr.dp = intel_dp;
 
        if (INTEL_GEN(dev_priv) >= 9 &&