drm/amdgpu: Disable ip modules that are not ready yet
authorFeifei Xu <Feifei.Xu@amd.com>
Tue, 24 Apr 2018 03:20:16 +0000 (11:20 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 18 May 2018 21:08:11 +0000 (16:08 -0500)
Please enable above ips on soc15.c when they're available.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/soc15.c

index 63135cf79e006b1271e0191908eda87c0253f94a..295bc9cd46f07b34e4454308d6acf7240dae8b08 100644 (file)
@@ -514,9 +514,11 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
                amdgpu_device_ip_block_add(adev, &vega10_common_ip_block);
                amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block);
                amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);
-               amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block);
-               if (!amdgpu_sriov_vf(adev))
-                       amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
+               if (adev->asic_type != CHIP_VEGA20) {
+                       amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block);
+                       if (!amdgpu_sriov_vf(adev))
+                               amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
+               }
                if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
                        amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
 #if defined(CONFIG_DRM_AMD_DC)
@@ -527,8 +529,10 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
 #endif
                amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
                amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
-               amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block);
-               amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block);
+               if (adev->asic_type != CHIP_VEGA20) {
+                       amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block);
+                       amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block);
+               }
                break;
        case CHIP_RAVEN:
                amdgpu_device_ip_block_add(adev, &vega10_common_ip_block);