#include <bl_common.h>
#include <gicv3.h>
+#include <interrupt_props.h>
#include <plat_imx8.h>
#include <platform.h>
#include <platform_def.h>
/* the GICv3 driver only needs to be initialized in EL3 */
uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT];
-/* array of Group1 secure interrupts to be configured by the gic driver */
-const unsigned int g1s_interrupt_array[] = { 6 };
-
-/* array of Group0 interrupts to be configured by the gic driver */
-const unsigned int g0_interrupt_array[] = { 7 };
+static const interrupt_prop_t g01s_interrupt_props[] = {
+ INTR_PROP_DESC(6, GIC_HIGHEST_SEC_PRIORITY,
+ INTR_GROUP1S, GIC_INTR_CFG_LEVEL),
+ INTR_PROP_DESC(7, GIC_HIGHEST_SEC_PRIORITY,
+ INTR_GROUP0, GIC_INTR_CFG_LEVEL),
+};
static unsigned int plat_imx_mpidr_to_core_pos(unsigned long mpidr)
{
const gicv3_driver_data_t arm_gic_data = {
.gicd_base = PLAT_GICD_BASE,
.gicr_base = PLAT_GICR_BASE,
- .g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array),
- .g1s_interrupt_num = ARRAY_SIZE(g1s_interrupt_array),
- .g0_interrupt_array = g0_interrupt_array,
- .g1s_interrupt_array = g1s_interrupt_array,
+ .interrupt_props = g01s_interrupt_props,
+ .interrupt_props_num = ARRAY_SIZE(g01s_interrupt_props),
.rdistif_num = PLATFORM_CORE_COUNT,
.rdistif_base_addrs = rdistif_base_addrs,
.mpidr_to_core_pos = plat_imx_mpidr_to_core_pos,
NOTICE("Non-secure Partitioning Succeeded\n");
}
-void bl31_early_platform_setup(bl31_params_t *from_bl2,
- void *plat_params_from_bl2)
+void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
+ u_register_t arg2, u_register_t arg3)
{
#if DEBUG_CONSOLE
static console_lpuart_t console;