bcm53xx: backport uart2 and pcie2 device-nodes
authorChristian Lamparter <chunkeey@gmail.com>
Sat, 29 Aug 2020 21:23:32 +0000 (23:23 +0200)
committerChristian Lamparter <chunkeey@gmail.com>
Fri, 25 Sep 2020 17:32:34 +0000 (19:32 +0200)
These have made their way into -next. This patch
also includes the portion of the bcm53xx kernel
patch refreshes as the hunks in
302-ARM-dts-BCM5301X-Update-Northstar-pinctrl-binding.patch
moved slightly due to the added nodes.

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
target/linux/bcm53xx/patches-5.4/034-v5.10-ARM-dts-BCM5301X-Specify-uart2-in-the-DT.patch [new file with mode: 0644]
target/linux/bcm53xx/patches-5.4/035-v5.10-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch [new file with mode: 0644]
target/linux/bcm53xx/patches-5.4/302-ARM-dts-BCM5301X-Update-Northstar-pinctrl-binding.patch

diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.10-ARM-dts-BCM5301X-Specify-uart2-in-the-DT.patch b/target/linux/bcm53xx/patches-5.4/034-v5.10-ARM-dts-BCM5301X-Specify-uart2-in-the-DT.patch
new file mode 100644 (file)
index 0000000..8cee674
--- /dev/null
@@ -0,0 +1,30 @@
+From 5e396bb05b89e23e98e6d75749b77502e68210a4 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Sat, 22 Aug 2020 18:19:20 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Specify uart2 in the DT
+
+The BCM53016 in the Meraki MR32 utilizes the third "uart2"
+to connect to a on-board Bluetooth-LE 4.0 BCM20732 chip.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+Reviewed-by: Scott Branden <scott.branden@broadcom.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -392,6 +392,15 @@
+               reg = <0x18105000 0x1000>;
+       };
++      uart2: serial@18008000 {
++              compatible = "ns16550a";
++              reg = <0x18008000 0x20>;
++              clocks = <&iprocslow>;
++              interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
++              reg-shift = <2>;
++              status = "disabled";
++      };
++
+       i2c0: i2c@18009000 {
+               compatible = "brcm,iproc-i2c";
+               reg = <0x18009000 0x50>;
diff --git a/target/linux/bcm53xx/patches-5.4/035-v5.10-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch b/target/linux/bcm53xx/patches-5.4/035-v5.10-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch
new file mode 100644 (file)
index 0000000..d3e2fbc
--- /dev/null
@@ -0,0 +1,26 @@
+From c4cd6fcae46fd14aed8665b7cf66d0954765a873 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Sat, 22 Aug 2020 18:19:21 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Specify pcie2 in the DT
+
+The SoC supports three pcie ports. Currently, only
+pcie0 and pcie1 are enabled. This patch adds the
+pcie2 port as well.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+Reviewed-by: Scott Branden <scott.branden@broadcom.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -252,6 +252,10 @@
+                       reg = <0x00013000 0x1000>;
+               };
++              pcie2: pcie@14000 {
++                      reg = <0x00014000 0x1000>;
++              };
++
+               usb2: usb2@21000 {
+                       reg = <0x00021000 0x1000>;
index 77bc68c8ce4e96768a6dea39493686cda435c67a..1d71647d609ed1088a60fd2e5a789a2df4eaf708 100644 (file)
@@ -9,7 +9,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
 
 --- a/arch/arm/boot/dts/bcm5301x.dtsi
 +++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -401,16 +401,12 @@
+@@ -422,16 +422,12 @@
                #size-cells = <1>;
  
                cru@100 {