+++ /dev/null
-/*
- * SPI controller driver for the Mikrotik RB4xx boards
- *
- * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
- *
- * This file was based on the patches for Linux 2.6.27.39 published by
- * MikroTik for their RouterBoard 4xx series devices.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/spinlock.h>
-#include <linux/workqueue.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-
-#include <asm/mach-ar71xx/ar71xx.h>
-
-#define DRV_NAME "rb4xx-spi"
-#define DRV_DESC "Mikrotik RB4xx SPI controller driver"
-#define DRV_VERSION "0.1.0"
-
-#define SPI_CTRL_FASTEST 0x40
-#define SPI_FLASH_HZ 33333334
-#define SPI_CPLD_HZ 33333334
-
-#define CPLD_CMD_READ_FAST 0x0b
-
-#undef RB4XX_SPI_DEBUG
-
-struct rb4xx_spi {
- void __iomem *base;
- struct spi_master *master;
-
- unsigned spi_ctrl_flash;
- unsigned spi_ctrl_fread;
-
- spinlock_t lock;
- struct list_head queue;
- int busy:1;
- int cs_wait;
-};
-
-static unsigned spi_clk_low = SPI_IOC_CS1;
-
-#ifdef RB4XX_SPI_DEBUG
-static inline void do_spi_delay(void)
-{
- ndelay(20000);
-}
-#else
-static inline void do_spi_delay(void) { }
-#endif
-
-static inline void do_spi_init(struct spi_device *spi)
-{
- unsigned cs = SPI_IOC_CS0 | SPI_IOC_CS1;
-
- if (!(spi->mode & SPI_CS_HIGH))
- cs ^= (spi->chip_select == 2) ? SPI_IOC_CS1 : SPI_IOC_CS0;
-
- spi_clk_low = cs;
-}
-
-static inline void do_spi_finish(void __iomem *base)
-{
- do_spi_delay();
- __raw_writel(SPI_IOC_CS0 | SPI_IOC_CS1, base + SPI_REG_IOC);
-}
-
-static inline void do_spi_clk(void __iomem *base, int bit)
-{
- unsigned bval = spi_clk_low | ((bit & 1) ? SPI_IOC_DO : 0);
-
- do_spi_delay();
- __raw_writel(bval, base + SPI_REG_IOC);
- do_spi_delay();
- __raw_writel(bval | SPI_IOC_CLK, base + SPI_REG_IOC);
-}
-
-static void do_spi_byte(void __iomem *base, unsigned char byte)
-{
- do_spi_clk(base, byte >> 7);
- do_spi_clk(base, byte >> 6);
- do_spi_clk(base, byte >> 5);
- do_spi_clk(base, byte >> 4);
- do_spi_clk(base, byte >> 3);
- do_spi_clk(base, byte >> 2);
- do_spi_clk(base, byte >> 1);
- do_spi_clk(base, byte);
-
- pr_debug("spi_byte sent 0x%02x got 0x%02x\n",
- (unsigned)byte,
- (unsigned char)__raw_readl(base + SPI_REG_RDS));
-}
-
-static inline void do_spi_clk_fast(void __iomem *base, unsigned bit1,
- unsigned bit2)
-{
- unsigned bval = (spi_clk_low |
- ((bit1 & 1) ? SPI_IOC_DO : 0) |
- ((bit2 & 1) ? SPI_IOC_CS2 : 0));
- do_spi_delay();
- __raw_writel(bval, base + SPI_REG_IOC);
- do_spi_delay();
- __raw_writel(bval | SPI_IOC_CLK, base + SPI_REG_IOC);
-}
-
-static void do_spi_byte_fast(void __iomem *base, unsigned char byte)
-{
- do_spi_clk_fast(base, byte >> 7, byte >> 6);
- do_spi_clk_fast(base, byte >> 5, byte >> 4);
- do_spi_clk_fast(base, byte >> 3, byte >> 2);
- do_spi_clk_fast(base, byte >> 1, byte >> 0);
-
- pr_debug("spi_byte_fast sent 0x%02x got 0x%02x\n",
- (unsigned)byte,
- (unsigned char) __raw_readl(base + SPI_REG_RDS));
-}
-
-static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t)
-{
- const unsigned char *rxv_ptr = NULL;
- const unsigned char *tx_ptr = t->tx_buf;
- unsigned char *rx_ptr = t->rx_buf;
- unsigned i;
-
- pr_debug("spi_txrx len %u tx %u rx %u\n",
- t->len,
- (t->tx_buf ? 1 : 0),
- (t->rx_buf ? 1 : 0));
-
- if (t->verify) {
- rxv_ptr = tx_ptr;
- tx_ptr = NULL;
- }
-
- for (i = 0; i < t->len; ++i) {
- unsigned char sdata = tx_ptr ? tx_ptr[i] : 0;
-
- if (t->fast_write)
- do_spi_byte_fast(base, sdata);
- else
- do_spi_byte(base, sdata);
-
- if (rx_ptr) {
- rx_ptr[i] = __raw_readl(base + SPI_REG_RDS) & 0xff;
- } else if (rxv_ptr) {
- unsigned char c = __raw_readl(base + SPI_REG_RDS);
- if (rxv_ptr[i] != c)
- return i;
- }
- }
-
- return i;
-}
-
-static int rb4xx_spi_read_fast(struct rb4xx_spi *rbspi,
- struct spi_message *m)
-{
- struct spi_transfer *t;
- const unsigned char *tx_ptr;
- unsigned addr;
- void __iomem *base = rbspi->base;
-
- /* check for exactly two transfers */
- if (list_empty(&m->transfers) ||
- list_is_last(m->transfers.next, &m->transfers) ||
- !list_is_last(m->transfers.next->next, &m->transfers)) {
- return -1;
- }
-
- /* first transfer contains command and address */
- t = list_entry(m->transfers.next,
- struct spi_transfer, transfer_list);
-
- if (t->len != 5 || t->tx_buf == NULL)
- return -1;
-
- tx_ptr = t->tx_buf;
- if (tx_ptr[0] != CPLD_CMD_READ_FAST)
- return -1;
-
- addr = tx_ptr[1];
- addr = tx_ptr[2] | (addr << 8);
- addr = tx_ptr[3] | (addr << 8);
- addr += (unsigned) base;
-
- m->actual_length += t->len;
-
- /* second transfer contains data itself */
- t = list_entry(m->transfers.next->next,
- struct spi_transfer, transfer_list);
-
- if (t->tx_buf && !t->verify)
- return -1;
-
- __raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
- __raw_writel(rbspi->spi_ctrl_fread, base + SPI_REG_CTRL);
- __raw_writel(0, base + SPI_REG_FS);
-
- if (t->rx_buf) {
- memcpy(t->rx_buf, (const void *)addr, t->len);
- } else if (t->tx_buf) {
- unsigned char buf[t->len];
- memcpy(buf, (const void *)addr, t->len);
- if (memcmp(t->tx_buf, buf, t->len) != 0)
- m->status = -EMSGSIZE;
- }
- m->actual_length += t->len;
-
- if (rbspi->spi_ctrl_flash != rbspi->spi_ctrl_fread) {
- __raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
- __raw_writel(rbspi->spi_ctrl_flash, base + SPI_REG_CTRL);
- __raw_writel(0, base + SPI_REG_FS);
- }
-
- return 0;
-}
-
-static int rb4xx_spi_msg(struct rb4xx_spi *rbspi, struct spi_message *m)
-{
- struct spi_transfer *t = NULL;
- void __iomem *base = rbspi->base;
-
- m->status = 0;
- if (list_empty(&m->transfers))
- return -1;
-
- if (m->fast_read)
- if (rb4xx_spi_read_fast(rbspi, m) == 0)
- return -1;
-
- __raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
- __raw_writel(SPI_CTRL_FASTEST, base + SPI_REG_CTRL);
- do_spi_init(m->spi);
-
- list_for_each_entry(t, &m->transfers, transfer_list) {
- int len;
-
- len = rb4xx_spi_txrx(base, t);
- if (len != t->len) {
- m->status = -EMSGSIZE;
- break;
- }
- m->actual_length += len;
-
- if (t->cs_change) {
- if (list_is_last(&t->transfer_list, &m->transfers)) {
- /* wait for continuation */
- return m->spi->chip_select;
- }
- do_spi_finish(base);
- ndelay(100);
- }
- }
-
- do_spi_finish(base);
- __raw_writel(rbspi->spi_ctrl_flash, base + SPI_REG_CTRL);
- __raw_writel(0, base + SPI_REG_FS);
- return -1;
-}
-
-static void rb4xx_spi_process_queue_locked(struct rb4xx_spi *rbspi,
- unsigned long *flags)
-{
- int cs = rbspi->cs_wait;
-
- rbspi->busy = 1;
- while (!list_empty(&rbspi->queue)) {
- struct spi_message *m;
-
- list_for_each_entry(m, &rbspi->queue, queue)
- if (cs < 0 || cs == m->spi->chip_select)
- break;
-
- if (&m->queue == &rbspi->queue)
- break;
-
- list_del_init(&m->queue);
- spin_unlock_irqrestore(&rbspi->lock, *flags);
-
- cs = rb4xx_spi_msg(rbspi, m);
- m->complete(m->context);
-
- spin_lock_irqsave(&rbspi->lock, *flags);
- }
-
- rbspi->cs_wait = cs;
- rbspi->busy = 0;
-
- if (cs >= 0) {
- /* TODO: add timer to unlock cs after 1s inactivity */
- }
-}
-
-static int rb4xx_spi_transfer(struct spi_device *spi,
- struct spi_message *m)
-{
- struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master);
- unsigned long flags;
-
- m->actual_length = 0;
- m->status = -EINPROGRESS;
-
- spin_lock_irqsave(&rbspi->lock, flags);
- list_add_tail(&m->queue, &rbspi->queue);
- if (rbspi->busy ||
- (rbspi->cs_wait >= 0 && rbspi->cs_wait != m->spi->chip_select)) {
- /* job will be done later */
- spin_unlock_irqrestore(&rbspi->lock, flags);
- return 0;
- }
-
- /* process job in current context */
- rb4xx_spi_process_queue_locked(rbspi, &flags);
- spin_unlock_irqrestore(&rbspi->lock, flags);
-
- return 0;
-}
-
-static int rb4xx_spi_setup(struct spi_device *spi)
-{
- struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master);
- unsigned long flags;
-
- if (spi->mode & ~(SPI_CS_HIGH)) {
- dev_err(&spi->dev, "mode %x not supported\n",
- (unsigned) spi->mode);
- return -EINVAL;
- }
-
- if (spi->bits_per_word != 8 && spi->bits_per_word != 0) {
- dev_err(&spi->dev, "bits_per_word %u not supported\n",
- (unsigned) spi->bits_per_word);
- return -EINVAL;
- }
-
- spin_lock_irqsave(&rbspi->lock, flags);
- if (rbspi->cs_wait == spi->chip_select && !rbspi->busy) {
- rbspi->cs_wait = -1;
- rb4xx_spi_process_queue_locked(rbspi, &flags);
- }
- spin_unlock_irqrestore(&rbspi->lock, flags);
-
- return 0;
-}
-
-static unsigned get_spi_ctrl(unsigned hz_max, const char *name)
-{
- unsigned div;
-
- div = (ar71xx_ahb_freq - 1) / (2 * hz_max);
-
- /*
- * CPU has a bug at (div == 0) - first bit read is random
- */
- if (div == 0)
- ++div;
-
- if (name) {
- unsigned ahb_khz = (ar71xx_ahb_freq + 500) / 1000;
- unsigned div_real = 2 * (div + 1);
- pr_debug("rb4xx: %s SPI clock %u kHz (AHB %u kHz / %u)\n",
- name,
- ahb_khz / div_real,
- ahb_khz, div_real);
- }
-
- return SPI_CTRL_FASTEST + div;
-}
-
-static int rb4xx_spi_probe(struct platform_device *pdev)
-{
- struct spi_master *master;
- struct rb4xx_spi *rbspi;
- struct resource *r;
- int err = 0;
-
- master = spi_alloc_master(&pdev->dev, sizeof(*rbspi));
- if (master == NULL) {
- dev_err(&pdev->dev, "no memory for spi_master\n");
- err = -ENOMEM;
- goto err_out;
- }
-
- master->bus_num = 0;
- master->num_chipselect = 3;
- master->setup = rb4xx_spi_setup;
- master->transfer = rb4xx_spi_transfer;
-
- rbspi = spi_master_get_devdata(master);
- platform_set_drvdata(pdev, rbspi);
-
- r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (r == NULL) {
- err = -ENOENT;
- goto err_put_master;
- }
-
- rbspi->base = ioremap(r->start, r->end - r->start + 1);
- if (!rbspi->base) {
- err = -ENXIO;
- goto err_put_master;
- }
-
- rbspi->master = master;
- rbspi->spi_ctrl_flash = get_spi_ctrl(SPI_FLASH_HZ, "FLASH");
- rbspi->spi_ctrl_fread = get_spi_ctrl(SPI_CPLD_HZ, "CPLD");
- rbspi->cs_wait = -1;
-
- spin_lock_init(&rbspi->lock);
- INIT_LIST_HEAD(&rbspi->queue);
-
- err = spi_register_master(master);
- if (err) {
- dev_err(&pdev->dev, "failed to register SPI master\n");
- goto err_iounmap;
- }
-
- return 0;
-
-err_iounmap:
- iounmap(rbspi->base);
-err_put_master:
- platform_set_drvdata(pdev, NULL);
- spi_master_put(master);
-err_out:
- return err;
-}
-
-static int rb4xx_spi_remove(struct platform_device *pdev)
-{
- struct rb4xx_spi *rbspi = platform_get_drvdata(pdev);
-
- iounmap(rbspi->base);
- platform_set_drvdata(pdev, NULL);
- spi_master_put(rbspi->master);
-
- return 0;
-}
-
-static struct platform_driver rb4xx_spi_drv = {
- .probe = rb4xx_spi_probe,
- .remove = rb4xx_spi_remove,
- .driver = {
- .name = DRV_NAME,
- .owner = THIS_MODULE,
- },
-};
-
-static int __init rb4xx_spi_init(void)
-{
- return platform_driver_register(&rb4xx_spi_drv);
-}
-subsys_initcall(rb4xx_spi_init);
-
-static void __exit rb4xx_spi_exit(void)
-{
- platform_driver_unregister(&rb4xx_spi_drv);
-}
-
-module_exit(rb4xx_spi_exit);
-
-MODULE_DESCRIPTION(DRV_DESC);
-MODULE_VERSION(DRV_VERSION);
-MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
-MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * SPI driver for the CPLD chip on the Mikrotik RB4xx boards
+ *
+ * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This file was based on the patches for Linux 2.6.27.39 published by
+ * MikroTik for their RouterBoard 4xx series devices.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/bitops.h>
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <linux/slab.h>
+
+#include <asm/mach-ar71xx/rb4xx_cpld.h>
+
+#define DRV_NAME "spi-rb4xx-cpld"
+#define DRV_DESC "RB4xx CPLD driver"
+#define DRV_VERSION "0.1.0"
+
+#define CPLD_CMD_WRITE_NAND 0x08 /* send cmd, n x send data, send indle */
+#define CPLD_CMD_WRITE_CFG 0x09 /* send cmd, n x send cfg */
+#define CPLD_CMD_READ_NAND 0x0a /* send cmd, send idle, n x read data */
+#define CPLD_CMD_READ_FAST 0x0b /* send cmd, 4 x idle, n x read data */
+#define CPLD_CMD_LED5_ON 0x0c /* send cmd */
+#define CPLD_CMD_LED5_OFF 0x0d /* send cmd */
+
+struct rb4xx_cpld {
+ struct spi_device *spi;
+ struct mutex lock;
+ struct gpio_chip chip;
+ unsigned int config;
+};
+
+static struct rb4xx_cpld *rb4xx_cpld;
+
+static inline struct rb4xx_cpld *gpio_to_cpld(struct gpio_chip *chip)
+{
+ return container_of(chip, struct rb4xx_cpld, chip);
+}
+
+static int rb4xx_cpld_write_cmd(struct rb4xx_cpld *cpld, unsigned char cmd)
+{
+ struct spi_transfer t[1];
+ struct spi_message m;
+ unsigned char tx_buf[1];
+ int err;
+
+ spi_message_init(&m);
+ memset(&t, 0, sizeof(t));
+
+ t[0].tx_buf = tx_buf;
+ t[0].len = sizeof(tx_buf);
+ spi_message_add_tail(&t[0], &m);
+
+ tx_buf[0] = cmd;
+
+ err = spi_sync(cpld->spi, &m);
+ return err;
+}
+
+static int rb4xx_cpld_write_cfg(struct rb4xx_cpld *cpld, unsigned char config)
+{
+ struct spi_transfer t[1];
+ struct spi_message m;
+ unsigned char cmd[2];
+ int err;
+
+ spi_message_init(&m);
+ memset(&t, 0, sizeof(t));
+
+ t[0].tx_buf = cmd;
+ t[0].len = sizeof(cmd);
+ spi_message_add_tail(&t[0], &m);
+
+ cmd[0] = CPLD_CMD_WRITE_CFG;
+ cmd[1] = config;
+
+ err = spi_sync(cpld->spi, &m);
+ return err;
+}
+
+static int __rb4xx_cpld_change_cfg(struct rb4xx_cpld *cpld, unsigned mask,
+ unsigned value)
+{
+ unsigned int config;
+ int err;
+
+ config = cpld->config & ~mask;
+ config |= value;
+
+ if ((cpld->config ^ config) & 0xff) {
+ err = rb4xx_cpld_write_cfg(cpld, config);
+ if (err)
+ return err;
+ }
+
+ if ((cpld->config ^ config) & CPLD_CFG_nLED5) {
+ err = rb4xx_cpld_write_cmd(cpld, (value) ? CPLD_CMD_LED5_ON :
+ CPLD_CMD_LED5_OFF);
+ if (err)
+ return err;
+ }
+
+ cpld->config = config;
+ return 0;
+}
+
+int rb4xx_cpld_change_cfg(unsigned mask, unsigned value)
+{
+ int ret;
+
+ if (rb4xx_cpld == NULL)
+ return -ENODEV;
+
+ mutex_lock(&rb4xx_cpld->lock);
+ ret = __rb4xx_cpld_change_cfg(rb4xx_cpld, mask, value);
+ mutex_unlock(&rb4xx_cpld->lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(rb4xx_cpld_change_cfg);
+
+int rb4xx_cpld_read_from(unsigned addr, unsigned char *rx_buf,
+ const unsigned char *verify_buf, unsigned count)
+{
+ const unsigned char cmd[5] = {
+ CPLD_CMD_READ_FAST,
+ (addr >> 16) & 0xff,
+ (addr >> 8) & 0xff,
+ addr & 0xff,
+ 0
+ };
+ struct spi_transfer t[2] = {
+ {
+ .tx_buf = &cmd,
+ .len = 5,
+ },
+ {
+ .tx_buf = verify_buf,
+ .rx_buf = rx_buf,
+ .len = count,
+ .verify = (verify_buf != NULL),
+ },
+ };
+ struct spi_message m;
+
+ if (rb4xx_cpld == NULL)
+ return -ENODEV;
+
+ spi_message_init(&m);
+ m.fast_read = 1;
+ spi_message_add_tail(&t[0], &m);
+ spi_message_add_tail(&t[1], &m);
+ return spi_sync(rb4xx_cpld->spi, &m);
+}
+EXPORT_SYMBOL_GPL(rb4xx_cpld_read_from);
+
+#if 0
+int rb4xx_cpld_read(unsigned char *buf, unsigned char *verify_buf,
+ unsigned count)
+{
+ struct spi_transfer t[2];
+ struct spi_message m;
+ unsigned char cmd[2];
+
+ if (rb4xx_cpld == NULL)
+ return -ENODEV;
+
+ spi_message_init(&m);
+ memset(&t, 0, sizeof(t));
+
+ /* send command */
+ t[0].tx_buf = cmd;
+ t[0].len = sizeof(cmd);
+ spi_message_add_tail(&t[0], &m);
+
+ cmd[0] = CPLD_CMD_READ_NAND;
+ cmd[1] = 0;
+
+ /* read data */
+ t[1].rx_buf = buf;
+ t[1].len = count;
+ spi_message_add_tail(&t[1], &m);
+
+ return spi_sync(rb4xx_cpld->spi, &m);
+}
+#else
+int rb4xx_cpld_read(unsigned char *rx_buf, const unsigned char *verify_buf,
+ unsigned count)
+{
+ static const unsigned char cmd[2] = { CPLD_CMD_READ_NAND, 0 };
+ struct spi_transfer t[2] = {
+ {
+ .tx_buf = &cmd,
+ .len = 2,
+ }, {
+ .tx_buf = verify_buf,
+ .rx_buf = rx_buf,
+ .len = count,
+ .verify = (verify_buf != NULL),
+ },
+ };
+ struct spi_message m;
+
+ if (rb4xx_cpld == NULL)
+ return -ENODEV;
+
+ spi_message_init(&m);
+ spi_message_add_tail(&t[0], &m);
+ spi_message_add_tail(&t[1], &m);
+ return spi_sync(rb4xx_cpld->spi, &m);
+}
+#endif
+EXPORT_SYMBOL_GPL(rb4xx_cpld_read);
+
+int rb4xx_cpld_write(const unsigned char *buf, unsigned count)
+{
+#if 0
+ struct spi_transfer t[3];
+ struct spi_message m;
+ unsigned char cmd[1];
+
+ if (rb4xx_cpld == NULL)
+ return -ENODEV;
+
+ memset(&t, 0, sizeof(t));
+ spi_message_init(&m);
+
+ /* send command */
+ t[0].tx_buf = cmd;
+ t[0].len = sizeof(cmd);
+ spi_message_add_tail(&t[0], &m);
+
+ cmd[0] = CPLD_CMD_WRITE_NAND;
+
+ /* write data */
+ t[1].tx_buf = buf;
+ t[1].len = count;
+ spi_message_add_tail(&t[1], &m);
+
+ /* send idle */
+ t[2].len = 1;
+ spi_message_add_tail(&t[2], &m);
+
+ return spi_sync(rb4xx_cpld->spi, &m);
+#else
+ static const unsigned char cmd = CPLD_CMD_WRITE_NAND;
+ struct spi_transfer t[3] = {
+ {
+ .tx_buf = &cmd,
+ .len = 1,
+ }, {
+ .tx_buf = buf,
+ .len = count,
+ .fast_write = 1,
+ }, {
+ .len = 1,
+ .fast_write = 1,
+ },
+ };
+ struct spi_message m;
+
+ if (rb4xx_cpld == NULL)
+ return -ENODEV;
+
+ spi_message_init(&m);
+ spi_message_add_tail(&t[0], &m);
+ spi_message_add_tail(&t[1], &m);
+ spi_message_add_tail(&t[2], &m);
+ return spi_sync(rb4xx_cpld->spi, &m);
+#endif
+}
+EXPORT_SYMBOL_GPL(rb4xx_cpld_write);
+
+static int rb4xx_cpld_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+ struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
+ int ret;
+
+ mutex_lock(&cpld->lock);
+ ret = (cpld->config >> offset) & 1;
+ mutex_unlock(&cpld->lock);
+
+ return ret;
+}
+
+static void rb4xx_cpld_gpio_set(struct gpio_chip *chip, unsigned offset,
+ int value)
+{
+ struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
+
+ mutex_lock(&cpld->lock);
+ __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset);
+ mutex_unlock(&cpld->lock);
+}
+
+static int rb4xx_cpld_gpio_direction_input(struct gpio_chip *chip,
+ unsigned offset)
+{
+ return -EOPNOTSUPP;
+}
+
+static int rb4xx_cpld_gpio_direction_output(struct gpio_chip *chip,
+ unsigned offset,
+ int value)
+{
+ struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
+ int ret;
+
+ mutex_lock(&cpld->lock);
+ ret = __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset);
+ mutex_unlock(&cpld->lock);
+
+ return ret;
+}
+
+static int rb4xx_cpld_gpio_init(struct rb4xx_cpld *cpld, unsigned int base)
+{
+ int err;
+
+ /* init config */
+ cpld->config = CPLD_CFG_nLED1 | CPLD_CFG_nLED2 | CPLD_CFG_nLED3 |
+ CPLD_CFG_nLED4 | CPLD_CFG_nCE;
+ rb4xx_cpld_write_cfg(cpld, cpld->config);
+
+ /* setup GPIO chip */
+ cpld->chip.label = DRV_NAME;
+
+ cpld->chip.get = rb4xx_cpld_gpio_get;
+ cpld->chip.set = rb4xx_cpld_gpio_set;
+ cpld->chip.direction_input = rb4xx_cpld_gpio_direction_input;
+ cpld->chip.direction_output = rb4xx_cpld_gpio_direction_output;
+
+ cpld->chip.base = base;
+ cpld->chip.ngpio = CPLD_NUM_GPIOS;
+ cpld->chip.can_sleep = 1;
+ cpld->chip.dev = &cpld->spi->dev;
+ cpld->chip.owner = THIS_MODULE;
+
+ err = gpiochip_add(&cpld->chip);
+ if (err)
+ dev_err(&cpld->spi->dev, "adding GPIO chip failed, err=%d\n",
+ err);
+
+ return err;
+}
+
+static int __devinit rb4xx_cpld_probe(struct spi_device *spi)
+{
+ struct rb4xx_cpld *cpld;
+ struct rb4xx_cpld_platform_data *pdata;
+ int err;
+
+ pdata = spi->dev.platform_data;
+ if (!pdata) {
+ dev_dbg(&spi->dev, "no platform data\n");
+ return -EINVAL;
+ }
+
+ cpld = kzalloc(sizeof(*cpld), GFP_KERNEL);
+ if (!cpld) {
+ dev_err(&spi->dev, "no memory for private data\n");
+ return -ENOMEM;
+ }
+
+ mutex_init(&cpld->lock);
+ cpld->spi = spi_dev_get(spi);
+ dev_set_drvdata(&spi->dev, cpld);
+
+ spi->mode = SPI_MODE_0;
+ spi->bits_per_word = 8;
+ err = spi_setup(spi);
+ if (err) {
+ dev_err(&spi->dev, "spi_setup failed, err=%d\n", err);
+ goto err_drvdata;
+ }
+
+ err = rb4xx_cpld_gpio_init(cpld, pdata->gpio_base);
+ if (err)
+ goto err_drvdata;
+
+ rb4xx_cpld = cpld;
+
+ return 0;
+
+err_drvdata:
+ dev_set_drvdata(&spi->dev, NULL);
+ kfree(cpld);
+
+ return err;
+}
+
+static int __devexit rb4xx_cpld_remove(struct spi_device *spi)
+{
+ struct rb4xx_cpld *cpld;
+
+ rb4xx_cpld = NULL;
+ cpld = dev_get_drvdata(&spi->dev);
+ dev_set_drvdata(&spi->dev, NULL);
+ kfree(cpld);
+
+ return 0;
+}
+
+static struct spi_driver rb4xx_cpld_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .bus = &spi_bus_type,
+ .owner = THIS_MODULE,
+ },
+ .probe = rb4xx_cpld_probe,
+ .remove = __devexit_p(rb4xx_cpld_remove),
+};
+
+static int __init rb4xx_cpld_init(void)
+{
+ return spi_register_driver(&rb4xx_cpld_driver);
+}
+module_init(rb4xx_cpld_init);
+
+static void __exit rb4xx_cpld_exit(void)
+{
+ spi_unregister_driver(&rb4xx_cpld_driver);
+}
+module_exit(rb4xx_cpld_exit);
+
+MODULE_DESCRIPTION(DRV_DESC);
+MODULE_VERSION(DRV_VERSION);
+MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * SPI controller driver for the Mikrotik RB4xx boards
+ *
+ * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This file was based on the patches for Linux 2.6.27.39 published by
+ * MikroTik for their RouterBoard 4xx series devices.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/workqueue.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+
+#include <asm/mach-ar71xx/ar71xx.h>
+
+#define DRV_NAME "rb4xx-spi"
+#define DRV_DESC "Mikrotik RB4xx SPI controller driver"
+#define DRV_VERSION "0.1.0"
+
+#define SPI_CTRL_FASTEST 0x40
+#define SPI_FLASH_HZ 33333334
+#define SPI_CPLD_HZ 33333334
+
+#define CPLD_CMD_READ_FAST 0x0b
+
+#undef RB4XX_SPI_DEBUG
+
+struct rb4xx_spi {
+ void __iomem *base;
+ struct spi_master *master;
+
+ unsigned spi_ctrl_flash;
+ unsigned spi_ctrl_fread;
+
+ spinlock_t lock;
+ struct list_head queue;
+ int busy:1;
+ int cs_wait;
+};
+
+static unsigned spi_clk_low = SPI_IOC_CS1;
+
+#ifdef RB4XX_SPI_DEBUG
+static inline void do_spi_delay(void)
+{
+ ndelay(20000);
+}
+#else
+static inline void do_spi_delay(void) { }
+#endif
+
+static inline void do_spi_init(struct spi_device *spi)
+{
+ unsigned cs = SPI_IOC_CS0 | SPI_IOC_CS1;
+
+ if (!(spi->mode & SPI_CS_HIGH))
+ cs ^= (spi->chip_select == 2) ? SPI_IOC_CS1 : SPI_IOC_CS0;
+
+ spi_clk_low = cs;
+}
+
+static inline void do_spi_finish(void __iomem *base)
+{
+ do_spi_delay();
+ __raw_writel(SPI_IOC_CS0 | SPI_IOC_CS1, base + SPI_REG_IOC);
+}
+
+static inline void do_spi_clk(void __iomem *base, int bit)
+{
+ unsigned bval = spi_clk_low | ((bit & 1) ? SPI_IOC_DO : 0);
+
+ do_spi_delay();
+ __raw_writel(bval, base + SPI_REG_IOC);
+ do_spi_delay();
+ __raw_writel(bval | SPI_IOC_CLK, base + SPI_REG_IOC);
+}
+
+static void do_spi_byte(void __iomem *base, unsigned char byte)
+{
+ do_spi_clk(base, byte >> 7);
+ do_spi_clk(base, byte >> 6);
+ do_spi_clk(base, byte >> 5);
+ do_spi_clk(base, byte >> 4);
+ do_spi_clk(base, byte >> 3);
+ do_spi_clk(base, byte >> 2);
+ do_spi_clk(base, byte >> 1);
+ do_spi_clk(base, byte);
+
+ pr_debug("spi_byte sent 0x%02x got 0x%02x\n",
+ (unsigned)byte,
+ (unsigned char)__raw_readl(base + SPI_REG_RDS));
+}
+
+static inline void do_spi_clk_fast(void __iomem *base, unsigned bit1,
+ unsigned bit2)
+{
+ unsigned bval = (spi_clk_low |
+ ((bit1 & 1) ? SPI_IOC_DO : 0) |
+ ((bit2 & 1) ? SPI_IOC_CS2 : 0));
+ do_spi_delay();
+ __raw_writel(bval, base + SPI_REG_IOC);
+ do_spi_delay();
+ __raw_writel(bval | SPI_IOC_CLK, base + SPI_REG_IOC);
+}
+
+static void do_spi_byte_fast(void __iomem *base, unsigned char byte)
+{
+ do_spi_clk_fast(base, byte >> 7, byte >> 6);
+ do_spi_clk_fast(base, byte >> 5, byte >> 4);
+ do_spi_clk_fast(base, byte >> 3, byte >> 2);
+ do_spi_clk_fast(base, byte >> 1, byte >> 0);
+
+ pr_debug("spi_byte_fast sent 0x%02x got 0x%02x\n",
+ (unsigned)byte,
+ (unsigned char) __raw_readl(base + SPI_REG_RDS));
+}
+
+static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t)
+{
+ const unsigned char *rxv_ptr = NULL;
+ const unsigned char *tx_ptr = t->tx_buf;
+ unsigned char *rx_ptr = t->rx_buf;
+ unsigned i;
+
+ pr_debug("spi_txrx len %u tx %u rx %u\n",
+ t->len,
+ (t->tx_buf ? 1 : 0),
+ (t->rx_buf ? 1 : 0));
+
+ if (t->verify) {
+ rxv_ptr = tx_ptr;
+ tx_ptr = NULL;
+ }
+
+ for (i = 0; i < t->len; ++i) {
+ unsigned char sdata = tx_ptr ? tx_ptr[i] : 0;
+
+ if (t->fast_write)
+ do_spi_byte_fast(base, sdata);
+ else
+ do_spi_byte(base, sdata);
+
+ if (rx_ptr) {
+ rx_ptr[i] = __raw_readl(base + SPI_REG_RDS) & 0xff;
+ } else if (rxv_ptr) {
+ unsigned char c = __raw_readl(base + SPI_REG_RDS);
+ if (rxv_ptr[i] != c)
+ return i;
+ }
+ }
+
+ return i;
+}
+
+static int rb4xx_spi_read_fast(struct rb4xx_spi *rbspi,
+ struct spi_message *m)
+{
+ struct spi_transfer *t;
+ const unsigned char *tx_ptr;
+ unsigned addr;
+ void __iomem *base = rbspi->base;
+
+ /* check for exactly two transfers */
+ if (list_empty(&m->transfers) ||
+ list_is_last(m->transfers.next, &m->transfers) ||
+ !list_is_last(m->transfers.next->next, &m->transfers)) {
+ return -1;
+ }
+
+ /* first transfer contains command and address */
+ t = list_entry(m->transfers.next,
+ struct spi_transfer, transfer_list);
+
+ if (t->len != 5 || t->tx_buf == NULL)
+ return -1;
+
+ tx_ptr = t->tx_buf;
+ if (tx_ptr[0] != CPLD_CMD_READ_FAST)
+ return -1;
+
+ addr = tx_ptr[1];
+ addr = tx_ptr[2] | (addr << 8);
+ addr = tx_ptr[3] | (addr << 8);
+ addr += (unsigned) base;
+
+ m->actual_length += t->len;
+
+ /* second transfer contains data itself */
+ t = list_entry(m->transfers.next->next,
+ struct spi_transfer, transfer_list);
+
+ if (t->tx_buf && !t->verify)
+ return -1;
+
+ __raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
+ __raw_writel(rbspi->spi_ctrl_fread, base + SPI_REG_CTRL);
+ __raw_writel(0, base + SPI_REG_FS);
+
+ if (t->rx_buf) {
+ memcpy(t->rx_buf, (const void *)addr, t->len);
+ } else if (t->tx_buf) {
+ unsigned char buf[t->len];
+ memcpy(buf, (const void *)addr, t->len);
+ if (memcmp(t->tx_buf, buf, t->len) != 0)
+ m->status = -EMSGSIZE;
+ }
+ m->actual_length += t->len;
+
+ if (rbspi->spi_ctrl_flash != rbspi->spi_ctrl_fread) {
+ __raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
+ __raw_writel(rbspi->spi_ctrl_flash, base + SPI_REG_CTRL);
+ __raw_writel(0, base + SPI_REG_FS);
+ }
+
+ return 0;
+}
+
+static int rb4xx_spi_msg(struct rb4xx_spi *rbspi, struct spi_message *m)
+{
+ struct spi_transfer *t = NULL;
+ void __iomem *base = rbspi->base;
+
+ m->status = 0;
+ if (list_empty(&m->transfers))
+ return -1;
+
+ if (m->fast_read)
+ if (rb4xx_spi_read_fast(rbspi, m) == 0)
+ return -1;
+
+ __raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
+ __raw_writel(SPI_CTRL_FASTEST, base + SPI_REG_CTRL);
+ do_spi_init(m->spi);
+
+ list_for_each_entry(t, &m->transfers, transfer_list) {
+ int len;
+
+ len = rb4xx_spi_txrx(base, t);
+ if (len != t->len) {
+ m->status = -EMSGSIZE;
+ break;
+ }
+ m->actual_length += len;
+
+ if (t->cs_change) {
+ if (list_is_last(&t->transfer_list, &m->transfers)) {
+ /* wait for continuation */
+ return m->spi->chip_select;
+ }
+ do_spi_finish(base);
+ ndelay(100);
+ }
+ }
+
+ do_spi_finish(base);
+ __raw_writel(rbspi->spi_ctrl_flash, base + SPI_REG_CTRL);
+ __raw_writel(0, base + SPI_REG_FS);
+ return -1;
+}
+
+static void rb4xx_spi_process_queue_locked(struct rb4xx_spi *rbspi,
+ unsigned long *flags)
+{
+ int cs = rbspi->cs_wait;
+
+ rbspi->busy = 1;
+ while (!list_empty(&rbspi->queue)) {
+ struct spi_message *m;
+
+ list_for_each_entry(m, &rbspi->queue, queue)
+ if (cs < 0 || cs == m->spi->chip_select)
+ break;
+
+ if (&m->queue == &rbspi->queue)
+ break;
+
+ list_del_init(&m->queue);
+ spin_unlock_irqrestore(&rbspi->lock, *flags);
+
+ cs = rb4xx_spi_msg(rbspi, m);
+ m->complete(m->context);
+
+ spin_lock_irqsave(&rbspi->lock, *flags);
+ }
+
+ rbspi->cs_wait = cs;
+ rbspi->busy = 0;
+
+ if (cs >= 0) {
+ /* TODO: add timer to unlock cs after 1s inactivity */
+ }
+}
+
+static int rb4xx_spi_transfer(struct spi_device *spi,
+ struct spi_message *m)
+{
+ struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master);
+ unsigned long flags;
+
+ m->actual_length = 0;
+ m->status = -EINPROGRESS;
+
+ spin_lock_irqsave(&rbspi->lock, flags);
+ list_add_tail(&m->queue, &rbspi->queue);
+ if (rbspi->busy ||
+ (rbspi->cs_wait >= 0 && rbspi->cs_wait != m->spi->chip_select)) {
+ /* job will be done later */
+ spin_unlock_irqrestore(&rbspi->lock, flags);
+ return 0;
+ }
+
+ /* process job in current context */
+ rb4xx_spi_process_queue_locked(rbspi, &flags);
+ spin_unlock_irqrestore(&rbspi->lock, flags);
+
+ return 0;
+}
+
+static int rb4xx_spi_setup(struct spi_device *spi)
+{
+ struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master);
+ unsigned long flags;
+
+ if (spi->mode & ~(SPI_CS_HIGH)) {
+ dev_err(&spi->dev, "mode %x not supported\n",
+ (unsigned) spi->mode);
+ return -EINVAL;
+ }
+
+ if (spi->bits_per_word != 8 && spi->bits_per_word != 0) {
+ dev_err(&spi->dev, "bits_per_word %u not supported\n",
+ (unsigned) spi->bits_per_word);
+ return -EINVAL;
+ }
+
+ spin_lock_irqsave(&rbspi->lock, flags);
+ if (rbspi->cs_wait == spi->chip_select && !rbspi->busy) {
+ rbspi->cs_wait = -1;
+ rb4xx_spi_process_queue_locked(rbspi, &flags);
+ }
+ spin_unlock_irqrestore(&rbspi->lock, flags);
+
+ return 0;
+}
+
+static unsigned get_spi_ctrl(unsigned hz_max, const char *name)
+{
+ unsigned div;
+
+ div = (ar71xx_ahb_freq - 1) / (2 * hz_max);
+
+ /*
+ * CPU has a bug at (div == 0) - first bit read is random
+ */
+ if (div == 0)
+ ++div;
+
+ if (name) {
+ unsigned ahb_khz = (ar71xx_ahb_freq + 500) / 1000;
+ unsigned div_real = 2 * (div + 1);
+ pr_debug("rb4xx: %s SPI clock %u kHz (AHB %u kHz / %u)\n",
+ name,
+ ahb_khz / div_real,
+ ahb_khz, div_real);
+ }
+
+ return SPI_CTRL_FASTEST + div;
+}
+
+static int rb4xx_spi_probe(struct platform_device *pdev)
+{
+ struct spi_master *master;
+ struct rb4xx_spi *rbspi;
+ struct resource *r;
+ int err = 0;
+
+ master = spi_alloc_master(&pdev->dev, sizeof(*rbspi));
+ if (master == NULL) {
+ dev_err(&pdev->dev, "no memory for spi_master\n");
+ err = -ENOMEM;
+ goto err_out;
+ }
+
+ master->bus_num = 0;
+ master->num_chipselect = 3;
+ master->setup = rb4xx_spi_setup;
+ master->transfer = rb4xx_spi_transfer;
+
+ rbspi = spi_master_get_devdata(master);
+ platform_set_drvdata(pdev, rbspi);
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (r == NULL) {
+ err = -ENOENT;
+ goto err_put_master;
+ }
+
+ rbspi->base = ioremap(r->start, r->end - r->start + 1);
+ if (!rbspi->base) {
+ err = -ENXIO;
+ goto err_put_master;
+ }
+
+ rbspi->master = master;
+ rbspi->spi_ctrl_flash = get_spi_ctrl(SPI_FLASH_HZ, "FLASH");
+ rbspi->spi_ctrl_fread = get_spi_ctrl(SPI_CPLD_HZ, "CPLD");
+ rbspi->cs_wait = -1;
+
+ spin_lock_init(&rbspi->lock);
+ INIT_LIST_HEAD(&rbspi->queue);
+
+ err = spi_register_master(master);
+ if (err) {
+ dev_err(&pdev->dev, "failed to register SPI master\n");
+ goto err_iounmap;
+ }
+
+ return 0;
+
+err_iounmap:
+ iounmap(rbspi->base);
+err_put_master:
+ platform_set_drvdata(pdev, NULL);
+ spi_master_put(master);
+err_out:
+ return err;
+}
+
+static int rb4xx_spi_remove(struct platform_device *pdev)
+{
+ struct rb4xx_spi *rbspi = platform_get_drvdata(pdev);
+
+ iounmap(rbspi->base);
+ platform_set_drvdata(pdev, NULL);
+ spi_master_put(rbspi->master);
+
+ return 0;
+}
+
+static struct platform_driver rb4xx_spi_drv = {
+ .probe = rb4xx_spi_probe,
+ .remove = rb4xx_spi_remove,
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init rb4xx_spi_init(void)
+{
+ return platform_driver_register(&rb4xx_spi_drv);
+}
+subsys_initcall(rb4xx_spi_init);
+
+static void __exit rb4xx_spi_exit(void)
+{
+ platform_driver_unregister(&rb4xx_spi_drv);
+}
+
+module_exit(rb4xx_spi_exit);
+
+MODULE_DESCRIPTION(DRV_DESC);
+MODULE_VERSION(DRV_VERSION);
+MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
+MODULE_LICENSE("GPL v2");
+++ /dev/null
-/*
- * SPI driver for the CPLD chip on the Mikrotik RB4xx boards
- *
- * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
- *
- * This file was based on the patches for Linux 2.6.27.39 published by
- * MikroTik for their RouterBoard 4xx series devices.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/bitops.h>
-#include <linux/spi/spi.h>
-#include <linux/gpio.h>
-#include <linux/slab.h>
-
-#include <asm/mach-ar71xx/rb4xx_cpld.h>
-
-#define DRV_NAME "spi-rb4xx-cpld"
-#define DRV_DESC "RB4xx CPLD driver"
-#define DRV_VERSION "0.1.0"
-
-#define CPLD_CMD_WRITE_NAND 0x08 /* send cmd, n x send data, send indle */
-#define CPLD_CMD_WRITE_CFG 0x09 /* send cmd, n x send cfg */
-#define CPLD_CMD_READ_NAND 0x0a /* send cmd, send idle, n x read data */
-#define CPLD_CMD_READ_FAST 0x0b /* send cmd, 4 x idle, n x read data */
-#define CPLD_CMD_LED5_ON 0x0c /* send cmd */
-#define CPLD_CMD_LED5_OFF 0x0d /* send cmd */
-
-struct rb4xx_cpld {
- struct spi_device *spi;
- struct mutex lock;
- struct gpio_chip chip;
- unsigned int config;
-};
-
-static struct rb4xx_cpld *rb4xx_cpld;
-
-static inline struct rb4xx_cpld *gpio_to_cpld(struct gpio_chip *chip)
-{
- return container_of(chip, struct rb4xx_cpld, chip);
-}
-
-static int rb4xx_cpld_write_cmd(struct rb4xx_cpld *cpld, unsigned char cmd)
-{
- struct spi_transfer t[1];
- struct spi_message m;
- unsigned char tx_buf[1];
- int err;
-
- spi_message_init(&m);
- memset(&t, 0, sizeof(t));
-
- t[0].tx_buf = tx_buf;
- t[0].len = sizeof(tx_buf);
- spi_message_add_tail(&t[0], &m);
-
- tx_buf[0] = cmd;
-
- err = spi_sync(cpld->spi, &m);
- return err;
-}
-
-static int rb4xx_cpld_write_cfg(struct rb4xx_cpld *cpld, unsigned char config)
-{
- struct spi_transfer t[1];
- struct spi_message m;
- unsigned char cmd[2];
- int err;
-
- spi_message_init(&m);
- memset(&t, 0, sizeof(t));
-
- t[0].tx_buf = cmd;
- t[0].len = sizeof(cmd);
- spi_message_add_tail(&t[0], &m);
-
- cmd[0] = CPLD_CMD_WRITE_CFG;
- cmd[1] = config;
-
- err = spi_sync(cpld->spi, &m);
- return err;
-}
-
-static int __rb4xx_cpld_change_cfg(struct rb4xx_cpld *cpld, unsigned mask,
- unsigned value)
-{
- unsigned int config;
- int err;
-
- config = cpld->config & ~mask;
- config |= value;
-
- if ((cpld->config ^ config) & 0xff) {
- err = rb4xx_cpld_write_cfg(cpld, config);
- if (err)
- return err;
- }
-
- if ((cpld->config ^ config) & CPLD_CFG_nLED5) {
- err = rb4xx_cpld_write_cmd(cpld, (value) ? CPLD_CMD_LED5_ON :
- CPLD_CMD_LED5_OFF);
- if (err)
- return err;
- }
-
- cpld->config = config;
- return 0;
-}
-
-int rb4xx_cpld_change_cfg(unsigned mask, unsigned value)
-{
- int ret;
-
- if (rb4xx_cpld == NULL)
- return -ENODEV;
-
- mutex_lock(&rb4xx_cpld->lock);
- ret = __rb4xx_cpld_change_cfg(rb4xx_cpld, mask, value);
- mutex_unlock(&rb4xx_cpld->lock);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(rb4xx_cpld_change_cfg);
-
-int rb4xx_cpld_read_from(unsigned addr, unsigned char *rx_buf,
- const unsigned char *verify_buf, unsigned count)
-{
- const unsigned char cmd[5] = {
- CPLD_CMD_READ_FAST,
- (addr >> 16) & 0xff,
- (addr >> 8) & 0xff,
- addr & 0xff,
- 0
- };
- struct spi_transfer t[2] = {
- {
- .tx_buf = &cmd,
- .len = 5,
- },
- {
- .tx_buf = verify_buf,
- .rx_buf = rx_buf,
- .len = count,
- .verify = (verify_buf != NULL),
- },
- };
- struct spi_message m;
-
- if (rb4xx_cpld == NULL)
- return -ENODEV;
-
- spi_message_init(&m);
- m.fast_read = 1;
- spi_message_add_tail(&t[0], &m);
- spi_message_add_tail(&t[1], &m);
- return spi_sync(rb4xx_cpld->spi, &m);
-}
-EXPORT_SYMBOL_GPL(rb4xx_cpld_read_from);
-
-#if 0
-int rb4xx_cpld_read(unsigned char *buf, unsigned char *verify_buf,
- unsigned count)
-{
- struct spi_transfer t[2];
- struct spi_message m;
- unsigned char cmd[2];
-
- if (rb4xx_cpld == NULL)
- return -ENODEV;
-
- spi_message_init(&m);
- memset(&t, 0, sizeof(t));
-
- /* send command */
- t[0].tx_buf = cmd;
- t[0].len = sizeof(cmd);
- spi_message_add_tail(&t[0], &m);
-
- cmd[0] = CPLD_CMD_READ_NAND;
- cmd[1] = 0;
-
- /* read data */
- t[1].rx_buf = buf;
- t[1].len = count;
- spi_message_add_tail(&t[1], &m);
-
- return spi_sync(rb4xx_cpld->spi, &m);
-}
-#else
-int rb4xx_cpld_read(unsigned char *rx_buf, const unsigned char *verify_buf,
- unsigned count)
-{
- static const unsigned char cmd[2] = { CPLD_CMD_READ_NAND, 0 };
- struct spi_transfer t[2] = {
- {
- .tx_buf = &cmd,
- .len = 2,
- }, {
- .tx_buf = verify_buf,
- .rx_buf = rx_buf,
- .len = count,
- .verify = (verify_buf != NULL),
- },
- };
- struct spi_message m;
-
- if (rb4xx_cpld == NULL)
- return -ENODEV;
-
- spi_message_init(&m);
- spi_message_add_tail(&t[0], &m);
- spi_message_add_tail(&t[1], &m);
- return spi_sync(rb4xx_cpld->spi, &m);
-}
-#endif
-EXPORT_SYMBOL_GPL(rb4xx_cpld_read);
-
-int rb4xx_cpld_write(const unsigned char *buf, unsigned count)
-{
-#if 0
- struct spi_transfer t[3];
- struct spi_message m;
- unsigned char cmd[1];
-
- if (rb4xx_cpld == NULL)
- return -ENODEV;
-
- memset(&t, 0, sizeof(t));
- spi_message_init(&m);
-
- /* send command */
- t[0].tx_buf = cmd;
- t[0].len = sizeof(cmd);
- spi_message_add_tail(&t[0], &m);
-
- cmd[0] = CPLD_CMD_WRITE_NAND;
-
- /* write data */
- t[1].tx_buf = buf;
- t[1].len = count;
- spi_message_add_tail(&t[1], &m);
-
- /* send idle */
- t[2].len = 1;
- spi_message_add_tail(&t[2], &m);
-
- return spi_sync(rb4xx_cpld->spi, &m);
-#else
- static const unsigned char cmd = CPLD_CMD_WRITE_NAND;
- struct spi_transfer t[3] = {
- {
- .tx_buf = &cmd,
- .len = 1,
- }, {
- .tx_buf = buf,
- .len = count,
- .fast_write = 1,
- }, {
- .len = 1,
- .fast_write = 1,
- },
- };
- struct spi_message m;
-
- if (rb4xx_cpld == NULL)
- return -ENODEV;
-
- spi_message_init(&m);
- spi_message_add_tail(&t[0], &m);
- spi_message_add_tail(&t[1], &m);
- spi_message_add_tail(&t[2], &m);
- return spi_sync(rb4xx_cpld->spi, &m);
-#endif
-}
-EXPORT_SYMBOL_GPL(rb4xx_cpld_write);
-
-static int rb4xx_cpld_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
- struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
- int ret;
-
- mutex_lock(&cpld->lock);
- ret = (cpld->config >> offset) & 1;
- mutex_unlock(&cpld->lock);
-
- return ret;
-}
-
-static void rb4xx_cpld_gpio_set(struct gpio_chip *chip, unsigned offset,
- int value)
-{
- struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
-
- mutex_lock(&cpld->lock);
- __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset);
- mutex_unlock(&cpld->lock);
-}
-
-static int rb4xx_cpld_gpio_direction_input(struct gpio_chip *chip,
- unsigned offset)
-{
- return -EOPNOTSUPP;
-}
-
-static int rb4xx_cpld_gpio_direction_output(struct gpio_chip *chip,
- unsigned offset,
- int value)
-{
- struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
- int ret;
-
- mutex_lock(&cpld->lock);
- ret = __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset);
- mutex_unlock(&cpld->lock);
-
- return ret;
-}
-
-static int rb4xx_cpld_gpio_init(struct rb4xx_cpld *cpld, unsigned int base)
-{
- int err;
-
- /* init config */
- cpld->config = CPLD_CFG_nLED1 | CPLD_CFG_nLED2 | CPLD_CFG_nLED3 |
- CPLD_CFG_nLED4 | CPLD_CFG_nCE;
- rb4xx_cpld_write_cfg(cpld, cpld->config);
-
- /* setup GPIO chip */
- cpld->chip.label = DRV_NAME;
-
- cpld->chip.get = rb4xx_cpld_gpio_get;
- cpld->chip.set = rb4xx_cpld_gpio_set;
- cpld->chip.direction_input = rb4xx_cpld_gpio_direction_input;
- cpld->chip.direction_output = rb4xx_cpld_gpio_direction_output;
-
- cpld->chip.base = base;
- cpld->chip.ngpio = CPLD_NUM_GPIOS;
- cpld->chip.can_sleep = 1;
- cpld->chip.dev = &cpld->spi->dev;
- cpld->chip.owner = THIS_MODULE;
-
- err = gpiochip_add(&cpld->chip);
- if (err)
- dev_err(&cpld->spi->dev, "adding GPIO chip failed, err=%d\n",
- err);
-
- return err;
-}
-
-static int __devinit rb4xx_cpld_probe(struct spi_device *spi)
-{
- struct rb4xx_cpld *cpld;
- struct rb4xx_cpld_platform_data *pdata;
- int err;
-
- pdata = spi->dev.platform_data;
- if (!pdata) {
- dev_dbg(&spi->dev, "no platform data\n");
- return -EINVAL;
- }
-
- cpld = kzalloc(sizeof(*cpld), GFP_KERNEL);
- if (!cpld) {
- dev_err(&spi->dev, "no memory for private data\n");
- return -ENOMEM;
- }
-
- mutex_init(&cpld->lock);
- cpld->spi = spi_dev_get(spi);
- dev_set_drvdata(&spi->dev, cpld);
-
- spi->mode = SPI_MODE_0;
- spi->bits_per_word = 8;
- err = spi_setup(spi);
- if (err) {
- dev_err(&spi->dev, "spi_setup failed, err=%d\n", err);
- goto err_drvdata;
- }
-
- err = rb4xx_cpld_gpio_init(cpld, pdata->gpio_base);
- if (err)
- goto err_drvdata;
-
- rb4xx_cpld = cpld;
-
- return 0;
-
-err_drvdata:
- dev_set_drvdata(&spi->dev, NULL);
- kfree(cpld);
-
- return err;
-}
-
-static int __devexit rb4xx_cpld_remove(struct spi_device *spi)
-{
- struct rb4xx_cpld *cpld;
-
- rb4xx_cpld = NULL;
- cpld = dev_get_drvdata(&spi->dev);
- dev_set_drvdata(&spi->dev, NULL);
- kfree(cpld);
-
- return 0;
-}
-
-static struct spi_driver rb4xx_cpld_driver = {
- .driver = {
- .name = DRV_NAME,
- .bus = &spi_bus_type,
- .owner = THIS_MODULE,
- },
- .probe = rb4xx_cpld_probe,
- .remove = __devexit_p(rb4xx_cpld_remove),
-};
-
-static int __init rb4xx_cpld_init(void)
-{
- return spi_register_driver(&rb4xx_cpld_driver);
-}
-module_init(rb4xx_cpld_init);
-
-static void __exit rb4xx_cpld_exit(void)
-{
- spi_unregister_driver(&rb4xx_cpld_driver);
-}
-module_exit(rb4xx_cpld_exit);
-
-MODULE_DESCRIPTION(DRV_DESC);
-MODULE_VERSION(DRV_VERSION);
-MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
-MODULE_LICENSE("GPL v2");
obj-$(CONFIG_SPI_SH_MSIOF) += spi_sh_msiof.o
obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o
obj-$(CONFIG_SPI_NUC900) += spi_nuc900.o
-+obj-$(CONFIG_SPI_RB4XX) += rb4xx_spi.o
++obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o
# special build for s3c24xx spi driver with fiq support
spi_s3c24xx_hw-y := spi_s3c24xx.o
# ... add above this line ...
# SPI protocol drivers (device/link on bus)
-+obj-$(CONFIG_SPI_RB4XX_CPLD) += spi_rb4xx_cpld.o
++obj-$(CONFIG_SPI_RB4XX_CPLD) += spi-rb4xx-cpld.o
obj-$(CONFIG_SPI_SPIDEV) += spidev.o
obj-$(CONFIG_SPI_TLE62X0) += tle62x0.o
# ... add above this line ...
+++ b/drivers/spi/Makefile
@@ -68,6 +68,7 @@ spi_s3c24xx_hw-$(CONFIG_SPI_S3C24XX_FIQ)
# SPI protocol drivers (device/link on bus)
- obj-$(CONFIG_SPI_RB4XX_CPLD) += spi_rb4xx_cpld.o
+ obj-$(CONFIG_SPI_RB4XX_CPLD) += spi-rb4xx-cpld.o
obj-$(CONFIG_SPI_SPIDEV) += spidev.o
+obj-$(CONFIG_SPI_VSC7385) += spi_vsc7385.o
obj-$(CONFIG_SPI_TLE62X0) += tle62x0.o
projects / openwrt / staging / hauke.git / commitdiff