reg = <0x18000000 0x100>;
};
- sbs2@1D000000 {
+ sbs2@1d000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,sysb2", "simple-bus";
- reg = <0x1D000000 0x1000000>;
- ranges = <0x0 0x1D000000 0x1000000>;
+ reg = <0x1d000000 0x1000000>;
+ ranges = <0x0 0x1d000000 0x1000000>;
clock_sysgpe: clock-controller@700000 {
compatible = "lantiq,sysgpe-falcon";
clocks = <&clock_syseth 17>;
};
- clock_syseth: clock-controller@B00000 {
+ clock_syseth: clock-controller@b00000 {
compatible = "lantiq,syseth-falcon";
- reg = <0xB00000 0x100>;
+ reg = <0xb00000 0x100>;
#clock-cells = <1>;
};
- pad@B01000 {
+ pad@b01000 {
compatible = "lantiq,pad-falcon";
- reg = <0xB01000 0x100>;
+ reg = <0xb01000 0x100>;
lantiq,bank = <0>;
clocks = <&clock_syseth 20>;
};
- pad@B02000 {
+ pad@b02000 {
compatible = "lantiq,pad-falcon";
- reg = <0xB02000 0x100>;
+ reg = <0xb02000 0x100>;
lantiq,bank = <2>;
clocks = <&clock_syseth 21>;
};
};
- fpi@1E000000 {
+ fpi@1e000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,fpi", "simple-bus";
- reg = <0x1E000000 0x1000000>;
- ranges = <0x0 0x1E000000 0x1000000>;
+ reg = <0x1e000000 0x1000000>;
+ ranges = <0x0 0x1e000000 0x1000000>;
- serial1: serial@100B00 {
+ serial1: serial@100b00 {
status = "disabled";
compatible = "lantiq,asc";
- reg = <0x100B00 0x100>;
+ reg = <0x100b00 0x100>;
interrupt-parent = <&icu0>;
interrupts = <112 113 114>;
line = <1>;
clocks = <&clock_sys1 11>;
};
- serial0: serial@100C00 {
+ serial0: serial@100c00 {
compatible = "lantiq,asc";
- reg = <0x100C00 0x100>;
+ reg = <0x100c00 0x100>;
interrupt-parent = <&icu0>;
interrupts = <104 105 106>;
line = <0>;
clocks = <&clock_sys1 12>;
};
- spi: spi@100D00 {
+ spi: spi@100d00 {
status = "disabled";
compatible = "lantiq,falcon-spi", "lantiq,xrx100-spi", "lantiq,spi-lantiq-ssc";
interrupts = <22 23 24 25>;
interrupt-names = "spi_tx", "spi_rx", "spi_err", "spi_frm";
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x100D00 0x100>;
+ reg = <0x100d00 0x100>;
interrupt-parent = <&icu0>;
clocks = <&clock_sys1 13>;
base_cs = <1>;
num_cs = <2>;
};
- gptc@100E00 {
+ gptc@100e00 {
compatible = "lantiq,gptc-falcon";
- reg = <0x100E00 0x100>;
+ reg = <0x100e00 0x100>;
};
i2c: i2c@200000 {
reg = <0x802000 0x80>;
};
- clock_sys1: clock-controller@F00000 {
+ clock_sys1: clock-controller@f00000 {
compatible = "lantiq,sys1-falcon";
- reg = <0xF00000 0x100>;
+ reg = <0xf00000 0x100>;
#clock-cells = <1>;
};
};
- sbs0@1F000000 {
+ sbs0@1f000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
- reg = <0x1F000000 0x400000>;
- ranges = <0x0 0x1F000000 0x400000>;
+ reg = <0x1f000000 0x400000>;
+ ranges = <0x0 0x1f000000 0x400000>;
mpsmbx: mpsmbx@200000 {
reg = <0x200000 0x200>;
};
};
- sbs1@1F700000 {
+ sbs1@1f700000 {
};
- biu@1F800000 {
+ biu@1f800000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,biu", "simple-bus";
- reg = <0x1F800000 0x800000>;
- ranges = <0x0 0x1F800000 0x800000>;
+ reg = <0x1f800000 0x800000>;
+ ranges = <0x0 0x1f800000 0x800000>;
icu0: icu@80200 {
#interrupt-cells = <1>;
0x802a0 0x28>;
};
- watchdog@803F0 {
+ watchdog@803f0 {
compatible = "lantiq,wdt";
- reg = <0x803F0 0x10>;
+ reg = <0x803f0 0x10>;
clocks = <&io_clk>; /* currently no effect */
};
};