drm/radeon/kms: enable memory clock reading on legacy (V2)
authorRafał Miłecki <zajec5@gmail.com>
Thu, 17 Dec 2009 12:50:09 +0000 (13:50 +0100)
committerDave Airlie <airlied@redhat.com>
Wed, 23 Dec 2009 01:14:04 +0000 (11:14 +1000)
V2: detect IGP cards (which don't have own memory)

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/radeon_asic.h
drivers/gpu/drm/radeon/radeon_clocks.c
drivers/gpu/drm/radeon/radeon_device.c

index 636116bedcb49e554878c2cc8a51d496ae6b8764..eb29217bbf1d51d90f7060c1610e0342b65bb2d9 100644 (file)
@@ -33,6 +33,7 @@
  */
 uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev);
 void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
+uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev);
 void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
 
 uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev);
@@ -106,7 +107,7 @@ static struct radeon_asic r100_asic = {
        .copy = &r100_copy_blit,
        .get_engine_clock = &radeon_legacy_get_engine_clock,
        .set_engine_clock = &radeon_legacy_set_engine_clock,
-       .get_memory_clock = NULL,
+       .get_memory_clock = &radeon_legacy_get_memory_clock,
        .set_memory_clock = NULL,
        .set_pcie_lanes = NULL,
        .set_clock_gating = &radeon_legacy_set_clock_gating,
@@ -166,7 +167,7 @@ static struct radeon_asic r300_asic = {
        .copy = &r100_copy_blit,
        .get_engine_clock = &radeon_legacy_get_engine_clock,
        .set_engine_clock = &radeon_legacy_set_engine_clock,
-       .get_memory_clock = NULL,
+       .get_memory_clock = &radeon_legacy_get_memory_clock,
        .set_memory_clock = NULL,
        .set_pcie_lanes = &rv370_set_pcie_lanes,
        .set_clock_gating = &radeon_legacy_set_clock_gating,
@@ -259,7 +260,7 @@ static struct radeon_asic rs400_asic = {
        .copy = &r100_copy_blit,
        .get_engine_clock = &radeon_legacy_get_engine_clock,
        .set_engine_clock = &radeon_legacy_set_engine_clock,
-       .get_memory_clock = NULL,
+       .get_memory_clock = &radeon_legacy_get_memory_clock,
        .set_memory_clock = NULL,
        .set_pcie_lanes = NULL,
        .set_clock_gating = &radeon_legacy_set_clock_gating,
index b062109efbeea60b99b4a5b8a368df6b58d59691..812f24dbc2a8c58a0cfe566cc0fe81baaab382d8 100644 (file)
@@ -62,7 +62,7 @@ uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev)
 }
 
 /* 10 khz */
-static uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev)
+uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev)
 {
        struct radeon_pll *mpll = &rdev->clock.mpll;
        uint32_t fb_div, ref_div, post_div, mclk;
index 99b95ca42a71ae9071bfb6ec95de364be1695971..14df3ad64f949de72e9692aaf570bee9bd13db27 100644 (file)
@@ -391,6 +391,12 @@ int radeon_asic_init(struct radeon_device *rdev)
                /* FIXME: not supported yet */
                return -EINVAL;
        }
+
+       if (rdev->flags & RADEON_IS_IGP) {
+               rdev->asic->get_memory_clock = NULL;
+               rdev->asic->set_memory_clock = NULL;
+       }
+
        return 0;
 }