else
val = state->pdata->mode_config.sleep_mode << 0 |
state->pdata->mode_config.pll_control << 1 |
- state->pdata->mode_config.dac_3 << 2 |
- state->pdata->mode_config.dac_2 << 3 |
- state->pdata->mode_config.dac_1 << 4 |
- state->pdata->mode_config.dac_6 << 5 |
- state->pdata->mode_config.dac_5 << 6 |
- state->pdata->mode_config.dac_4 << 7;
+ state->pdata->mode_config.dac[2] << 2 |
+ state->pdata->mode_config.dac[1] << 3 |
+ state->pdata->mode_config.dac[0] << 4 |
+ state->pdata->mode_config.dac[5] << 5 |
+ state->pdata->mode_config.dac[4] << 6 |
+ state->pdata->mode_config.dac[3] << 7;
err = adv7343_write(sd, ADV7343_POWER_MODE_REG, val);
if (err < 0)
/* configure SD DAC Output 2 and SD DAC Output 1 bit to zero */
val = state->reg82 & (SD_DAC_1_DI & SD_DAC_2_DI);
- if (state->pdata && state->pdata->sd_config.sd_dac_out1)
- val = val | (state->pdata->sd_config.sd_dac_out1 << 1);
- else if (state->pdata && !state->pdata->sd_config.sd_dac_out1)
- val = val & ~(state->pdata->sd_config.sd_dac_out1 << 1);
+ if (state->pdata && state->pdata->sd_config.sd_dac_out[0])
+ val = val | (state->pdata->sd_config.sd_dac_out[0] << 1);
+ else if (state->pdata && !state->pdata->sd_config.sd_dac_out[0])
+ val = val & ~(state->pdata->sd_config.sd_dac_out[0] << 1);
- if (state->pdata && state->pdata->sd_config.sd_dac_out2)
- val = val | (state->pdata->sd_config.sd_dac_out2 << 2);
- else if (state->pdata && !state->pdata->sd_config.sd_dac_out2)
- val = val & ~(state->pdata->sd_config.sd_dac_out2 << 2);
+ if (state->pdata && state->pdata->sd_config.sd_dac_out[1])
+ val = val | (state->pdata->sd_config.sd_dac_out[1] << 2);
+ else if (state->pdata && !state->pdata->sd_config.sd_dac_out[1])
+ val = val & ~(state->pdata->sd_config.sd_dac_out[1] << 2);
err = adv7343_write(sd, ADV7343_SD_MODE_REG2, val);
if (err < 0)
* @pll_control: PLL and oversampling control. This control allows internal
* PLL 1 circuit to be powered down and the oversampling to be
* switched off.
- * @dac_1: power on/off DAC 1.
- * @dac_2: power on/off DAC 2.
- * @dac_3: power on/off DAC 3.
- * @dac_4: power on/off DAC 4.
- * @dac_5: power on/off DAC 5.
- * @dac_6: power on/off DAC 6.
+ * @dac: array to configure power on/off DAC's 1..6
*
* Power mode register (Register 0x0), for more info refer REGISTER MAP ACCESS
* section of datasheet[1], table 17 page no 30.
struct adv7343_power_mode {
bool sleep_mode;
bool pll_control;
- bool dac_1;
- bool dac_2;
- bool dac_3;
- bool dac_4;
- bool dac_5;
- bool dac_6;
+ u32 dac[6];
};
/**
* struct adv7343_sd_config - SD Only Output Configuration.
- * @sd_dac_out1: Configure SD DAC Output 1.
- * @sd_dac_out2: Configure SD DAC Output 2.
+ * @sd_dac_out: array configuring SD DAC Outputs 1 and 2
*/
struct adv7343_sd_config {
/* SD only Output Configuration */
- bool sd_dac_out1;
- bool sd_dac_out2;
+ u32 sd_dac_out[2];
};
/**