powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()
authorKumar Gala <galak@kernel.crashing.org>
Tue, 1 Feb 2011 02:36:02 +0000 (20:36 -0600)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 4 Apr 2011 14:24:40 +0000 (09:24 -0500)
Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq()
and every 86xx board uses get_bus_freq().  If implement get_ddr_freq()
as a static inline to call get_bus_freq() we can remove
fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq()
directly.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
29 files changed:
arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
arch/powerpc/cpu/mpc8xxx/ddr/util.c
board/freescale/corenet_ds/ddr.c
board/freescale/mpc8536ds/ddr.c
board/freescale/mpc8540ads/ddr.c
board/freescale/mpc8541cds/ddr.c
board/freescale/mpc8544ds/ddr.c
board/freescale/mpc8548cds/ddr.c
board/freescale/mpc8555cds/ddr.c
board/freescale/mpc8560ads/ddr.c
board/freescale/mpc8568mds/ddr.c
board/freescale/mpc8569mds/ddr.c
board/freescale/mpc8572ds/ddr.c
board/freescale/mpc8610hpcd/ddr.c
board/freescale/mpc8641hpcn/ddr.c
board/freescale/p1022ds/ddr.c
board/freescale/p2020ds/ddr.c
board/sbc8548/ddr.c
board/sbc8560/ddr.c
board/sbc8641d/ddr.c
board/socrates/ddr.c
board/stx/stxgp3/ddr.c
board/stx/stxssa/ddr.c
board/xes/xpedite517x/ddr.c
board/xes/xpedite520x/ddr.c
board/xes/xpedite537x/ddr.c
board/xes/xpedite550x/ddr.c
include/common.h

index cefabe769fb3b51afc2bcdea591159f44b32452b..ee7ef0f214163e701881c30d65ec91a5716df152 100644 (file)
@@ -236,7 +236,7 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr,
         * tAXPD=1, need design to confirm.
         */
        int tXP = max((get_memory_clk_period_ps() * 3), 7500); /* unit=ps */
-       unsigned int data_rate = fsl_ddr_get_mem_data_rate();
+       unsigned int data_rate = get_ddr_freq(0);
        tmrd_mclk = 4;
        /* set the turnaround time */
        trwt_mclk = 1;
index c7c12c1c2f63c8d04e3732151cb144e9f7f180e6..1e866fe03530268a8998d570e60905698576df4a 100644 (file)
@@ -80,5 +80,4 @@ extern void check_interleaving_options(fsl_ddr_info_t *pinfo);
 extern unsigned int mclk_to_picos(unsigned int mclk);
 extern unsigned int get_memory_clk_period_ps(void);
 extern unsigned int picos_to_mclk(unsigned int picos);
-extern unsigned int fsl_ddr_get_mem_data_rate(void);
 #endif
index 1e2d921286e98050b90add2dca8bff8b3f288c0a..815c5e3a9ef8bbb613c7fdcd2ff16363bfbf0731 100644 (file)
@@ -11,8 +11,6 @@
 
 #include "ddr.h"
 
-unsigned int fsl_ddr_get_mem_data_rate(void);
-
 /*
  * Round mclk_ps to nearest 10 ps in memory controller code.
  *
@@ -24,7 +22,7 @@ unsigned int get_memory_clk_period_ps(void)
 {
        unsigned int mclk_ps;
 
-       mclk_ps = 2000000000000ULL / fsl_ddr_get_mem_data_rate();
+       mclk_ps = 2000000000000ULL / get_ddr_freq(0);
        /* round to nearest 10 ps */
        return 10 * ((mclk_ps + 5) / 10);
 }
@@ -40,7 +38,7 @@ unsigned int picos_to_mclk(unsigned int picos)
        if (!picos)
                return 0;
 
-       clks = fsl_ddr_get_mem_data_rate() * (unsigned long long) picos;
+       clks = get_ddr_freq(0) * (unsigned long long) picos;
        clks_temp = clks;
        clks = clks / ULL_2e12;
        if (clks_temp % ULL_2e12) {
index ee08abb29f7da8c9c69de8d65b809b4a075ae682..d83b9bfb6c8170543a9a052244353d672a6e1a86 100644 (file)
@@ -118,11 +118,6 @@ static void get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address)
        }
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index 2bad787d60685dc1a8b27125632060e5267c26e0..565e2132ae7b786a2436982f0e00166d8eb8f27c 100644 (file)
@@ -17,11 +17,6 @@ static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index 93d1100717f8fe5216574c9ccfca3bd05074a993..64a3ee15baab255b7995a0ef6cf167433373aa82 100644 (file)
@@ -18,14 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
 }
 
-
-unsigned int
-fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
-
 void
 fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
index c84a6cbe1c7715fcfd1b7ec11aecef5a32339da7..ce08af112df9acdf083c8caaaf801e62f782f5ce 100644 (file)
@@ -18,11 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index b8330eb961de4d03e2edf39d2219699656633de2..87f0a22bbe0327af1692f0471ca21378082c329d 100644 (file)
@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index ab64fa88f2655916348963351f08d0e277fbc3f1..bc6e71abc7706f635d14ab37d2fef2d6e39380b0 100644 (file)
@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                        unsigned int ctrl_num)
 {
index c84a6cbe1c7715fcfd1b7ec11aecef5a32339da7..ce08af112df9acdf083c8caaaf801e62f782f5ce 100644 (file)
@@ -18,11 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index 93d1100717f8fe5216574c9ccfca3bd05074a993..64a3ee15baab255b7995a0ef6cf167433373aa82 100644 (file)
@@ -18,14 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
 }
 
-
-unsigned int
-fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
-
 void
 fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
index 482fd919f5428ad60cdbfb19dda4c57402d1e3ee..9a4c5c9ad392b9f38c2718b7851582010d9970f7 100644 (file)
@@ -18,12 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
 }
 
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index e3f5b4aa21dae5ee9d2e6439d41b2f867af9eceb..bedbedd4926c9f635c28c6b79127b4834c0ca559 100644 (file)
@@ -18,12 +18,6 @@ get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t));
 }
 
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index cdde6ec70fc90c9d5b83967f5fb7d51c7ef2b8e7..52c7d734bfc311aeab0ec96c43998efa15b572f3 100644 (file)
@@ -17,11 +17,6 @@ static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index 0117d136bbbbaaa984aa38f00ebd79511a1323c8..5523c0e13b68eb9a5cfbefc4da0fc9a36ddb1db2 100644 (file)
@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_bus_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index 8dc249b99dc89180a76ea891ed7d3e7c13b41273..07bb92f769d94f103ec0293796317ba593662209 100644 (file)
@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_bus_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
@@ -144,7 +139,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
        /* Get clk_adjust, cpo, write_data_delay, according to the board ddr
         * freqency and n_banks specified in board_specific_parameters table.
         */
-       ddr_freq = fsl_ddr_get_mem_data_rate() / 1000000;
+       ddr_freq = get_ddr_freq(0) / 1000000;
        for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
                if (pdimm[j].n_ranks > 0) {
                        for (i = 0; i < num_params; i++) {
index 7ecfb3e81b5046f3796cb89c90e1dcbce3d2418c..80c1d63200e6bad3c45b48451314944b0de0c0a1 100644 (file)
 #include <asm/fsl_ddr_sdram.h>
 #include <asm/fsl_ddr_dimm_params.h>
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd, unsigned int ctrl_num)
 {
        int ret;
index 9a1b07554feeffcb7961eece77e3dbc3ab88f99c..b52582f6f63a746421d8fe2e6e80fd0039478707 100644 (file)
@@ -17,11 +17,6 @@ static void get_spd(generic_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index ab64fa88f2655916348963351f08d0e277fbc3f1..bc6e71abc7706f635d14ab37d2fef2d6e39380b0 100644 (file)
@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                        unsigned int ctrl_num)
 {
index 7850794d64ff0f6339bc07c3bd4097e73421f73e..f7e956afb44ce3d08cb941b38dd4be884b45e866 100644 (file)
@@ -18,14 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
 }
 
-
-unsigned int
-fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
-
 void
 fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
index 23497f982587748d872b8b6ce2da4c7c69b67756..bed94bf3189e4216a65d19c159c3202e731dca8b 100644 (file)
@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_bus_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index 2b62b847054accf192d5fa77513cf3e9c70e98ec..455832618b83cbf1971af26c7cffc1ebc1d91323 100644 (file)
@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index 93d1100717f8fe5216574c9ccfca3bd05074a993..64a3ee15baab255b7995a0ef6cf167433373aa82 100644 (file)
@@ -18,14 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
 }
 
-
-unsigned int
-fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
-
 void
 fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
index 93d1100717f8fe5216574c9ccfca3bd05074a993..64a3ee15baab255b7995a0ef6cf167433373aa82 100644 (file)
@@ -18,14 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
        i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
 }
 
-
-unsigned int
-fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
-
 void
 fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
index 1d57d0909a6caf1b9fc4c680f2b75f1ab06e70b5..981bf41e0960291388d18fa1e8552672fc80f273 100644 (file)
@@ -32,11 +32,6 @@ static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
                sizeof(ddr2_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_bus_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                        unsigned int ctrl_num)
 {
@@ -144,7 +139,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
        unsigned int datarate;
 
        get_sys_info(&sysinfo);
-       datarate = fsl_ddr_get_mem_data_rate() / 1000000;
+       datarate = get_ddr_freq(0) / 1000000;
 
        for (i = 0; i < ARRAY_SIZE(bopts_ctrl[ctrl_num]); i++) {
                if ((bopts[i].datarate_mhz_low <= datarate) &&
index c5616d546b8261af8ce7e9b4f565da28aad6d8e4..f8d945ace3feea63f1fa6606f9b3cc01250e675b 100644 (file)
@@ -27,11 +27,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
        }
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                        unsigned int ctrl_num)
 {
index 4d3f255d70520d6e7d12dd93125270befd58140e..307f875db9bbc46854d5df53f4ed3e66e468359c 100644 (file)
@@ -33,11 +33,6 @@ static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
                 sizeof(ddr2_spd_eeprom_t));
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
                      unsigned int ctrl_num)
 {
index 38a459715fda4aa6642316aa7cbb6a05a7d85593..9e6964960c3e0d596207f4fae93ea65460d022b2 100644 (file)
@@ -46,11 +46,6 @@ void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
-       return get_ddr_freq(0);
-}
-
 /*
  *     There are traditionally three board-specific SDRAM timing parameters
  *     which must be calculated based on the particular PCB artwork.  These are:
index 893af5cc10eaf011466901a754c1440262dfe29b..54503ed3ebafe3402c02a751727c0dc5508283b7 100644 (file)
@@ -538,6 +538,10 @@ ulong      get_ddr_freq  (ulong);
 #if defined(CONFIG_MPC86xx)
 typedef MPC86xx_SYS_INFO sys_info_t;
 void   get_sys_info  ( sys_info_t * );
+static inline ulong get_ddr_freq(ulong dummy)
+{
+       return get_bus_freq(dummy);
+}
 #endif
 
 #if defined(CONFIG_4xx) || defined(CONFIG_IOP480)