drm/amdgpu: Bypass GMC/UVD/VCE hw_fini in SR-IOV
authorTrigger Huang <trigger.huang@amd.com>
Wed, 26 Apr 2017 06:29:47 +0000 (02:29 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 May 2017 21:40:20 +0000 (17:40 -0400)
On vega10, some hw finish operations should not be applied in SR-IOV
case. This works as workaround to fix multi-VFs reboot/shutdown
issues.

Signed-off-by: Trigger Huang <trigger.huang@amd.com>
Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

index f936332a069d2d1c9329a3d52a17f9e44776f659..ae8fd91649c4e01c3c8d63ca437d061e00566f5f 100644 (file)
@@ -781,6 +781,12 @@ static int gmc_v9_0_hw_fini(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+       if (amdgpu_sriov_vf(adev)) {
+               /* full access mode, so don't touch any GMC register */
+               DRM_DEBUG("For SRIOV client, shouldn't do anything.\n");
+               return 0;
+       }
+
        amdgpu_irq_put(adev, &adev->mc.vm_fault, 0);
        gmc_v9_0_gart_disable(adev);
 
index eca8f6e01e97dbf871de603500a7037315711f31..e3cf8e49d3364ca2871243928bea69242da4305f 100644 (file)
@@ -562,7 +562,13 @@ static int uvd_v7_0_hw_fini(void *handle)
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
        struct amdgpu_ring *ring = &adev->uvd.ring;
 
-       uvd_v7_0_stop(adev);
+       if (!amdgpu_sriov_vf(adev))
+               uvd_v7_0_stop(adev);
+       else {
+               /* full access mode, so don't touch any UVD register */
+               DRM_DEBUG("For SRIOV client, shouldn't do anything.\n");
+       }
+
        ring->ready = false;
 
        return 0;
index 139f964196b42ba65f6e5e8c0b51fa1c2e9ae37c..a7af08a353424eba90f170a815b5012189d5187e 100644 (file)
@@ -505,8 +505,14 @@ static int vce_v4_0_hw_fini(void *handle)
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
        int i;
 
-       /* vce_v4_0_wait_for_idle(handle); */
-       vce_v4_0_stop(adev);
+       if (!amdgpu_sriov_vf(adev)) {
+               /* vce_v4_0_wait_for_idle(handle); */
+               vce_v4_0_stop(adev);
+       } else {
+               /* full access mode, so don't touch any VCE register */
+               DRM_DEBUG("For SRIOV client, shouldn't do anything.\n");
+       }
+
        for (i = 0; i < adev->vce.num_rings; i++)
                adev->vce.ring[i].ready = false;