Tegra186: mce: support for TEGRA_ARI_MISC_CCPLEX_EDBGREQ

This ARI call enables the EDBGREQ feature in the CCPLEX,
which will cause the CPUs to enter debug state instead of
vectoring to sw (ie MCA handler) upon receiving an async
abort signal.

Change-Id: Ifcb0e11446b6ac55179e3350d8f02b60ba32c94d
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

diff --git a/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c b/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
index 95b8c7b040137b1908bcd10e0dcfa2a5a51eca48..7f711a7265dfdb0942aab91d2d024e3660ace7e1 100644 (file)
--- a/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
+++ b/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
@@ -483,7 +483,7 @@ void ari_misc_ccplex(uint32_t ari_base, uint32_t index, uint32_t value)
         * used to enable/disable coresight clock gating.
         */
 
-       if ((index > TEGRA_ARI_MISC_CCPLEX_CORESIGHT_CG_CTRL) ||
+       if ((index > TEGRA_ARI_MISC_CCPLEX_EDBGREQ) ||
                ((index == TEGRA_ARI_MISC_CCPLEX_CORESIGHT_CG_CTRL) &&
                (value > 1))) {
                ERROR("%s: invalid parameters \n", __func__);