--- /dev/null
+From 2c5aad0f9990724cce48e0a53b66bc0438e4603d Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66@outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 1/4] rt2x00: always calibrate MT7620 when switching channel
+
+Perform calibration work after each channel switching operation.
+This should help improve the rx/tx signal strength for MT7620.
+
+Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
+---
+ .../net/wireless/ralink/rt2x00/rt2800lib.c | 24 ++++++++++++++-----
+ 1 file changed, 18 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -5704,6 +5704,9 @@ static void rt2800_config_ps(struct rt2x
+ }
+ }
+
++static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev);
++static void rt2800_calibration_rt6352_stage2(struct rt2x00_dev *rt2x00dev);
++
+ void rt2800_config(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00lib_conf *libconf,
+ const unsigned int flags)
+@@ -5718,10 +5721,18 @@ void rt2800_config(struct rt2x00_dev *rt
+ */
+ rt2800_update_survey(rt2x00dev);
+
++ if (rt2x00_rt(rt2x00dev, RT6352) &&
++ !test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
++ rt2800_calibration_rt6352_stage1(rt2x00dev);
++
+ rt2800_config_channel(rt2x00dev, libconf->conf,
+ &libconf->rf, &libconf->channel);
+ rt2800_config_txpower(rt2x00dev, libconf->conf->chandef.chan,
+ libconf->conf->power_level);
++
++ if (rt2x00_rt(rt2x00dev, RT6352) &&
++ !test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
++ rt2800_calibration_rt6352_stage2(rt2x00dev);
+ }
+ if (flags & IEEE80211_CONF_CHANGE_POWER)
+ rt2800_config_txpower(rt2x00dev, libconf->conf->chandef.chan,
+@@ -10427,15 +10438,19 @@ static void rt2800_restore_rf_bbp_rt6352
+ }
+ }
+
+-static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev)
++static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev)
+ {
+- u32 reg;
+-
+ if (rt2x00_has_cap_external_pa(rt2x00dev) ||
+ rt2x00_has_cap_external_lna_bg(rt2x00dev))
+ rt2800_restore_rf_bbp_rt6352(rt2x00dev);
+
+ rt2800_r_calibration(rt2x00dev);
++}
++
++static void rt2800_calibration_rt6352_stage2(struct rt2x00_dev *rt2x00dev)
++{
++ u32 reg;
++
+ rt2800_rf_self_txdc_cal(rt2x00dev);
+ rt2800_rxdcoc_calibration(rt2x00dev);
+ rt2800_bw_filter_calibration(rt2x00dev, true);
+@@ -10766,9 +10781,6 @@ static void rt2800_init_rfcsr_6352(struc
+
+ rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+-
+- /* Do calibration and init PA/LNA */
+- rt2800_calibration_rt6352(rt2x00dev);
+ }
+
+ static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
--- /dev/null
+From aaa57924324c1ee77afa5e3effc95cc86158ddcc Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66@outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 2/4] rt2x00: rework link tuner for MT7620
+
+Correct the VGC gain value for MT7620 and only do gain calibration
+for supported devices.
+
+Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
+---
+ drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -5561,6 +5561,9 @@ static void rt2800_config_txpower(struct
+
+ void rt2800_gain_calibration(struct rt2x00_dev *rt2x00dev)
+ {
++ if (rt2x00_rt(rt2x00dev, RT6352))
++ return;
++
+ rt2800_config_txpower(rt2x00dev, rt2x00dev->hw->conf.chandef.chan,
+ rt2x00dev->tx_power);
+ }
+@@ -5773,9 +5776,10 @@ static u8 rt2800_get_default_vgc(struct
+ rt2x00_rt(rt2x00dev, RT3593) ||
+ rt2x00_rt(rt2x00dev, RT5390) ||
+ rt2x00_rt(rt2x00dev, RT5392) ||
+- rt2x00_rt(rt2x00dev, RT5592) ||
+- rt2x00_rt(rt2x00dev, RT6352))
++ rt2x00_rt(rt2x00dev, RT5592))
+ vgc = 0x1c + (2 * rt2x00dev->lna_gain);
++ else if(rt2x00_rt(rt2x00dev, RT6352))
++ vgc = 0x04 + (2 * rt2x00dev->lna_gain);
+ else
+ vgc = 0x2e + rt2x00dev->lna_gain;
+ } else { /* 5GHZ band */
+@@ -5828,7 +5832,8 @@ void rt2800_link_tuner(struct rt2x00_dev
+ {
+ u8 vgc;
+
+- if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C))
++ if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C) ||
++ rt2x00_rt(rt2x00dev, RT6352))
+ return;
+
+ /* When RSSI is better than a certain threshold, increase VGC
--- /dev/null
+From b672507ca9f06bb17213036b16bc4f5c5bc65357 Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66@outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 3/4] rt2x00: correct MT7620 SDM mode register value
+
+rt2x00_set_field8() is a mask writing function. If we want to set
+the BIT(7) for the SDM mode register here, we only need to fill "4"
+in the mask.
+
+Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
+---
+ drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -3848,7 +3848,7 @@ static void rt2800_config_channel_rf7620
+
+ /* Default: XO=20MHz , SDM mode */
+ rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
+- rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
++ rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 4);
+ rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
+
+ rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
--- /dev/null
+From 2585ada646e4dcf152ab813a24d667e6903105f4 Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66@outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 4/4] rt2x00: fix register operation on RXIQ calibration
+
+In rt2800_rxiq_calibration(), some variables are overwritten
+before being used. Based on the values of the relevant registers
+in other functions, I believe the correct operation should be
+bit mask writing.
+
+Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
+---
+ drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -8846,7 +8846,7 @@ static void rt2800_rxiq_calibration(stru
+ rt2x00_warn(rt2x00dev, "Timeout waiting for MAC status in RXIQ calibration\n");
+
+ bbpval = bbp4 & (~0x18);
+- bbpval = bbp4 | 0x00;
++ bbpval = bbpval | 0x00;
+ rt2800_bbp_write(rt2x00dev, 4, bbpval);
+
+ bbpval = rt2800_bbp_read(rt2x00dev, 21);
+@@ -8928,13 +8928,13 @@ static void rt2800_rxiq_calibration(stru
+ for (ch_idx = 0; ch_idx < 2; ch_idx = ch_idx + 1) {
+ if (ch_idx == 0) {
+ rfval = rfb0r1 & (~0x3);
+- rfval = rfb0r1 | 0x1;
++ rfval = rfval | 0x1;
+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfval);
+ rfval = rfb0r2 & (~0x33);
+- rfval = rfb0r2 | 0x11;
++ rfval = rfval | 0x11;
+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfval);
+ rfval = rfb0r42 & (~0x50);
+- rfval = rfb0r42 | 0x10;
++ rfval = rfval | 0x10;
+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfval);
+
+ rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00001006);
+@@ -8947,13 +8947,13 @@ static void rt2800_rxiq_calibration(stru
+ rt2800_bbp_dcoc_write(rt2x00dev, 1, 0x00);
+ } else {
+ rfval = rfb0r1 & (~0x3);
+- rfval = rfb0r1 | 0x2;
++ rfval = rfval | 0x2;
+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfval);
+ rfval = rfb0r2 & (~0x33);
+- rfval = rfb0r2 | 0x22;
++ rfval = rfval | 0x22;
+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfval);
+ rfval = rfb0r42 & (~0x50);
+- rfval = rfb0r42 | 0x40;
++ rfval = rfval | 0x40;
+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfval);
+
+ rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00002006);
static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
[EEPROM_CHIP_ID] = 0x0000,
[EEPROM_VERSION] = 0x0001,
-@@ -10432,8 +10450,10 @@ static void rt2800_calibration_rt6352(st
- u32 reg;
-
+@@ -10446,8 +10464,10 @@ static void rt2800_restore_rf_bbp_rt6352
+ static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev)
+ {
if (rt2x00_has_cap_external_pa(rt2x00dev) ||
- rt2x00_has_cap_external_lna_bg(rt2x00dev))
+ rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ }
rt2800_r_calibration(rt2x00dev);
- rt2800_rf_self_txdc_cal(rt2x00dev);
-@@ -10451,6 +10471,8 @@ static void rt2800_calibration_rt6352(st
+ }
+@@ -10471,6 +10491,8 @@ static void rt2800_calibration_rt6352_st
!rt2x00_has_cap_external_lna_bg(rt2x00dev))
return;
- /* Default: XO=20MHz , SDM mode */
- rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
-- rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
+- rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 4);
- rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
-
- rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
+ if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
+ /* Default: XO=20MHz , SDM mode */
+ rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
-+ rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
++ rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 4);
+ rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
+
+ rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
0x15 : 0x1a;
rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
-@@ -6045,18 +6057,33 @@ static int rt2800_init_registers(struct
+@@ -6061,18 +6073,34 @@ static int rt2800_init_registers(struct
} else if (rt2x00_rt(rt2x00dev, RT5350)) {
rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
} else if (rt2x00_rt(rt2x00dev, RT6352)) {
+ rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
+ rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001);
+ rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
-+ rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000);
++ rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0x00150f0f);
++ rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x06060606);
+ rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);
+ rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0);
+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
rt2x00_set_field32(®, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
-@@ -7169,14 +7196,16 @@ static void rt2800_init_bbp_6352(struct
+@@ -7185,14 +7213,16 @@ static void rt2800_init_bbp_6352(struct
rt2800_bbp_write(rt2x00dev, 188, 0x00);
rt2800_bbp_write(rt2x00dev, 189, 0x00);
/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
-@@ -10406,6 +10435,9 @@ static void rt2800_restore_rf_bbp_rt6352
+@@ -10422,6 +10452,9 @@ static void rt2800_restore_rf_bbp_rt6352
rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
}
if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
-@@ -10483,6 +10515,9 @@ static void rt2800_calibration_rt6352(st
+@@ -10503,6 +10536,9 @@ static void rt2800_calibration_rt6352_st
rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
}
if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
-@@ -10573,31 +10608,36 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10593,31 +10629,36 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
/* Initialize RF channel register to default value */
rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
-@@ -10663,63 +10703,71 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10683,63 +10724,71 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
/* Initialize RF DC calibration register to default value */
rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
-@@ -10782,12 +10830,17 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10802,12 +10851,17 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+ }
+ }
- /* Do calibration and init PA/LNA */
- rt2800_calibration_rt6352(rt2x00dev);
+ static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
projects / openwrt / staging / blocktrron.git / commitdiff