drm/amd/display: Add Dynamic debug prints

Created Macros for DC_LOG_XXX to pr_debug() & DRM_DEBUG_KMS.

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index a6039e5b664d65f4c7584bbcc78c08a6d092bfd7..2514d7b3b66e13e0800c0ef13354eda34c7b6b86 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -433,11 +433,6 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
 
        init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
 
-       if (amdgpu_dc_log)
-               init_data.log_mask = DC_DEFAULT_LOG_MASK;
-       else
-               init_data.log_mask = DC_MIN_LOG_MASK;
-
        /*
         * TODO debug why this doesn't work on Raven
         */

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
index 71cc60fcff5eb684b9b6bf1d3c9cadc88b7f1af3..a3c87611220d9814209c5a33f06d09664b620751 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
@@ -36,8 +36,9 @@
 #include "hw_sequencer.h"
 
 #include "resource.h"
-#define DC_LOGGER \
-       logger
+
+#define DC_LOGGER_INIT(logger)
+
 
 #define SURFACE_TRACE(...) do {\
                if (dc->debug.surface_trace) \
@@ -60,8 +61,7 @@ void pre_surface_trace(
                int surface_count)
 {
        int i;
-       struct dc  *core_dc = dc;
-       struct dal_logger *logger =  core_dc->ctx->logger;
+       DC_LOGGER_INIT(dc->ctx->logger);
 
        for (i = 0; i < surface_count; i++) {
                const struct dc_plane_state *plane_state = plane_states[i];
@@ -183,8 +183,7 @@ void update_surface_trace(
                int surface_count)
 {
        int i;
-       struct dc  *core_dc = dc;
-       struct dal_logger *logger =  core_dc->ctx->logger;
+       DC_LOGGER_INIT(dc->ctx->logger);
 
        for (i = 0; i < surface_count; i++) {
                const struct dc_surface_update *update = &updates[i];
@@ -304,8 +303,7 @@ void update_surface_trace(
 
 void post_surface_trace(struct dc *dc)
 {
-       struct dc  *core_dc = dc;
-       struct dal_logger *logger =  core_dc->ctx->logger;
+       DC_LOGGER_INIT(dc->ctx->logger);
 
        SURFACE_TRACE("post surface process.\n");
 
@@ -317,10 +315,10 @@ void context_timing_trace(
 {
        int i;
        struct dc  *core_dc = dc;
-       struct dal_logger *logger =  core_dc->ctx->logger;
        int h_pos[MAX_PIPES], v_pos[MAX_PIPES];
        struct crtc_position position;
        unsigned int underlay_idx = core_dc->res_pool->underlay_pipe_index;
+       DC_LOGGER_INIT(dc->ctx->logger);
 
 
        for (i = 0; i < core_dc->res_pool->pipe_count; i++) {
@@ -355,9 +353,7 @@ void context_clock_trace(
                struct dc_state *context)
 {
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
-       struct dc  *core_dc = dc;
-       struct dal_logger *logger =  core_dc->ctx->logger;
-
+       DC_LOGGER_INIT(dc->ctx->logger);
        CLOCK_TRACE("Current: dispclk_khz:%d  max_dppclk_khz:%d  dcfclk_khz:%d\n"
                        "dcfclk_deep_sleep_khz:%d  fclk_khz:%d  socclk_khz:%d\n",
                        context->bw.dcn.calc_clk.dispclk_khz,

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index e612841f7f91520b697ba3cfa450ca37fb71d529..d9efdd926145269b816bc355cb2e6178fb3da124 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -45,8 +45,9 @@
 #include "dce/dce_11_0_d.h"
 #include "dce/dce_11_0_enum.h"
 #include "dce/dce_11_0_sh_mask.h"
-#define DC_LOGGER \
-       dc_ctx->logger
+
+#define DC_LOGGER_INIT(logger)
+
 
 #define LINK_INFO(...) \
        DC_LOG_HW_HOTPLUG(  \
@@ -561,7 +562,7 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason)
        struct dc_context *dc_ctx = link->ctx;
        struct dc_sink *sink = NULL;
        enum dc_connection_type new_connection_type = dc_connection_none;
-
+       DC_LOGGER_INIT(link->ctx->logger);
        if (link->connector_signal == SIGNAL_TYPE_VIRTUAL)
                return false;
 
@@ -927,6 +928,7 @@ static bool construct(
        struct integrated_info info = {{{ 0 }}};
        struct dc_bios *bios = init_params->dc->ctx->dc_bios;
        const struct dc_vbios_funcs *bp_funcs = bios->funcs;
+       DC_LOGGER_INIT(dc_ctx->logger);
 
        link->irq_source_hpd = DC_IRQ_SOURCE_INVALID;
        link->irq_source_hpd_rx = DC_IRQ_SOURCE_INVALID;
@@ -1135,7 +1137,8 @@ static void dpcd_configure_panel_mode(
 {
        union dpcd_edp_config edp_config_set;
        bool panel_mode_edp = false;
-       struct dc_context *dc_ctx = link->ctx;
+       DC_LOGGER_INIT(link->ctx->logger);
+
        memset(&edp_config_set, '\0', sizeof(union dpcd_edp_config));
 
        if (DP_PANEL_MODE_DEFAULT != panel_mode) {
@@ -1968,10 +1971,10 @@ bool dc_link_set_backlight_level(const struct dc_link *link, uint32_t level,
        struct dc  *core_dc = link->ctx->dc;
        struct abm *abm = core_dc->res_pool->abm;
        struct dmcu *dmcu = core_dc->res_pool->dmcu;
-       struct dc_context *dc_ctx = link->ctx;
        unsigned int controller_id = 0;
        bool use_smooth_brightness = true;
        int i;
+       DC_LOGGER_INIT(link->ctx->logger);
 
        if ((dmcu == NULL) ||
                (abm == NULL) ||
@@ -2154,8 +2157,8 @@ static enum dc_status allocate_mst_payload(struct pipe_ctx *pipe_ctx)
        struct fixed31_32 avg_time_slots_per_mtp;
        struct fixed31_32 pbn;
        struct fixed31_32 pbn_per_slot;
-       struct dc_context *dc_ctx = link->ctx;
        uint8_t i;
+       DC_LOGGER_INIT(link->ctx->logger);
 
        /* enable_link_dp_mst already check link->enabled_stream_count
         * and stream is in link->stream[]. This is called during set mode,
@@ -2234,7 +2237,7 @@ static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx)
        struct fixed31_32 avg_time_slots_per_mtp = dal_fixed31_32_from_int(0);
        uint8_t i;
        bool mst_mode = (link->type == dc_connection_mst_branch);
-       struct dc_context *dc_ctx = link->ctx;
+       DC_LOGGER_INIT(link->ctx->logger);
 
        /* deallocate_mst_payload is called before disable link. When mode or
         * disable/enable monitor, new stream is created which is not in link
@@ -2307,8 +2310,8 @@ void core_link_enable_stream(
                struct pipe_ctx *pipe_ctx)
 {
        struct dc  *core_dc = pipe_ctx->stream->ctx->dc;
-       struct dc_context *dc_ctx = pipe_ctx->stream->ctx;
        enum dc_status status;
+       DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);
 
        /* eDP lit up by bios already, no need to enable again. */
        if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP &&

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 379b05536321e9bd1c1f2018552ba5010d1f514d..50b84f69bd25b9f637eb6052b3b8e5bbbed5513e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -45,8 +45,9 @@
 #include "dcn10/dcn10_resource.h"
 #endif
 #include "dce120/dce120_resource.h"
-#define DC_LOGGER \
-       ctx->logger
+
+#define DC_LOGGER_INIT(logger)
+
 enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
 {
        enum dce_version dc_version = DCE_VERSION_UNKNOWN;
@@ -835,7 +836,7 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
        struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;
        struct view recout_skip = { 0 };
        bool res = false;
-       struct dc_context *ctx = pipe_ctx->stream->ctx;
+       DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);
        /* Important: scaling ratio calculation requires pixel format,
         * lb depth calculation requires recout and taps require scaling ratios.
         * Inits require viewport, taps, ratios and recout of split pipe

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c b/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
index 6d5cdcdc8ec9d77b5270342a1ab7a6ac5675b74a..7f6d724686f1adc7255c244568d140565b3a8fd3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
@@ -33,8 +33,9 @@
 
 #define CTX \
        aud->base.ctx
-#define DC_LOGGER \
-       aud->base.ctx->logger
+
+#define DC_LOGGER_INIT()
+
 #define REG(reg)\
        (aud->regs->reg)
 
@@ -348,8 +349,8 @@ static void set_audio_latency(
 
 void dce_aud_az_enable(struct audio *audio)
 {
-       struct dce_audio *aud = DCE_AUD(audio);
        uint32_t value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL);
+       DC_LOGGER_INIT();
 
        set_reg_field_value(value, 1,
                            AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL,
@@ -371,7 +372,7 @@ void dce_aud_az_enable(struct audio *audio)
 void dce_aud_az_disable(struct audio *audio)
 {
        uint32_t value;
-       struct dce_audio *aud = DCE_AUD(audio);
+       DC_LOGGER_INIT();
 
        value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL);
        set_reg_field_value(value, 1,

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index 0aa2cda6089093108935a87acda8185a1664b135..67dad7f1e64392609fcc139e69e6e4cdcaa167d0 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
@@ -41,8 +41,9 @@
 
 #define CTX \
        clk_src->base.ctx
-#define DC_LOGGER \
-       calc_pll_cs->ctx->logger
+
+#define DC_LOGGER_INIT()
+
 #undef FN
 #define FN(reg_name, field_name) \
        clk_src->cs_shift->field_name, clk_src->cs_mask->field_name
@@ -467,7 +468,7 @@ static uint32_t dce110_get_pix_clk_dividers_helper (
 {
        uint32_t field = 0;
        uint32_t pll_calc_error = MAX_PLL_CALC_ERROR;
-       struct calc_pll_clock_source *calc_pll_cs = &clk_src->calc_pll;
+       DC_LOGGER_INIT();
        /* Check if reference clock is external (not pcie/xtalin)
        * HW Dce80 spec:
        * 00 - PCIE_REFCLK, 01 - XTALIN,    02 - GENERICA,    03 - GENERICB
@@ -557,8 +558,8 @@ static uint32_t dce110_get_pix_clk_dividers(
                struct pll_settings *pll_settings)
 {
        struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(cs);
-       struct calc_pll_clock_source *calc_pll_cs = &clk_src->calc_pll;
        uint32_t pll_calc_error = MAX_PLL_CALC_ERROR;
+       DC_LOGGER_INIT();
 
        if (pix_clk_params == NULL || pll_settings == NULL
                        || pix_clk_params->requested_pix_clk == 0) {
@@ -1054,7 +1055,7 @@ static void get_ss_info_from_atombios(
        struct spread_spectrum_info *ss_info_cur;
        struct spread_spectrum_data *ss_data_cur;
        uint32_t i;
-       struct calc_pll_clock_source *calc_pll_cs = &clk_src->calc_pll;
+       DC_LOGGER_INIT();
        if (ss_entries_num == NULL) {
                DC_LOG_SYNC(
                        "Invalid entry !!!\n");

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index c6212301712bea549d9b2d648dac0a08140cd9df..e8df50f30e5b0811c69a5ba0a5b58a58adea0ee6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -70,8 +70,9 @@
 
 #define CTX \
        hws->ctx
-#define DC_LOGGER \
-       ctx->logger
+
+#define DC_LOGGER_INIT()
+
 #define REG(reg)\
        hws->regs->reg
 
@@ -2701,7 +2702,7 @@ static void dce110_program_front_end_for_pipe(
        struct xfm_grph_csc_adjustment adjust;
        struct out_csc_color_matrix tbl_entry;
        unsigned int i;
-       struct dc_context *ctx = dc->ctx;
+       DC_LOGGER_INIT();
        memset(&tbl_entry, 0, sizeof(tbl_entry));
 
        if (dc->current_state)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index e21458169d153e6a28d0d9d3ec3d2ae426206893..de5293dc4db3f7752382a79354a44d58888b2c89 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -45,8 +45,8 @@
 #include "dcn10_hubbub.h"
 #include "dcn10_cm_common.h"
 
-#define DC_LOGGER \
-       ctx->logger
+#define DC_LOGGER_INIT(logger)
+
 #define CTX \
        hws->ctx
 #define REG(reg)\
@@ -363,7 +363,7 @@ static void power_on_plane(
        struct dce_hwseq *hws,
        int plane_id)
 {
-       struct dc_context *ctx = hws->ctx;
+       DC_LOGGER_INIT(hws->ctx->logger);
        if (REG(DC_IP_REQUEST_CNTL)) {
                REG_SET(DC_IP_REQUEST_CNTL, 0,
                                IP_REQUEST_EN, 1);
@@ -562,7 +562,7 @@ static void reset_back_end_for_pipe(
                struct dc_state *context)
 {
        int i;
-       struct dc_context *ctx = dc->ctx;
+       DC_LOGGER_INIT(dc->ctx->logger);
        if (pipe_ctx->stream_res.stream_enc == NULL) {
                pipe_ctx->stream = NULL;
                return;
@@ -658,7 +658,7 @@ static void plane_atomic_power_down(struct dc *dc, struct pipe_ctx *pipe_ctx)
 {
        struct dce_hwseq *hws = dc->hwseq;
        struct dpp *dpp = pipe_ctx->plane_res.dpp;
-       struct dc_context *ctx = dc->ctx;
+       DC_LOGGER_INIT(dc->ctx->logger);
 
        if (REG(DC_IP_REQUEST_CNTL)) {
                REG_SET(DC_IP_REQUEST_CNTL, 0,
@@ -708,7 +708,7 @@ static void plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx)
 
 static void dcn10_disable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx)
 {
-       struct dc_context *ctx = dc->ctx;
+       DC_LOGGER_INIT(dc->ctx->logger);
 
        if (!pipe_ctx->plane_res.hubp || pipe_ctx->plane_res.hubp->power_gated)
                return;
@@ -2001,9 +2001,9 @@ static void dcn10_apply_ctx_for_surface(
        bool removed_pipe[4] = { false };
        unsigned int ref_clk_mhz = dc->res_pool->ref_clock_inKhz/1000;
        bool program_water_mark = false;
-       struct dc_context *ctx = dc->ctx;
        struct pipe_ctx *top_pipe_to_program =
                        find_top_pipe_for_stream(dc, context, stream);
+       DC_LOGGER_INIT(dc->ctx->logger);
 
        if (!top_pipe_to_program)
                return;

diff --git a/drivers/gpu/drm/amd/display/include/logger_types.h b/drivers/gpu/drm/amd/display/include/logger_types.h
index 427796bdc14ae663c4494a22b8f734f04f43ad0a..4f332e80cecc54ddb6309940e4aca5ea8064e837 100644 (file)
--- a/drivers/gpu/drm/amd/display/include/logger_types.h
+++ b/drivers/gpu/drm/amd/display/include/logger_types.h
@@ -29,39 +29,39 @@
 #include "os_types.h"
 
 #define MAX_NAME_LEN 32
-#define DC_LOG_ERROR(a, ...) dm_logger_write(DC_LOGGER, LOG_ERROR, a, ## __VA_ARGS__)
-#define DC_LOG_WARNING(a, ...) dm_logger_write(DC_LOGGER, LOG_WARNING, a, ## __VA_ARGS__)
-#define DC_LOG_DEBUG(a, ...) dm_logger_write(DC_LOGGER, LOG_DEBUG, a, ## __VA_ARGS__)
-#define DC_LOG_DC(a, ...) dm_logger_write(DC_LOGGER, LOG_DC, a, ## __VA_ARGS__)
-#define DC_LOG_DTN(a, ...) dm_logger_write(DC_LOGGER, LOG_DTN, a, ## __VA_ARGS__)
-#define DC_LOG_SURFACE(a, ...) dm_logger_write(DC_LOGGER, LOG_SURFACE, a, ## __VA_ARGS__)
-#define DC_LOG_HW_HOTPLUG(a, ...) dm_logger_write(DC_LOGGER, LOG_HW_HOTPLUG, a, ## __VA_ARGS__)
-#define DC_LOG_HW_LINK_TRAINING(a, ...) dm_logger_write(DC_LOGGER, LOG_HW_LINK_TRAINING, a, ## __VA_ARGS__)
-#define DC_LOG_HW_SET_MODE(a, ...) dm_logger_write(DC_LOGGER, LOG_HW_SET_MODE, a, ## __VA_ARGS__)
-#define DC_LOG_HW_RESUME_S3(a, ...) dm_logger_write(DC_LOGGER, LOG_HW_RESUME_S3, a, ## __VA_ARGS__)
-#define DC_LOG_HW_AUDIO(a, ...) dm_logger_write(DC_LOGGER, LOG_HW_AUDIO, a, ## __VA_ARGS__)
-#define DC_LOG_HW_HPD_IRQ(a, ...) dm_logger_write(DC_LOGGER, LOG_HW_HPD_IRQ, a, ## __VA_ARGS__)
-#define DC_LOG_MST(a, ...) dm_logger_write(DC_LOGGER, LOG_MST, a, ## __VA_ARGS__)
-#define DC_LOG_SCALER(a, ...) dm_logger_write(DC_LOGGER, LOG_SCALER, a, ## __VA_ARGS__)
-#define DC_LOG_BIOS(a, ...) dm_logger_write(DC_LOGGER, LOG_BIOS, a, ## __VA_ARGS__)
-#define DC_LOG_BANDWIDTH_CALCS(a, ...) dm_logger_write(DC_LOGGER, LOG_BANDWIDTH_CALCS, a, ## __VA_ARGS__)
-#define DC_LOG_BANDWIDTH_VALIDATION(a, ...) dm_logger_write(DC_LOGGER, LOG_BANDWIDTH_VALIDATION, a, ## __VA_ARGS__)
-#define DC_LOG_I2C_AUX(a, ...) dm_logger_write(DC_LOGGER, LOG_I2C_AUX, a, ## __VA_ARGS__)
-#define DC_LOG_SYNC(a, ...) dm_logger_write(DC_LOGGER, LOG_SYNC, a, ## __VA_ARGS__)
-#define DC_LOG_BACKLIGHT(a, ...) dm_logger_write(DC_LOGGER, LOG_BACKLIGHT, a, ## __VA_ARGS__)
-#define DC_LOG_FEATURE_OVERRIDE(a, ...) dm_logger_write(DC_LOGGER, LOG_FEATURE_OVERRIDE, a, ## __VA_ARGS__)
-#define DC_LOG_DETECTION_EDID_PARSER(a, ...) dm_logger_write(DC_LOGGER, LOG_DETECTION_EDID_PARSER, a, ## __VA_ARGS__)
-#define DC_LOG_DETECTION_DP_CAPS(a, ...) dm_logger_write(DC_LOGGER, LOG_DETECTION_DP_CAPS, a, ## __VA_ARGS__)
-#define DC_LOG_RESOURCE(a, ...) dm_logger_write(DC_LOGGER, LOG_RESOURCE, a, ## __VA_ARGS__)
-#define DC_LOG_DML(a, ...) dm_logger_write(DC_LOGGER, LOG_DML, a, ## __VA_ARGS__)
-#define DC_LOG_EVENT_MODE_SET(a, ...) dm_logger_write(DC_LOGGER, LOG_EVENT_MODE_SET, a, ## __VA_ARGS__)
-#define DC_LOG_EVENT_DETECTION(a, ...) dm_logger_write(DC_LOGGER, LOG_EVENT_DETECTION, a, ## __VA_ARGS__)
-#define DC_LOG_EVENT_LINK_TRAINING(a, ...) dm_logger_write(DC_LOGGER, LOG_EVENT_LINK_TRAINING, a, ## __VA_ARGS__)
-#define DC_LOG_EVENT_LINK_LOSS(a, ...) dm_logger_write(DC_LOGGER, LOG_EVENT_LINK_LOSS, a, ## __VA_ARGS__)
-#define DC_LOG_EVENT_UNDERFLOW(a, ...) dm_logger_write(DC_LOGGER, LOG_EVENT_UNDERFLOW, a, ## __VA_ARGS__)
-#define DC_LOG_IF_TRACE(a, ...) dm_logger_write(DC_LOGGER, LOG_IF_TRACE, a, ## __VA_ARGS__)
-#define DC_LOG_PERF_TRACE(a, ...) dm_logger_write(DC_LOGGER, LOG_PERF_TRACE, a, ## __VA_ARGS__)
 
+#define DC_LOG_ERROR(...) DRM_ERROR(__VA_ARGS__)
+#define DC_LOG_WARNING(...) DRM_WARN(__VA_ARGS__)
+#define DC_LOG_DEBUG(...) DRM_INFO(__VA_ARGS__)
+#define DC_LOG_DC(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_DTN(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_SURFACE(...) pr_debug("[SURFACE]:"__VA_ARGS__)
+#define DC_LOG_HW_HOTPLUG(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_HW_LINK_TRAINING(...) pr_debug("[HW_LINK_TRAINING]:"__VA_ARGS__)
+#define DC_LOG_HW_SET_MODE(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_HW_RESUME_S3(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_HW_AUDIO(...) pr_debug("[HW_AUDIO]:"__VA_ARGS__)
+#define DC_LOG_HW_HPD_IRQ(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_MST(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_SCALER(...) pr_debug("[SCALER]:"__VA_ARGS__)
+#define DC_LOG_BIOS(...) pr_debug("[BIOS]:"__VA_ARGS__)
+#define DC_LOG_BANDWIDTH_CALCS(...) pr_debug("[BANDWIDTH_CALCS]:"__VA_ARGS__)
+#define DC_LOG_BANDWIDTH_VALIDATION(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_I2C_AUX(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_SYNC(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_BACKLIGHT(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_FEATURE_OVERRIDE(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_DETECTION_EDID_PARSER(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_DETECTION_DP_CAPS(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_RESOURCE(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_DML(...) pr_debug("[DML]:"__VA_ARGS__)
+#define DC_LOG_EVENT_MODE_SET(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_EVENT_DETECTION(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_EVENT_LINK_TRAINING(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_EVENT_LINK_LOSS(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_EVENT_UNDERFLOW(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_IF_TRACE(...) pr_debug("[IF_TRACE]:"__VA_ARGS__)
+#define DC_LOG_PERF_TRACE(...) DRM_DEBUG_KMS(__VA_ARGS__)
 
 struct dal_logger;