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+From patchwork Tue Apr 26 19:51:36 2022
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+ id 1njRDu-0006aF-4F; Tue, 26 Apr 2022 21:51:46 +0200
+Date: Tue, 26 Apr 2022 20:51:36 +0100
+From: Daniel Golle <daniel@makrotopia.org>
+To: devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org,
+ linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
+Cc: Rob Herring <robh+dt@kernel.org>,
+ Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
+ Matthias Brugger <matthias.bgg@gmail.com>
+Subject: [PATCH] arm64: dts: mediatek: mt7622: fix GICv2 range
+Message-ID: <YmhNSLgp/yg8Vr1F@makrotopia.org>
+MIME-Version: 1.0
+Content-Disposition: inline
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+
+With the current range specified for the CPU interface there is an
+error message at boot:
+
+GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set
+
+Setting irqchip.gicv2_force_probe=1 in bootargs results in:
+
+GIC: Aliased GICv2 at 0x0000000010320000, trying to find the canonical range over 128kB
+GIC: Adjusting CPU interface base to 0x000000001032f000
+GIC: Using split EOI/Deactivate mode
+
+Using the adjusted CPU interface base and 8K size results in only the
+final line remaining and fully working system as well as /proc/interrupts
+showing additional IPI3,4,5,6:
+
+IPI3: 0 0 CPU stop (for crash dump) interrupts
+IPI4: 0 0 Timer broadcast interrupts
+IPI5: 0 0 IRQ work interrupts
+IPI6: 0 0 CPU wake-up interrupts
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -339,7 +339,7 @@
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ reg = <0 0x10310000 0 0x1000>,
+- <0 0x10320000 0 0x1000>,
++ <0 0x1032f000 0 0x2000>,
+ <0 0x10340000 0 0x2000>,
+ <0 0x10360000 0 0x2000>;
+ };
--- /dev/null
+From patchwork Thu Apr 28 22:57:55 2022
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+ Thu, 28 Apr 2022 15:58:06 -0700 (PDT)
+From: Rui Salvaterra <rsalvaterra@gmail.com>
+To: linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org,
+ linux-kernel@vger.kernel.org
+Cc: matthias.bgg@gmail.com, ryder.lee@mediatek.com, daniel@makrotopia.org,
+ Rui Salvaterra <rsalvaterra@gmail.com>
+Subject: [PATCH] arm64: dts: mt7622: specify the L2 cache topology
+Date: Thu, 28 Apr 2022 23:57:55 +0100
+Message-Id: <20220428225755.785153-1-rsalvaterra@gmail.com>
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+
+On an MT7622 system, the kernel complains of not being able to detect the cache
+hierarchy of CPU 0. Specify the shared L2 cache node in the device tree, in
+order to fix this.
+
+Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -80,6 +80,7 @@
+ enable-method = "psci";
+ clock-frequency = <1300000000>;
+ cci-control-port = <&cci_control2>;
++ next-level-cache = <&L2>;
+ };
+
+ cpu1: cpu@1 {
+@@ -94,6 +95,12 @@
+ enable-method = "psci";
+ clock-frequency = <1300000000>;
+ cci-control-port = <&cci_control2>;
++ next-level-cache = <&L2>;
++ };
++
++ L2: l2-cache {
++ compatible = "cache";
++ cache-level = <2>;
+ };
+ };
+
--- /dev/null
+From patchwork Fri Apr 29 08:42:25 2022
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+From: Rui Salvaterra <rsalvaterra@gmail.com>
+To: linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org,
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+Cc: matthias.bgg@gmail.com, ryder.lee@mediatek.com, daniel@makrotopia.org,
+ Rui Salvaterra <rsalvaterra@gmail.com>
+Subject: [PATCH] arm64: dts: mt7622: specify the number of DMA requests
+Date: Fri, 29 Apr 2022 09:42:25 +0100
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+
+The MT7622 device tree never bothered to specify the number of virtual DMA
+channels for the HSDMA controller, always falling back to the default value of
+3. Make this value explicit, in order to avoid the following dmesg notification:
+
+mtk_hsdma 1b007000.dma-controller: Using 3 as missing dma-requests property
+
+Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -940,6 +940,7 @@
+ clock-names = "hsdma";
+ power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
+ #dma-cells = <1>;
++ dma-requests = <3>;
+ };
+
+ pcie_mirror: pcie-mirror@10000400 {
projects / openwrt / staging / ynezz.git / commitdiff