* lowlevel functions
*/
-#define big_mdelay(msec) do {\
- set_current_state(TASK_UNINTERRUPTIBLE);\
- schedule_timeout(((msec) * HZ) / 1000);\
-} while (0)
-
static inline void snd_m3_outw(m3_t *chip, u16 value, unsigned long reg)
{
outw(value, chip->iobase + reg);
static void snd_m3_assp_halt(m3_t *chip)
{
chip->reset_state = snd_m3_inb(chip, DSP_PORT_CONTROL_REG_B) & ~REGB_STOP_CLOCK;
- big_mdelay(10);
+ msleep(10);
snd_m3_outb(chip, chip->reset_state & ~REGB_ENABLE_RESET, DSP_PORT_CONTROL_REG_B);
}
*/
tmp = inw(io + RING_BUS_CTRL_A);
outw(RAC_SDFS_ENABLE|LAC_SDFS_ENABLE, io + RING_BUS_CTRL_A);
- big_mdelay(20);
+ msleep(20);
outw(tmp, io + RING_BUS_CTRL_A);
- big_mdelay(50);
+ msleep(50);
#endif
}
snd_m3_enable_ints(m3_t *chip)
{
unsigned long io = chip->iobase;
+ unsigned short val;
/* TODO: MPU401 not supported yet */
- outw(ASSP_INT_ENABLE | HV_INT_ENABLE /*| MPU401_INT_ENABLE*/, io + HOST_INT_CTRL);
+ val = ASSP_INT_ENABLE /*| MPU401_INT_ENABLE*/;
+ if (chip->hv_quirk && (chip->hv_quirk->config & HV_CTRL_ENABLE))
+ val |= HV_INT_ENABLE;
+ outw(val, io + HOST_INT_CTRL);
outb(inb(io + ASSP_CONTROL_C) | ASSP_HOST_INT_ENABLE,
io + ASSP_CONTROL_C);
}
snd_pcm_suspend_all(chip->pcm);
snd_ac97_suspend(chip->ac97);
- big_mdelay(10); /* give the assp a chance to idle.. */
+ msleep(10); /* give the assp a chance to idle.. */
snd_m3_assp_halt(chip);
}
spin_lock_init(&chip->reg_lock);
+ spin_lock_init(&chip->ac97_lock);
+
switch (pci->device) {
case PCI_DEVICE_ID_ESS_ALLEGRO:
case PCI_DEVICE_ID_ESS_ALLEGRO_1:
snd_m3_assp_init(chip);
snd_m3_amp_enable(chip, 1);
+ tasklet_init(&chip->hwvol_tq, snd_m3_update_hw_volume, (unsigned long)chip);
+
if (request_irq(pci->irq, snd_m3_interrupt, SA_INTERRUPT|SA_SHIRQ,
card->driver, (void *)chip)) {
snd_printk("unable to grab IRQ %d\n", pci->irq);
return err;
}
- spin_lock_init(&chip->ac97_lock);
- tasklet_init(&chip->hwvol_tq, snd_m3_update_hw_volume, (unsigned long)chip);
-
if ((err = snd_m3_mixer(chip)) < 0)
return err;