drm/amdgpu: init umc v6_1 functions for vega20
authorHawking Zhang <Hawking.Zhang@amd.com>
Wed, 17 Jul 2019 13:47:44 +0000 (21:47 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 31 Jul 2019 19:49:22 +0000 (14:49 -0500)
init umc callback function for vega20 in sw early init phase

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Dennis Li <dennis.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

index 320b5413738e3276c9f8c7dbdfbc68c8e10107cf..19f3d715e2c8d23813cbfd76ca5dea3b733e7703 100644 (file)
@@ -49,6 +49,7 @@
 #include "mmhub_v1_0.h"
 #include "gfxhub_v1_1.h"
 #include "mmhub_v9_4.h"
+#include "umc_v6_1.h"
 
 #include "ivsrcid/vmc/irqsrcs_vmc_1_0.h"
 
@@ -627,12 +628,24 @@ static void gmc_v9_0_set_gmc_funcs(struct amdgpu_device *adev)
        adev->gmc.gmc_funcs = &gmc_v9_0_gmc_funcs;
 }
 
+static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
+{
+       switch (adev->asic_type) {
+       case CHIP_VEGA20:
+               adev->umc_funcs = &umc_v6_1_funcs;
+               break;
+       default:
+               break;
+       }
+}
+
 static int gmc_v9_0_early_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
        gmc_v9_0_set_gmc_funcs(adev);
        gmc_v9_0_set_irq_funcs(adev);
+       gmc_v9_0_set_umc_funcs(adev);
 
        adev->gmc.shared_aperture_start = 0x2000000000000000ULL;
        adev->gmc.shared_aperture_end =
@@ -721,6 +734,7 @@ static int gmc_v9_0_ecc_late_init(void *handle)
                amdgpu_ras_feature_enable_on_boot(adev, &ras_block, 0);
                return 0;
        }
+
        /* handle resume path. */
        if (*ras_if) {
                /* resend ras TA enable cmd during resume.