if (mask & (PCI_BRIDGE_CTL_BUS_RESET << 16)) {
u32 val = advk_readl(pcie, PCIE_CORE_CTRL1_REG);
if (new & (PCI_BRIDGE_CTL_BUS_RESET << 16))
-@@ -1459,6 +1480,19 @@ static void advk_pcie_handle_int(struct
+@@ -1459,6 +1480,18 @@ static void advk_pcie_handle_int(struct
isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK);
+ * Aardvark HW returns zero for PCI_ERR_ROOT_AER_IRQ, so use
+ * PCIe interrupt 0
+ */
-+ virq = irq_find_mapping(pcie->irq_domain, 0);
-+ if (generic_handle_irq(virq) == -EINVAL)
++ if (generic_handle_domain_irq(pcie->irq_domain, 0) == -EINVAL)
+ dev_err_ratelimited(&pcie->pdev->dev, "unhandled ERR IRQ\n");
+ }
+
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
-@@ -1484,6 +1484,19 @@ static void advk_pcie_handle_int(struct
+@@ -1484,6 +1484,18 @@ static void advk_pcie_handle_int(struct
isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK);
+ * root bridge. Aardvark HW returns zero for PCI_EXP_FLAGS_IRQ,
+ * so use PCIe interrupt 0.
+ */
-+ virq = irq_find_mapping(pcie->irq_domain, 0);
-+ if (generic_handle_irq(virq) == -EINVAL)
++ if (generic_handle_domain_irq(pcie->irq_domain, 0) == -EINVAL)
+ dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n");
+ }
+
case PCI_EXP_DEVCTL:
case PCI_EXP_DEVCTL2:
-@@ -1445,6 +1436,34 @@ static void advk_pcie_remove_irq_domain(
+@@ -1445,6 +1436,32 @@ static void advk_pcie_remove_irq_domain(
irq_domain_remove(pcie->irq_domain);
}
+static void advk_pcie_handle_pme(struct advk_pcie *pcie)
+{
+ u32 requester = advk_readl(pcie, PCIE_MSG_LOG_REG) >> 16;
-+ int virq;
+
+ advk_writel(pcie, PCIE_MSG_PM_PME_MASK, PCIE_ISR0_REG);
+
+ if (!(le16_to_cpu(pcie->bridge.pcie_conf.rootctl) & PCI_EXP_RTCTL_PMEIE))
+ return;
+
-+ virq = irq_find_mapping(pcie->irq_domain, 0);
-+ if (generic_handle_irq(virq) == -EINVAL)
++ if (generic_handle_domain_irq(pcie->irq_domain, 0) == -EINVAL)
+ dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n");
+ }
+}
static void advk_pcie_handle_msi(struct advk_pcie *pcie)
{
u32 msi_val, msi_mask, msi_status, msi_idx;
-@@ -1484,18 +1503,9 @@ static void advk_pcie_handle_int(struct
+@@ -1484,17 +1503,9 @@ static void advk_pcie_handle_int(struct
isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK);
- * root bridge. Aardvark HW returns zero for PCI_EXP_FLAGS_IRQ,
- * so use PCIe interrupt 0.
- */
-- virq = irq_find_mapping(pcie->irq_domain, 0);
-- if (generic_handle_irq(virq) == -EINVAL)
+- if (generic_handle_domain_irq(pcie->irq_domain, 0) == -EINVAL)
- dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n");
- }
+ /* Process PME interrupt as the first one to do not miss PME requester id */
if (!(le16_to_cpu(pcie->bridge.pcie_conf.rootctl) & PCI_EXP_RTCTL_PMEIE))
return;
-- virq = irq_find_mapping(pcie->irq_domain, 0);
-+ virq = irq_find_mapping(pcie->rp_irq_domain, 0);
- if (generic_handle_irq(virq) == -EINVAL)
+- if (generic_handle_domain_irq(pcie->irq_domain, 0) == -EINVAL)
++ if (generic_handle_domain_irq(pcie->rp_irq_domain, 0) == -EINVAL)
dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n");
}
+
@@ -1515,7 +1554,7 @@ static void advk_pcie_handle_int(struct
* Aardvark HW returns zero for PCI_ERR_ROOT_AER_IRQ, so use
* PCIe interrupt 0
*/
-- virq = irq_find_mapping(pcie->irq_domain, 0);
-+ virq = irq_find_mapping(pcie->rp_irq_domain, 0);
- if (generic_handle_irq(virq) == -EINVAL)
+- if (generic_handle_domain_irq(pcie->irq_domain, 0) == -EINVAL)
++ if (generic_handle_domain_irq(pcie->rp_irq_domain, 0) == -EINVAL)
dev_err_ratelimited(&pcie->pdev->dev, "unhandled ERR IRQ\n");
}
+
@@ -1560,6 +1599,21 @@ static void advk_pcie_irq_handler(struct
chained_irq_exit(chip, desc);
}