Refresh patches on all 4.4 supported platforms.
Compile & run tested: lantiq/xrx200
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
LINUX_RELEASE?=1
LINUX_VERSION-3.18 = .43
-LINUX_VERSION-4.4 = .40
+LINUX_VERSION-4.4 = .42
LINUX_KERNEL_HASH-3.18.43 = 1236e8123a6ce537d5029232560966feed054ae31776fe8481dd7d18cdd5492c
-LINUX_KERNEL_HASH-4.4.40 = c4bc5ed6e73ed7393cc1b3714b822664224ab866db114eed663de1315718a4e1
+LINUX_KERNEL_HASH-4.4.42 = 324747568e92f203e3ee5ec8b291a868f58b870f1ad214fa64aa3507ed42e878
ifdef KERNEL_PATCHVER
LINUX_VERSION:=$(KERNEL_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_PATCHVER)))
--- /dev/null
+This is only needed for kernel < 2.6.29 and conflicts with kernel 4.4.42
+
+--- a/backport-include/linux/cred.h
++++ /dev/null
+@@ -1,10 +0,0 @@
+-#ifndef __BACKPORT_LINUX_CRED_H
+-#define __BACKPORT_LINUX_CRED_H
+-#include_next <linux/cred.h>
+-#include <linux/version.h>
+-
+-#ifndef current_user_ns
+-#define current_user_ns() (current->nsproxy->user_ns)
+-#endif
+-
+-#endif /* __BACKPORT_LINUX_CRED_H */
#include "xhci.h"
#include "xhci-trace.h"
-@@ -211,6 +213,458 @@ static void xhci_pme_acpi_rtd3_enable(st
+@@ -218,6 +220,458 @@ static void xhci_pme_acpi_rtd3_enable(st
static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
#endif /* CONFIG_ACPI */
/* called during probe() after chip reset completes */
static int xhci_pci_setup(struct usb_hcd *hcd)
{
-@@ -250,6 +704,22 @@ static int xhci_pci_probe(struct pci_dev
+@@ -257,6 +711,22 @@ static int xhci_pci_probe(struct pci_dev
struct hc_driver *driver;
struct usb_hcd *hcd;
driver = (struct hc_driver *)id->driver_data;
/* Prevent runtime suspending between USB-2 and USB-3 initialization */
-@@ -307,6 +777,16 @@ static void xhci_pci_remove(struct pci_d
+@@ -314,6 +784,16 @@ static void xhci_pci_remove(struct pci_d
{
struct xhci_hcd *xhci;
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
-@@ -178,7 +178,7 @@ static void xhci_pci_quirks(struct devic
+@@ -185,7 +185,7 @@ static void xhci_pci_quirks(struct devic
}
if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
pdev->device == 0x0015)
/* hcd->irq is 0, we have MSI */
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
-@@ -1648,6 +1648,7 @@ struct xhci_hcd {
+@@ -1652,6 +1652,7 @@ struct xhci_hcd {
/* support xHCI 0.96 spec USB2 software LPM */
unsigned sw_lpm_support:1;
/* support xHCI 1.0 spec USB2 hardware LPM */
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
-@@ -1493,6 +1493,16 @@ config SENSORS_INA2XX
+@@ -1484,6 +1484,16 @@ config SENSORS_INA2XX
This driver can also be built as a module. If so, the module
will be called ina2xx.
/*
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
-@@ -1631,6 +1631,7 @@ struct xhci_hcd {
- /* For controllers with a broken beyond repair streams implementation */
+@@ -1635,6 +1635,7 @@ struct xhci_hcd {
#define XHCI_BROKEN_STREAMS (1 << 19)
#define XHCI_PME_STUCK_QUIRK (1 << 20)
-+#define XHCI_FAKE_DOORBELL (1 << 24)
+ #define XHCI_MISSING_CAS (1 << 24)
++#define XHCI_FAKE_DOORBELL (1 << 25)
unsigned int num_active_eps;
unsigned int limit_active_eps;
/* There are two roothubs to keep track of bus suspend info for */
}
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
-@@ -4943,7 +4943,7 @@ static void port_event(struct usb_hub *h
+@@ -4942,7 +4942,7 @@ static void port_event(struct usb_hub *h
if (portchange & USB_PORT_STAT_C_OVERCURRENT) {
u16 status = 0, unused;
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1164,22 +1164,24 @@ static int bcm2835_clock_is_on(struct cl
+@@ -1166,22 +1166,24 @@ static int bcm2835_clock_is_on(struct cl
static u32 bcm2835_clock_choose_div(struct clk_hw *hw,
unsigned long rate,
/* clamp to min divider of 1 */
div = max_t(u32, div, 1 << CM_DIV_FRAC_BITS);
-@@ -1219,7 +1221,7 @@ static long bcm2835_clock_round_rate(str
+@@ -1221,7 +1223,7 @@ static long bcm2835_clock_round_rate(str
unsigned long *parent_rate)
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
return bcm2835_clock_rate_from_divisor(clock, *parent_rate, div);
}
-@@ -1288,7 +1290,7 @@ static int bcm2835_clock_set_rate(struct
+@@ -1290,7 +1292,7 @@ static int bcm2835_clock_set_rate(struct
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct bcm2835_cprman *cprman = clock->cprman;
const struct bcm2835_clock_data *data = clock->data;
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1216,16 +1216,6 @@ static long bcm2835_clock_rate_from_divi
+@@ -1218,16 +1218,6 @@ static long bcm2835_clock_rate_from_divi
return temp;
}
static unsigned long bcm2835_clock_get_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
-@@ -1297,13 +1287,75 @@ static int bcm2835_clock_set_rate(struct
+@@ -1299,13 +1289,75 @@ static int bcm2835_clock_set_rate(struct
return 0;
}
};
static int bcm2835_vpu_clock_is_on(struct clk_hw *hw)
-@@ -1319,7 +1371,9 @@ static const struct clk_ops bcm2835_vpu_
+@@ -1321,7 +1373,9 @@ static const struct clk_ops bcm2835_vpu_
.is_prepared = bcm2835_vpu_clock_is_on,
.recalc_rate = bcm2835_clock_get_rate,
.set_rate = bcm2835_clock_set_rate,
};
static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
-@@ -1413,45 +1467,23 @@ static struct clk *bcm2835_register_cloc
+@@ -1415,45 +1469,23 @@ static struct clk *bcm2835_register_cloc
{
struct bcm2835_clock *clock;
struct clk_init_data init;
struct bcm2835_pll {
struct clk_hw hw;
struct bcm2835_cprman *cprman;
-@@ -1601,6 +1611,9 @@ static int bcm2835_clk_probe(struct plat
+@@ -1603,6 +1613,9 @@ static int bcm2835_clk_probe(struct plat
cprman->regs + CM_PERIICTL, CM_GATE_BIT,
0, &cprman->regs_lock);
};
struct bcm2835_pll {
-@@ -1196,7 +1200,7 @@ static u32 bcm2835_clock_choose_div(stru
+@@ -1198,7 +1202,7 @@ static u32 bcm2835_clock_choose_div(stru
GENMASK(CM_DIV_FRAC_BITS - data->frac_bits, 0) >> 1;
u64 temp = (u64)parent_rate << CM_DIV_FRAC_BITS;
u64 rem;
rem = do_div(temp, rate);
div = temp;
-@@ -1206,11 +1210,23 @@ static u32 bcm2835_clock_choose_div(stru
+@@ -1208,11 +1212,23 @@ static u32 bcm2835_clock_choose_div(stru
div += unused_frac_mask + 1;
div &= ~unused_frac_mask;
return div;
}
-@@ -1304,9 +1320,26 @@ static int bcm2835_clock_set_rate(struct
+@@ -1306,9 +1322,26 @@ static int bcm2835_clock_set_rate(struct
struct bcm2835_cprman *cprman = clock->cprman;
const struct bcm2835_clock_data *data = clock->data;
u32 div = bcm2835_clock_choose_div(hw, rate, parent_rate, false);
const char *osc_name;
struct clk_onecell_data onecell;
-@@ -1344,7 +1341,7 @@ static int bcm2835_clock_set_rate(struct
+@@ -1346,7 +1343,7 @@ static int bcm2835_clock_set_rate(struct
}
static int bcm2835_clock_determine_rate(struct clk_hw *hw,
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct clk_hw *parent, *best_parent = NULL;
-@@ -1402,7 +1399,6 @@ static u8 bcm2835_clock_get_parent(struc
+@@ -1404,7 +1401,6 @@ static u8 bcm2835_clock_get_parent(struc
return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
}
};
struct bcm2835_pll_divider {
-@@ -1151,6 +1204,26 @@ static int bcm2835_pll_divider_set_rate(
+@@ -1153,6 +1206,26 @@ static int bcm2835_pll_divider_set_rate(
return 0;
}
static const struct clk_ops bcm2835_pll_divider_clk_ops = {
.is_prepared = bcm2835_pll_divider_is_on,
.prepare = bcm2835_pll_divider_on,
-@@ -1158,6 +1231,7 @@ static const struct clk_ops bcm2835_pll_
+@@ -1160,6 +1233,7 @@ static const struct clk_ops bcm2835_pll_
.recalc_rate = bcm2835_pll_divider_get_rate,
.set_rate = bcm2835_pll_divider_set_rate,
.round_rate = bcm2835_pll_divider_round_rate,
};
/*
-@@ -1399,6 +1473,31 @@ static u8 bcm2835_clock_get_parent(struc
+@@ -1401,6 +1475,31 @@ static u8 bcm2835_clock_get_parent(struc
return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
}
static const struct clk_ops bcm2835_clock_clk_ops = {
.is_prepared = bcm2835_clock_is_on,
.prepare = bcm2835_clock_on,
-@@ -1408,6 +1507,7 @@ static const struct clk_ops bcm2835_cloc
+@@ -1410,6 +1509,7 @@ static const struct clk_ops bcm2835_cloc
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
.get_parent = bcm2835_clock_get_parent,
};
static int bcm2835_vpu_clock_is_on(struct clk_hw *hw)
-@@ -1426,6 +1526,7 @@ static const struct clk_ops bcm2835_vpu_
+@@ -1428,6 +1528,7 @@ static const struct clk_ops bcm2835_vpu_
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
.get_parent = bcm2835_clock_get_parent,
struct bcm2835_pll {
struct clk_hw hw;
struct bcm2835_cprman *cprman;
-@@ -1658,14 +1677,81 @@ static struct clk *bcm2835_register_cloc
+@@ -1660,14 +1679,81 @@ static struct clk *bcm2835_register_cloc
return devm_clk_register(cprman->dev, &clock->hw);
}
if (!cprman)
return -ENOMEM;
-@@ -1682,80 +1768,15 @@ static int bcm2835_clk_probe(struct plat
+@@ -1684,80 +1770,15 @@ static int bcm2835_clk_probe(struct plat
platform_set_drvdata(pdev, cprman);
struct bcm2835_pll {
struct clk_hw hw;
struct bcm2835_cprman *cprman;
-@@ -1594,7 +1177,7 @@ bcm2835_register_pll_divider(struct bcm2
+@@ -1596,7 +1179,7 @@ bcm2835_register_pll_divider(struct bcm2
memset(&init, 0, sizeof(init));
init.num_parents = 1;
init.name = divider_name;
init.ops = &bcm2835_pll_divider_clk_ops;
-@@ -1693,50 +1276,401 @@ struct bcm2835_clk_desc {
+@@ -1695,50 +1278,401 @@ struct bcm2835_clk_desc {
const void *data;
};
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1638,6 +1638,13 @@ static const struct bcm2835_clk_desc clk
+@@ -1640,6 +1640,13 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_HSMDIV,
.int_bits = 4,
.frac_bits = 8),
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1387,6 +1387,22 @@ static const struct bcm2835_clk_desc clk
+@@ -1389,6 +1389,22 @@ static const struct bcm2835_clk_desc clk
.load_mask = CM_PLLA_LOADPER,
.hold_mask = CM_PLLA_HOLDPER,
.fixed_divider = 1),
/* PLLB is used for the ARM's clock. */
[BCM2835_PLLB] = REGISTER_PLL(
-@@ -1501,6 +1517,22 @@ static const struct bcm2835_clk_desc clk
+@@ -1503,6 +1519,22 @@ static const struct bcm2835_clk_desc clk
.load_mask = CM_PLLD_LOADPER,
.hold_mask = CM_PLLD_HOLDPER,
.fixed_divider = 1),
#define CM_EMMCCTL 0x1c0
#define CM_EMMCDIV 0x1c4
-@@ -1610,6 +1612,12 @@ static const struct bcm2835_clk_desc clk
+@@ -1612,6 +1614,12 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_TSENSDIV,
.int_bits = 5,
.frac_bits = 0),
/* clocks with vpu parent mux */
[BCM2835_CLOCK_H264] = REGISTER_VPU_CLK(
-@@ -1624,6 +1632,7 @@ static const struct bcm2835_clk_desc clk
+@@ -1626,6 +1634,7 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_ISPDIV,
.int_bits = 4,
.frac_bits = 8),
/*
* Secondary SDRAM clock. Used for low-voltage modes when the PLL
* in the SDRAM controller can't be used.
-@@ -1655,6 +1664,36 @@ static const struct bcm2835_clk_desc clk
+@@ -1657,6 +1666,36 @@ static const struct bcm2835_clk_desc clk
.is_vpu_clock = true),
/* clocks with per parent mux */
/* Arasan EMMC clock */
[BCM2835_CLOCK_EMMC] = REGISTER_PER_CLK(
-@@ -1663,6 +1702,29 @@ static const struct bcm2835_clk_desc clk
+@@ -1665,6 +1704,29 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_EMMCDIV,
.int_bits = 4,
.frac_bits = 8),
/* HDMI state machine */
[BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
.name = "hsm",
-@@ -1684,12 +1746,26 @@ static const struct bcm2835_clk_desc clk
+@@ -1686,12 +1748,26 @@ static const struct bcm2835_clk_desc clk
.int_bits = 12,
.frac_bits = 12,
.is_mash_clock = true),
/* TV encoder clock. Only operating frequency is 108Mhz. */
[BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
.name = "vec",
-@@ -1698,6 +1774,20 @@ static const struct bcm2835_clk_desc clk
+@@ -1700,6 +1776,20 @@ static const struct bcm2835_clk_desc clk
.int_bits = 4,
.frac_bits = 0),
bool is_vpu_clock;
bool is_mash_clock;
};
-@@ -1242,7 +1244,7 @@ static struct clk *bcm2835_register_cloc
+@@ -1244,7 +1246,7 @@ static struct clk *bcm2835_register_cloc
init.parent_names = parents;
init.num_parents = data->num_mux_parents;
init.name = data->name;
if (data->is_vpu_clock) {
init.ops = &bcm2835_vpu_clock_clk_ops;
-@@ -1661,6 +1663,7 @@ static const struct bcm2835_clk_desc clk
+@@ -1663,6 +1665,7 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_VPUDIV,
.int_bits = 12,
.frac_bits = 8,
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1246,6 +1246,15 @@ static struct clk *bcm2835_register_cloc
+@@ -1248,6 +1248,15 @@ static struct clk *bcm2835_register_cloc
init.name = data->name;
init.flags = data->flags | CLK_IGNORE_UNUSED;
if (data->is_vpu_clock) {
init.ops = &bcm2835_vpu_clock_clk_ops;
} else {
-@@ -1720,13 +1729,15 @@ static const struct bcm2835_clk_desc clk
+@@ -1722,13 +1731,15 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_GP1DIV,
.int_bits = 12,
.frac_bits = 12,
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1020,16 +1020,28 @@ static int bcm2835_clock_set_rate(struct
+@@ -1022,16 +1022,28 @@ static int bcm2835_clock_set_rate(struct
return 0;
}
/*
* Select parent clock that results in the closest but lower rate
*/
-@@ -1037,6 +1049,17 @@ static int bcm2835_clock_determine_rate(
+@@ -1039,6 +1051,17 @@ static int bcm2835_clock_determine_rate(
parent = clk_hw_get_parent_by_index(hw, i);
if (!parent)
continue;
#include <linux/clk/bcm2835.h>
#include <linux/debugfs.h>
#include <linux/module.h>
-@@ -1839,6 +1840,25 @@ static const struct bcm2835_clk_desc clk
+@@ -1841,6 +1842,25 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_PERIICTL),
};
static int bcm2835_clk_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
-@@ -1848,6 +1868,7 @@ static int bcm2835_clk_probe(struct plat
+@@ -1850,6 +1870,7 @@ static int bcm2835_clk_probe(struct plat
const struct bcm2835_clk_desc *desc;
const size_t asize = ARRAY_SIZE(clk_desc_array);
size_t i;
cprman = devm_kzalloc(dev,
sizeof(*cprman) + asize * sizeof(*clks),
-@@ -1878,6 +1899,10 @@ static int bcm2835_clk_probe(struct plat
+@@ -1880,6 +1901,10 @@ static int bcm2835_clk_probe(struct plat
clks[i] = desc->clk_register(cprman, desc->data);
}
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1209,7 +1209,7 @@ bcm2835_register_pll_divider(struct bcm2
+@@ -1211,7 +1211,7 @@ bcm2835_register_pll_divider(struct bcm2
init.num_parents = 1;
init.name = divider_name;
init.ops = &bcm2835_pll_divider_clk_ops;
struct clk_onecell_data onecell;
struct clk *clks[];
-@@ -1168,7 +1186,7 @@ static struct clk *bcm2835_register_pll(
+@@ -1170,7 +1188,7 @@ static struct clk *bcm2835_register_pll(
memset(&init, 0, sizeof(init));
/* All of the PLLs derive from the external oscillator. */
init.num_parents = 1;
init.name = data->name;
init.ops = &bcm2835_pll_clk_ops;
-@@ -1251,17 +1269,21 @@ static struct clk *bcm2835_register_cloc
+@@ -1253,17 +1271,21 @@ static struct clk *bcm2835_register_cloc
struct bcm2835_clock *clock;
struct clk_init_data init;
const char *parents[1 << CM_SRC_BITS];
}
memset(&init, 0, sizeof(init));
-@@ -1883,8 +1905,18 @@ static int bcm2835_clk_probe(struct plat
+@@ -1885,8 +1907,18 @@ static int bcm2835_clk_probe(struct plat
if (IS_ERR(cprman->regs))
return PTR_ERR(cprman->regs);
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -934,6 +934,9 @@ static long bcm2835_clock_rate_from_divi
+@@ -936,6 +936,9 @@ static long bcm2835_clock_rate_from_divi
const struct bcm2835_clock_data *data = clock->data;
u64 temp;
/*
* The divisor is a 12.12 fixed point field, but only some of
* the bits are populated in any given clock.
-@@ -957,7 +960,12 @@ static unsigned long bcm2835_clock_get_r
+@@ -959,7 +962,12 @@ static unsigned long bcm2835_clock_get_r
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct bcm2835_cprman *cprman = clock->cprman;
const struct bcm2835_clock_data *data = clock->data;
return bcm2835_clock_rate_from_divisor(clock, parent_rate, div);
}
-@@ -1403,6 +1411,28 @@ static const char *const bcm2835_clock_v
+@@ -1405,6 +1413,28 @@ static const char *const bcm2835_clock_v
__VA_ARGS__)
/*
* the real definition of all the pll, pll_dividers and clocks
* these make use of the above REGISTER_* macros
*/
-@@ -1847,7 +1877,12 @@ static const struct bcm2835_clk_desc clk
+@@ -1849,7 +1879,12 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_DSI1EDIV,
.int_bits = 4,
.frac_bits = 8),
--- a/drivers/mtd/bcm47xxpart.c
+++ b/drivers/mtd/bcm47xxpart.c
-@@ -127,6 +127,7 @@ static int bcm47xxpart_parse(struct mtd_
- int last_trx_part = -1;
+@@ -217,6 +217,7 @@ static int bcm47xxpart_parse(struct mtd_
+ int trx_num = 0; /* Number of found TRX partitions */
int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, };
int err;
+ bool found_nvram = false;
/*
* Some really old flashes (like AT45DB*) had smaller erasesize-s, but
-@@ -332,12 +333,23 @@ static int bcm47xxpart_parse(struct mtd_
+@@ -384,12 +385,23 @@ static int bcm47xxpart_parse(struct mtd_
if (buf[0] == NVRAM_HEADER) {
bcm47xxpart_add_part(&parts[curr_part++], "nvram",
master->size - blocksize, 0);
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
-@@ -1021,6 +1021,12 @@ struct dwc3_gadget_ep_cmd_params {
+@@ -1019,6 +1019,12 @@ struct dwc3_gadget_ep_cmd_params {
void dwc3_set_mode(struct dwc3 *dwc, u32 mode);
int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc);
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
-@@ -222,7 +222,8 @@
+@@ -220,7 +220,8 @@
/* Global HWPARAMS3 Register */
#define DWC3_GHWPARAMS3_SSPHY_IFC(n) ((n) & 3)
#define DWC3_GHWPARAMS3_SSPHY_IFC_DIS 0
#define DWC3_GHWPARAMS3_HSPHY_IFC(n) (((n) & (3 << 2)) >> 2)
#define DWC3_GHWPARAMS3_HSPHY_IFC_DIS 0
#define DWC3_GHWPARAMS3_HSPHY_IFC_UTMI 1
-@@ -248,6 +249,7 @@
+@@ -246,6 +247,7 @@
#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
#define DWC3_DCFG_SPEED_MASK (7 << 0)
#define DWC3_DCFG_SUPERSPEED (4 << 0)
#define DWC3_DCFG_HIGHSPEED (0 << 0)
#define DWC3_DCFG_FULLSPEED2 (1 << 0)
-@@ -338,6 +340,7 @@
+@@ -336,6 +338,7 @@
#define DWC3_DSTS_CONNECTSPD (7 << 0)
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
-@@ -707,9 +707,7 @@ struct dwc3_scratchpad_array {
+@@ -705,9 +705,7 @@ struct dwc3_scratchpad_array {
* 0 - utmi_sleep_n
* 1 - utmi_l1_suspend_n
* @is_fpga: true when we are using the FPGA board
* @setup_packet_pending: true when there's a Setup Packet in FIFO. Workaround
* @start_config_issued: true when StartConfig command has been issued
* @three_stage_setup: set if we perform a three phase setup
-@@ -852,9 +850,7 @@ struct dwc3 {
+@@ -850,9 +848,7 @@ struct dwc3 {
unsigned has_lpm_erratum:1;
unsigned is_utmi_l1_suspend:1;
unsigned is_fpga:1;
unsigned setup_packet_pending:1;
unsigned three_stage_setup:1;
unsigned usb3_lpm_capable:1;
-@@ -1022,7 +1018,6 @@ struct dwc3_gadget_ep_cmd_params {
+@@ -1020,7 +1016,6 @@ struct dwc3_gadget_ep_cmd_params {
/* prototypes */
void dwc3_set_mode(struct dwc3 *dwc, u32 mode);
static inline bool dwc3_is_usb31(struct dwc3 *dwc)
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
-@@ -583,9 +583,6 @@ static int dwc3_ep0_set_config(struct dw
+@@ -587,9 +587,6 @@ static int dwc3_ep0_set_config(struct dw
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
reg |= (DWC3_DCTL_ACCEPTU1ENA | DWC3_DCTL_ACCEPTU2ENA);
dwc3_writel(dwc->regs, DWC3_DCTL, reg);
}
break;
-@@ -1020,12 +1017,6 @@ static int dwc3_ep0_start_control_status
+@@ -1028,12 +1025,6 @@ static int dwc3_ep0_start_control_status
static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep)
{
static int dwc3_alloc_scratch_buffers(struct dwc3 *dwc)
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
-@@ -665,7 +665,6 @@ struct dwc3_scratchpad_array {
+@@ -663,7 +663,6 @@ struct dwc3_scratchpad_array {
* @regs: base address for our registers
* @regs_size: address space size
* @nr_scratch: number of scratch buffers
* @u1u2: only used on revisions <1.83a for workaround
* @maximum_speed: maximum speed requested (mainly for testing purposes)
* @revision: revision register contents
-@@ -775,7 +774,6 @@ struct dwc3 {
+@@ -773,7 +772,6 @@ struct dwc3 {
u32 gctl;
u32 nr_scratch;
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
-@@ -750,7 +750,7 @@ struct dwc3 {
+@@ -748,7 +748,7 @@ struct dwc3 {
struct platform_device *xhci;
struct resource xhci_resources[DWC3_XHCI_RESOURCES_NUM];
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -8253,6 +8253,13 @@ S: Maintained
+@@ -8248,6 +8248,13 @@ S: Maintained
F: Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
F: drivers/pci/host/pcie-hisi.c
obj-$(CONFIG_SENSORS_MAX1619) += max1619.o
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
-@@ -762,6 +762,14 @@ config SENSORS_LTC4261
+@@ -753,6 +753,14 @@ config SENSORS_LTC4261
This driver can also be built as a module. If so, the module will
be called ltc4261.
/*
* Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
-@@ -3088,17 +3089,22 @@ static u32 xhci_td_remainder(struct xhci
+@@ -3121,17 +3122,22 @@ static u32 xhci_td_remainder(struct xhci
{
u32 maxp, total_packet_count;
/* Queueing functions don't count the current TRB into transferred */
return (total_packet_count - ((transferred + trb_buff_len) / maxp));
}
-@@ -3486,7 +3492,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
+@@ -3519,7 +3525,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
field |= 0x1;
/* xHCI 1.0/1.1 6.4.1.2.1: Transfer Type field */
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
-@@ -1631,6 +1631,7 @@ struct xhci_hcd {
+@@ -1634,6 +1634,7 @@ struct xhci_hcd {
/* For controllers with a broken beyond repair streams implementation */
#define XHCI_BROKEN_STREAMS (1 << 19)
#define XHCI_PME_STUCK_QUIRK (1 << 20)
+#define XHCI_MTK_HOST (1 << 21)
+ #define XHCI_MISSING_CAS (1 << 24)
unsigned int num_active_eps;
unsigned int limit_active_eps;
- /* There are two roothubs to keep track of bus suspend info for */
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -6907,6 +6907,13 @@ F: include/uapi/linux/meye.h
+@@ -6902,6 +6902,13 @@ F: include/uapi/linux/meye.h
F: include/uapi/linux/ivtv*
F: include/uapi/linux/uvcvideo.h
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -6909,7 +6909,7 @@ F: include/uapi/linux/uvcvideo.h
+@@ -6904,7 +6904,7 @@ F: include/uapi/linux/uvcvideo.h
MEDIATEK ETHERNET DRIVER
M: Felix Fietkau <nbd@nbd.name>
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -6910,6 +6910,7 @@ F: include/uapi/linux/uvcvideo.h
+@@ -6905,6 +6905,7 @@ F: include/uapi/linux/uvcvideo.h
MEDIATEK ETHERNET DRIVER
M: Felix Fietkau <nbd@nbd.name>
M: John Crispin <john@phrozen.org>
/*
* Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
-@@ -3088,17 +3089,22 @@ static u32 xhci_td_remainder(struct xhci
+@@ -3121,17 +3122,22 @@ static u32 xhci_td_remainder(struct xhci
{
u32 maxp, total_packet_count;
/* Queueing functions don't count the current TRB into transferred */
return (total_packet_count - ((transferred + trb_buff_len) / maxp));
}
-@@ -3486,7 +3492,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
+@@ -3519,7 +3525,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
field |= 0x1;
/* xHCI 1.0/1.1 6.4.1.2.1: Transfer Type field */
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
-@@ -1631,6 +1631,7 @@ struct xhci_hcd {
+@@ -1634,6 +1634,7 @@ struct xhci_hcd {
/* For controllers with a broken beyond repair streams implementation */
#define XHCI_BROKEN_STREAMS (1 << 19)
#define XHCI_PME_STUCK_QUIRK (1 << 20)
+#define XHCI_MTK_HOST (1 << 21)
+ #define XHCI_MISSING_CAS (1 << 24)
unsigned int num_active_eps;
unsigned int limit_active_eps;
- /* There are two roothubs to keep track of bus suspend info for */
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
-@@ -811,3 +811,5 @@ config MMC_MTK
+@@ -786,3 +786,5 @@ config MMC_MTK
If you have a machine with a integrated SD/MMC card reader, say Y or M here.
This is needed if support for any SD/SDIO/MMC devices is required.
If unsure, say N.
--- a/drivers/net/ethernet/mediatek/mt7530.c
+++ b/drivers/net/ethernet/mediatek/mt7530.c
-@@ -543,6 +543,7 @@ mt7530_apply_config(struct switch_dev *d
+@@ -547,6 +547,7 @@ mt7530_apply_config(struct switch_dev *d
u8 etags = priv->vlan_entries[i].etags;
u32 val;
/* vid of vlan */
val = mt7530_r32(priv, REG_ESW_VLAN_VTIM(i));
if (i % 2 == 0) {
-@@ -553,7 +554,7 @@ mt7530_apply_config(struct switch_dev *d
+@@ -557,7 +558,7 @@ mt7530_apply_config(struct switch_dev *d
val |= (vid << 12);
}
mt7530_w32(priv, REG_ESW_VLAN_VTIM(i), val);
/* vlan port membership */
if (member)
mt7530_w32(priv, REG_ESW_VLAN_VAWD1, REG_ESW_VLAN_VAWD1_IVL_MAC |
-@@ -573,7 +574,11 @@ mt7530_apply_config(struct switch_dev *d
+@@ -577,7 +578,11 @@ mt7530_apply_config(struct switch_dev *d
mt7530_w32(priv, REG_ESW_VLAN_VAWD2, val);
/* write to vlan table */
arch/mips/ralink/rt3883.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/arch/mips/ralink/rt3883.c b/arch/mips/ralink/rt3883.c
-index 4cef9162bd9b..47f9849bda3a 100644
--- a/arch/mips/ralink/rt3883.c
+++ b/arch/mips/ralink/rt3883.c
-@@ -36,7 +36,7 @@ static struct rt2880_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 15, 2) };
+@@ -36,7 +36,7 @@ static struct rt2880_pmx_func uartlite_f
static struct rt2880_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) };
static struct rt2880_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 2) };
static struct rt2880_pmx_func lna_a_func[] = { FUNC("lna a", 0, 32, 3) };
static struct rt2880_pmx_func pci_func[] = {
FUNC("pci-dev", 0, 40, 32),
FUNC("pci-host2", 1, 40, 32),
---
-2.11.0
-
projects / openwrt / staging / noltari.git / commitdiff