drm/i915/gen9: Extend dmc debug mask to include cores

Cores need to be included into the debug mask. We don't exactly
know what it does but the spec says it must be enabled. So obey.

v2: Cores should be only set for BXT (Imre, Art)

Cc: Imre Deak <imre.deak@intel.com>
Cc: Runyan, Arthur J <arthur.j.runyan@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455877564-5128-1-git-send-email-mika.kuoppala@intel.com

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3774870477c1b493aade1f05aac323878e5573ff..f76cbf3e5d1e1999afa61b62bf9740c308e552bb 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7568,6 +7568,7 @@ enum skl_disp_power_wells {
 #define  DC_STATE_EN_UPTO_DC5_DC6_MASK   0x3
 
 #define  DC_STATE_DEBUG                  _MMIO(0x45520)
+#define  DC_STATE_DEBUG_MASK_CORES     (1<<0)
 #define  DC_STATE_DEBUG_MASK_MEMORY_UP (1<<1)
 
 /* Please see hsw_read_dcomp() and hsw_write_dcomp() before using this register,

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 814cf5ac1ef03ba8d764ba3acf858cdac0ed8f6b..089701b731123133d42f46be798a8a5f99876688 100644 (file)
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -456,15 +456,19 @@ static void assert_can_disable_dc9(struct drm_i915_private *dev_priv)
          */
 }
 
-static void gen9_set_dc_state_debugmask_memory_up(
-                       struct drm_i915_private *dev_priv)
+static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
 {
-       uint32_t val;
+       uint32_t val, mask;
+
+       mask = DC_STATE_DEBUG_MASK_MEMORY_UP;
+
+       if (IS_BROXTON(dev_priv))
+               mask |= DC_STATE_DEBUG_MASK_CORES;
 
        /* The below bit doesn't need to be cleared ever afterwards */
        val = I915_READ(DC_STATE_DEBUG);
-       if (!(val & DC_STATE_DEBUG_MASK_MEMORY_UP)) {
-               val |= DC_STATE_DEBUG_MASK_MEMORY_UP;
+       if ((val & mask) != mask) {
+               val |= mask;
                I915_WRITE(DC_STATE_DEBUG, val);
                POSTING_READ(DC_STATE_DEBUG);
        }
@@ -526,7 +530,7 @@ static void gen9_set_dc_state(struct drm_i915_private *dev_priv, uint32_t state)
                state = DC_STATE_EN_UPTO_DC5;
 
        if (state & DC_STATE_EN_UPTO_DC5_DC6_MASK)
-               gen9_set_dc_state_debugmask_memory_up(dev_priv);
+               gen9_set_dc_state_debugmask(dev_priv);
 
        val = I915_READ(DC_STATE_EN);
        DRM_DEBUG_KMS("Setting DC state from %02x to %02x\n",