static const struct bcma_device_id bgmac_bcma_tbl[] = {
BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_4706_MAC_GBIT, BCMA_ANY_REV, BCMA_ANY_CLASS),
-@@ -1441,7 +1445,7 @@ static int bgmac_probe(struct bcma_devic
+@@ -1445,7 +1449,7 @@ static int bgmac_probe(struct bcma_devic
int err;
/* We don't support 2nd, 3rd, ... units, SPROM has to be adjusted */
pr_err("Unsupported core_unit %d\n", core->core_unit);
return -ENOTSUPP;
}
-@@ -1476,8 +1480,7 @@ static int bgmac_probe(struct bcma_devic
- }
- bgmac->cmn = core->bus->drv_gmac_cmn.core;
-
-- bgmac->phyaddr = core->core_unit ? sprom->et1phyaddr :
-- sprom->et0phyaddr;
-+ bgmac->phyaddr = 30;
- bgmac->phyaddr &= BGMAC_PHY_MASK;
- if (bgmac->phyaddr == BGMAC_PHY_MASK) {
- bgmac_err(bgmac, "No PHY found\n");
-@@ -1527,8 +1530,7 @@ static int bgmac_probe(struct bcma_devic
+@@ -1541,8 +1545,7 @@ static int bgmac_probe(struct bcma_devic
/* TODO: reset the external phy. Specs are needed */
bgmac_phy_reset(bgmac);
-bgmac: add supprot for BCM4707
+From 2e3759f95d3c96282c19e6f57274d816c6cf1a0e Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Sun, 10 Nov 2013 21:13:20 +0100
+Subject: [PATCH 4/5] bgmac: reset all cores on Northstar SoC
+
+On the Northstar SoC (BCM4707 and BCM53018) we have to enable all GMAC
+cores when we just want to use on. We iterate over all the cores and
+activate them.
+
+Subject: [PATCH 5/5] bgmac: add support for Northstar SoC (BCM4707, BCM53018)
+
+This adds support for the Northstar SoC. This SoC does not have a PMU in
+bcma and no register on it should be called. In addition it support 2.5
+GBit/s Ethernet to the PHY.
+
+This GMAC core is not fully working there are still problems with the
+DMA controller.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
default:
bgmac_err(bgmac, "Unsupported speed: %d\n", bgmac->mac_speed);
}
-@@ -837,12 +840,25 @@ static void bgmac_mac_speed(struct bgmac
+@@ -837,12 +840,26 @@ static void bgmac_mac_speed(struct bgmac
static void bgmac_miiconfig(struct bgmac *bgmac)
{
+ if (ci->id == BCMA_CHIP_ID_BCM4707 ||
+ ci->id == BCMA_CHIP_ID_BCM53018) {
+ bcma_awrite32(core, BCMA_IOCTL,
-+ bcma_aread32(core, BCMA_IOCTL) | 0x44);
++ bcma_aread32(core, BCMA_IOCTL) | 0x40 |
++ BGMAC_BCMA_IOCTL_SW_CLKEN);
+ bgmac->mac_speed = SPEED_2500;
bgmac->mac_duplex = DUPLEX_FULL;
bgmac_mac_speed(bgmac);
+ } else {
-+ imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >>
-+ BGMAC_DS_MM_SHIFT;
++ imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) &
++ BGMAC_DS_MM_MASK) >> BGMAC_DS_MM_SHIFT;
+ if (imode == 0 || imode == 1) {
+ bgmac->mac_speed = SPEED_100;
+ bgmac->mac_duplex = DUPLEX_FULL;
}
}
-@@ -888,7 +904,8 @@ static void bgmac_chip_reset(struct bgma
-
- bcma_core_enable(core, flags);
+@@ -886,9 +903,14 @@ static void bgmac_chip_reset(struct bgma
+ flags |= BGMAC_BCMA_IOCTL_SW_RESET;
+ }
+- bcma_core_enable(core, flags);
+-
- if (core->id.rev > 2) {
-+ if (core->id.rev > 2 && ci->id != BCMA_CHIP_ID_BCM4707 &&
++ /* 3GMAC: for BCM4707, only do core reset at bgmac_probe() */
++ if (ci->id != BCMA_CHIP_ID_BCM4707)
++ bcma_core_enable(core, flags);
++
++ /* Request Misc PLL for corerev > 2 */
++ if (core->id.rev > 2 &&
++ ci->id != BCMA_CHIP_ID_BCM4707 &&
+ ci->id != BCMA_CHIP_ID_BCM53018) {
bgmac_set(bgmac, BCMA_CLKCTLST,
BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ);
bgmac_wait_value(bgmac->core, BCMA_CLKCTLST,
-@@ -1026,12 +1043,15 @@ static void bgmac_enable(struct bgmac *b
+@@ -1026,12 +1048,16 @@ static void bgmac_enable(struct bgmac *b
break;
}
+ ci->id != BCMA_CHIP_ID_BCM53018) {
+ rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
+ rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK;
-+ bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) / 1000000;
++ bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) /
++ 1000000;
+ mdp = (bp_clk * 128 / 1000) - 3;
+ rxq_ctl |= (mdp << BGMAC_RXQ_CTL_MDP_SHIFT);
+ bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl);
}
/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipinit */
-@@ -1421,6 +1441,25 @@ static int bgmac_probe(struct bcma_devic
- goto err_netdev_free;
+@@ -1366,6 +1392,7 @@ static int bgmac_probe(struct bcma_devic
+ struct bgmac *bgmac;
+ struct ssb_sprom *sprom = &core->bus->sprom;
+ u8 *mac = core->core_unit ? sprom->et1mac : sprom->et0mac;
++ struct bcma_chipinfo *ci = &core->bus->chipinfo;
+ int err;
+
+ /* We don't support 2nd, 3rd, ... units, SPROM has to be adjusted */
+@@ -1404,8 +1431,16 @@ static int bgmac_probe(struct bcma_devic
}
+ bgmac->cmn = core->bus->drv_gmac_cmn.core;
+
+- bgmac->phyaddr = core->core_unit ? sprom->et1phyaddr :
+- sprom->et0phyaddr;
++ /*
++ * Too much can go wrong in scanning MDC/MDIO playing "whos my phy?" .
++ * Instead, explicitly use the phy address 30.
++ */
++ if (ci->id == BCMA_CHIP_ID_BCM4707 || ci->id == BCMA_CHIP_ID_BCM53018)
++ bgmac->phyaddr = BGMAC_PHY_NOREGS;
++ else
++ bgmac->phyaddr = core->core_unit ? sprom->et1phyaddr :
++ sprom->et0phyaddr;
++
+ bgmac->phyaddr &= BGMAC_PHY_MASK;
+ if (bgmac->phyaddr == BGMAC_PHY_MASK) {
+ bgmac_err(bgmac, "No PHY found\n");
+@@ -1423,6 +1458,27 @@ static int bgmac_probe(struct bcma_devic
-+ /* Northstar, take all GMAC cores out of reset */
+ bgmac_chip_reset(bgmac);
+
++ /* For Northstar, we have to take all GMAC core out of reset */
+ if (core->id.id == BCMA_CHIP_ID_BCM4707 ||
+ core->id.id == BCMA_CHIP_ID_BCM53018) {
+ struct bcma_device *ns_core;
+ int ns_gmac;
+
++ /* Northstar has 4 GMAC cores */
+ for (ns_gmac = 0; ns_gmac < 4; ns_gmac++) {
-+ /* As northstar requirement, we have to reset all GAMCs before
-+ * accessing them. et_probe() call pci_enable_device() for etx
-+ * and do si_core_reset for GAMCx only. Then the other three
-+ * GAMCs didn't reset. We do it here.
++ /* As northstar requirement, we have to reset all GAMCs
++ * before accessing one. bgmac_chip_reset() call
++ * bcma_core_enable() for this core. Then the other
++ * three GAMCs didn't reset. We do it here.
+ */
-+ ns_core = bcma_find_core_unit(core->bus, BCMA_CORE_MAC_GBIT, ns_gmac);
-+ if (!bcma_core_is_enabled(ns_core)) {
++ ns_core = bcma_find_core_unit(core->bus,
++ BCMA_CORE_MAC_GBIT,
++ ns_gmac);
++ if (ns_core && !bcma_core_is_enabled(ns_core))
+ bcma_core_enable(ns_core, 0);
-+ }
+ }
+ }
+
- bgmac_chip_reset(bgmac);
-
err = bgmac_dma_alloc(bgmac);
+ if (err) {
+ bgmac_err(bgmac, "Unable to alloc memory for DMA\n");
--- a/drivers/net/ethernet/broadcom/bgmac.h
+++ b/drivers/net/ethernet/broadcom/bgmac.h
@@ -189,6 +189,7 @@
#include <bcm47xx_nvram.h>
static const struct bcma_device_id bgmac_bcma_tbl[] = {
-@@ -1375,6 +1376,17 @@ static void bgmac_mii_unregister(struct
+@@ -1381,6 +1382,17 @@ static void bgmac_mii_unregister(struct
mdiobus_free(mii_bus);
}
/**************************************************
* BCMA bus ops
**************************************************/
-@@ -1490,6 +1502,16 @@ static int bgmac_probe(struct bcma_devic
+@@ -1507,6 +1519,16 @@ static int bgmac_probe(struct bcma_devic
goto err_dma_free;
}
err = register_netdev(bgmac->net_dev);
if (err) {
bgmac_err(bgmac, "Cannot register net device\n");
-@@ -1519,6 +1541,10 @@ static void bgmac_remove(struct bcma_dev
+@@ -1536,6 +1558,10 @@ static void bgmac_remove(struct bcma_dev
{
struct bgmac *bgmac = bcma_get_drvdata(core);
-From ec12b94d22fa8715561bdffe6da0781dac08423e Mon Sep 17 00:00:00 2001
+From adada33c4ee27efdec0b08e43768a68285a5710d Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Sun, 10 Nov 2013 21:23:57 +0100
-Subject: [PATCH] bgmac: add some workaround for rev 4
+Date: Thu, 2 Jan 2014 19:49:56 +0100
+Subject: [PATCH 2/5] bgmac: initialize the DMA controller of core rev >= 4
----
- drivers/net/ethernet/broadcom/bgmac.c | 8 ++++----
- drivers/net/ethernet/broadcom/bgmac.h | 4 +++-
- 2 files changed, 7 insertions(+), 5 deletions(-)
+The DMA controller used in the device supported by GMAC with core rev
+>= 4 has some new options which are now set to the default values used
+in the Broadcom SDK.
+
+Subject: [PATCH 3/5] bgmac: add support for new BGMAC_CMDCFG_SR position on
+ core rev >= 4
+
+The BGMAC_CMDCFG_SR register is at a different position on core rev >= 4
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
--- a/drivers/net/ethernet/broadcom/bgmac.c
+++ b/drivers/net/ethernet/broadcom/bgmac.c
-@@ -97,6 +97,16 @@ static void bgmac_dma_tx_enable(struct b
+@@ -97,6 +97,19 @@ static void bgmac_dma_tx_enable(struct b
u32 ctl;
ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL);
+ if (bgmac->core->id.rev >= 4) {
+ ctl &= ~BGMAC_DMA_TX_BL_MASK;
+ ctl |= BGMAC_DMA_TX_BL_128 << BGMAC_DMA_TX_BL_SHIFT;
++
+ ctl &= ~BGMAC_DMA_TX_MR_MASK;
+ ctl |= BGMAC_DMA_TX_MR_2 << BGMAC_DMA_TX_MR_SHIFT;
++
+ ctl &= ~BGMAC_DMA_TX_PC_MASK;
+ ctl |= BGMAC_DMA_TX_PC_16 << BGMAC_DMA_TX_PC_SHIFT;
++
+ ctl &= ~BGMAC_DMA_TX_PT_MASK;
+ ctl |= BGMAC_DMA_TX_PT_8 << BGMAC_DMA_TX_PT_SHIFT;
+ }
ctl |= BGMAC_DMA_TX_ENABLE;
ctl |= BGMAC_DMA_TX_PARITY_DISABLE;
bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, ctl);
-@@ -246,6 +256,17 @@ static void bgmac_dma_rx_enable(struct b
- ctl |= BGMAC_DMA_RX_PARITY_DISABLE;
- ctl |= BGMAC_DMA_RX_OVERFLOW_CONT;
- ctl |= BGMAC_RX_FRAME_OFFSET << BGMAC_DMA_RX_FRAME_OFFSET_SHIFT;
-+
+@@ -241,6 +254,16 @@ static void bgmac_dma_rx_enable(struct b
+ u32 ctl;
+
+ ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL);
+ if (bgmac->core->id.rev >= 4) {
+ ctl &= ~BGMAC_DMA_RX_BL_MASK;
+ ctl |= BGMAC_DMA_RX_BL_128 << BGMAC_DMA_RX_BL_SHIFT;
+ ctl &= ~BGMAC_DMA_RX_PT_MASK;
+ ctl |= BGMAC_DMA_RX_PT_1 << BGMAC_DMA_RX_PT_SHIFT;
+ }
- bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL, ctl);
- }
-
-@@ -746,13 +767,13 @@ static void bgmac_cmdcfg_maskset(struct
+ ctl &= BGMAC_DMA_RX_ADDREXT_MASK;
+ ctl |= BGMAC_DMA_RX_ENABLE;
+ ctl |= BGMAC_DMA_RX_PARITY_DISABLE;
+@@ -746,13 +769,13 @@ static void bgmac_cmdcfg_maskset(struct
u32 cmdcfg = bgmac_read(bgmac, BGMAC_CMDCFG);
u32 new_val = (cmdcfg & mask) | set;
udelay(2);
}
-@@ -972,7 +993,7 @@ static void bgmac_chip_reset(struct bgma
+@@ -977,7 +1000,7 @@ static void bgmac_chip_reset(struct bgma
BGMAC_CMDCFG_PROM |
BGMAC_CMDCFG_NLC |
BGMAC_CMDCFG_CFE |
false);
bgmac->mac_speed = SPEED_UNKNOWN;
bgmac->mac_duplex = DUPLEX_UNKNOWN;
-@@ -1015,7 +1036,7 @@ static void bgmac_enable(struct bgmac *b
+@@ -1020,7 +1043,7 @@ static void bgmac_enable(struct bgmac *b
cmdcfg = bgmac_read(bgmac, BGMAC_CMDCFG);
bgmac_cmdcfg_maskset(bgmac, ~(BGMAC_CMDCFG_TE | BGMAC_CMDCFG_RE),
#define BGMAC_CMDCFG_HD 0x00000400 /* Set if in half duplex mode */
#define BGMAC_CMDCFG_HD_SHIFT 10
-#define BGMAC_CMDCFG_SR 0x00000800 /* Set to reset mode */
-+#define BGMAC_CMDCFG_SR_REVO 0x00000800 /* Set to reset mode, for other revs */
++#define BGMAC_CMDCFG_SR_REV0 0x00000800 /* Set to reset mode, for other revs */
+#define BGMAC_CMDCFG_SR_REV4 0x00002000 /* Set to reset mode, only for core rev 4 */
-+#define BGMAC_CMDCFG_SR(rev) ((rev == 4) ? BGMAC_CMDCFG_SR_REV4 : BGMAC_CMDCFG_SR_REVO)
++#define BGMAC_CMDCFG_SR(rev) ((rev == 4) ? BGMAC_CMDCFG_SR_REV4 : BGMAC_CMDCFG_SR_REV0)
#define BGMAC_CMDCFG_ML 0x00008000 /* Set to activate mac loopback mode */
#define BGMAC_CMDCFG_AE 0x00400000
#define BGMAC_CMDCFG_CFE 0x00800000
--- a/drivers/net/ethernet/broadcom/bgmac.c
+++ b/drivers/net/ethernet/broadcom/bgmac.c
-@@ -347,6 +347,7 @@ static int bgmac_dma_rx_read(struct bgma
+@@ -349,6 +349,7 @@ static int bgmac_dma_rx_read(struct bgma
struct sk_buff *skb = slot->skb;
struct bgmac_rx_header *rx;
u16 len, flags;
/* Unmap buffer to make it accessible to the CPU */
dma_sync_single_for_cpu(dma_dev, slot->dma_addr,
-@@ -355,6 +356,12 @@ static int bgmac_dma_rx_read(struct bgma
+@@ -357,6 +358,12 @@ static int bgmac_dma_rx_read(struct bgma
/* Get info from the header */
rx = (struct bgmac_rx_header *)skb->data;
len = le16_to_cpu(rx->len);
flags = le16_to_cpu(rx->flags);
do {
-@@ -362,7 +369,7 @@ static int bgmac_dma_rx_read(struct bgma
+@@ -364,7 +371,7 @@ static int bgmac_dma_rx_read(struct bgma
int err;
/* Check for poison and drop or pass the packet */
--- a/drivers/net/ethernet/broadcom/bgmac.c
+++ b/drivers/net/ethernet/broadcom/bgmac.c
-@@ -120,6 +120,7 @@ static netdev_tx_t bgmac_dma_tx_add(stru
+@@ -123,6 +123,7 @@ static netdev_tx_t bgmac_dma_tx_add(stru
struct net_device *net_dev = bgmac->net_dev;
struct bgmac_dma_desc *dma_desc;
struct bgmac_slot_info *slot;
u32 ctl0, ctl1;
int free_slots;
-@@ -160,6 +161,8 @@ static netdev_tx_t bgmac_dma_tx_add(stru
+@@ -163,6 +164,8 @@ static netdev_tx_t bgmac_dma_tx_add(stru
dma_desc->ctl0 = cpu_to_le32(ctl0);
dma_desc->ctl1 = cpu_to_le32(ctl1);
netdev_sent_queue(net_dev, skb->len);
wmb();
-@@ -311,6 +314,8 @@ static void bgmac_dma_rx_setup_desc(stru
+@@ -313,6 +316,8 @@ static void bgmac_dma_rx_setup_desc(stru
struct bgmac_dma_ring *ring, int desc_idx)
{
struct bgmac_dma_desc *dma_desc = ring->cpu_base + desc_idx;
u32 ctl0 = 0, ctl1 = 0;
if (desc_idx == ring->num_slots - 1)
-@@ -325,6 +330,8 @@ static void bgmac_dma_rx_setup_desc(stru
+@@ -327,6 +332,8 @@ static void bgmac_dma_rx_setup_desc(stru
dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[desc_idx].dma_addr));
dma_desc->ctl0 = cpu_to_le32(ctl0);
dma_desc->ctl1 = cpu_to_le32(ctl1);
projects / openwrt / staging / ansuel.git / commitdiff