#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR|0x00000801) /* Port-size=8bit, MSEL=GPCM */
#define CONFIG_SYS_OR1_PRELIM 0xFFFFE8F0 /* length 32K */
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/
#undef CONFIG_SYS_RAMBOOT
#endif
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK
#define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/
#define PIXIS_VCLKL 0x1A /* VELA VCLKL register */
#define CONFIG_SYS_PIXIS_VBOOT_MASK 0xc0
-/* define to use L1 as initial stack */
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */
#define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */
#define CONFIG_SYS_OR4_PRELIM 0xffffe1f1
#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000)
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#define CONFIG_SYS_OR4_PRELIM 0xffffe1f1
#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000)
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#define CONFIG_SYS_BR3_PRELIM 0xf8000801
#define CONFIG_SYS_OR3_PRELIM 0xfff00ff7
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER)
-/* define to use L1 as initial stack */
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xf4010000 /* Initial L1 address */
#define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */
#define CONFIG_SYS_BR3_PRELIM 0xf8000801
#define CONFIG_SYS_OR3_PRELIM 0xfff00ff7
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#define CONFIG_SYS_BR3_PRELIM 0xf8000801
#define CONFIG_SYS_OR3_PRELIM 0xfff00ff7
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#define CONFIG_SYS_OR4_PRELIM 0xffffe1f1
#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000)
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#define CONFIG_SYS_BR5_PRELIM 0xf8010801
#define CONFIG_SYS_OR5_PRELIM 0xffff69f7
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
| PIXIS_VCFGEN1_TSEC3SER \
| PIXIS_VCFGEN1_TSEC4SER)
-/* define to use L1 as initial stack */
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */
#define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */
#undef CONFIG_CLOCKS_IN_MHZ
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#ifndef CONFIG_SYS_INIT_RAM_LOCK
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#undef CONFIG_CLOCKS_IN_MHZ
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#ifndef CONFIG_SYS_INIT_RAM_LOCK
#define CONFIG_SYS_INIT_RAM_ADDR 0x0fd00000 /* Initial RAM address */
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
#undef CONFIG_SYS_RAMBOOT
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK
#define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#define CONFIG_SYS_BCSR ((CONFIG_SYS_BR5_PRELIM & 0xff000000)|0x00400000)
/* the size of CS5 needs to be >= 16M for TLB and LAW setups */
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#undef CONFIG_SYS_RAMBOOT
#endif
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/
#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_CCSRBAR \
+ 0x04010000) /* Initial RAM address */
#undef CONFIG_SYS_RAMBOOT
#endif
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/
| CONFIG_SYS_LBC_LSDMR_RFEN \
)
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#define CONFIG_SYS_BCSR ((CONFIG_SYS_BR5_PRELIM & 0xff000000)|0x00400000)
/* the size of CS5 needs to be >= 16M for TLB and LAW setups */
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#undef CONFIG_CLOCKS_IN_MHZ
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#ifndef CONFIG_SYS_INIT_RAM_LOCK
#define CONFIG_SYS_INIT_RAM_ADDR 0x0fd00000 /* Initial RAM address */
#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End used area in RAM */
#define CONFIG_SYS_LBC_LSDMR_4 0x1861b723
#define CONFIG_SYS_LBC_LSDMR_5 0x4061b723
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0x60000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */
#define CONFIG_SYS_LBC_LSDMR_4 0x1861b723
#define CONFIG_SYS_LBC_LSDMR_5 0x4061b723
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0x60000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */