Patches automatically rebased.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
-LINUX_VERSION-5.15 = .31
-LINUX_KERNEL_HASH-5.15.31 = f621384b47d5bed927910bf5211e7b4ccac925f28218e483bb1a9c484b246b88
+LINUX_VERSION-5.15 = .32
+LINUX_KERNEL_HASH-5.15.32 = 1463cdfa223088610dd65d3eadeffa44ec49746091b8ae8ddac6f3070d17df86
return -EIO;
}
offset -= master->erasesize;
-@@ -108,10 +113,6 @@ nogood:
+@@ -108,10 +114,6 @@ nogood:
goto nogood;
}
}
pr_notice("Searching for RedBoot partition table in %s at offset 0x%lx\n",
master->name, offset);
-@@ -183,6 +184,12 @@ nogood:
+@@ -183,6 +185,12 @@ nogood:
}
if (i == numslots) {
/* Didn't find it */
u16 addr_type = 0;
u32 timestamp;
u8 l4proto = 0;
-@@ -329,10 +372,14 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -326,10 +369,14 @@ mtk_flow_offload_replace(struct mtk_eth
if (data.pppoe.num == 1)
mtk_foe_entry_set_pppoe(&foe, data.pppoe.sid);
entry = kzalloc(sizeof(*entry), GFP_KERNEL);
if (!entry)
return -ENOMEM;
-@@ -346,6 +393,7 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -343,6 +390,7 @@ mtk_flow_offload_replace(struct mtk_eth
}
entry->hash = hash;
err = rhashtable_insert_fast(ð->flow_table, &entry->node,
mtk_flow_ht_params);
if (err < 0)
-@@ -356,6 +404,8 @@ clear_flow:
+@@ -353,6 +401,8 @@ clear_flow:
mtk_foe_entry_clear(ð->ppe, hash);
free:
kfree(entry);
return err;
}
-@@ -372,6 +422,8 @@ mtk_flow_offload_destroy(struct mtk_eth
+@@ -369,6 +419,8 @@ mtk_flow_offload_destroy(struct mtk_eth
mtk_foe_entry_clear(ð->ppe, entry->hash);
rhashtable_remove_fast(ð->flow_table, &entry->node,
mtk_flow_ht_params);
static void
mtk_flow_offload_mangle_eth(const struct flow_action_entry *act, void *eth)
{
-@@ -299,6 +313,9 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -296,6 +310,9 @@ mtk_flow_offload_replace(struct mtk_eth
case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
offload_type = MTK_PPE_PKT_TYPE_IPV4_HNAPT;
break;
default:
return -EOPNOTSUPP;
}
-@@ -334,6 +351,17 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -331,6 +348,17 @@ mtk_flow_offload_replace(struct mtk_eth
mtk_flow_set_ipv4_addr(&foe, &data, false);
}
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
-@@ -566,10 +566,13 @@ mtk_eth_setup_tc_block(struct net_device
+@@ -563,10 +563,13 @@ mtk_eth_setup_tc_block(struct net_device
int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type,
void *type_data)
{
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
-@@ -414,7 +414,7 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -411,7 +411,7 @@ mtk_flow_offload_replace(struct mtk_eth
entry->cookie = f->cookie;
timestamp = mtk_eth_timestamp(eth);
if (hash < 0) {
err = hash;
goto free;
-@@ -429,7 +429,7 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -426,7 +426,7 @@ mtk_flow_offload_replace(struct mtk_eth
return 0;
clear_flow:
free:
kfree(entry);
if (wed_index >= 0)
-@@ -447,7 +447,7 @@ mtk_flow_offload_destroy(struct mtk_eth
+@@ -444,7 +444,7 @@ mtk_flow_offload_destroy(struct mtk_eth
if (!entry)
return -ENOENT;
rhashtable_remove_fast(ð->flow_table, &entry->node,
mtk_flow_ht_params);
if (entry->wed_index >= 0)
-@@ -469,7 +469,7 @@ mtk_flow_offload_stats(struct mtk_eth *e
+@@ -466,7 +466,7 @@ mtk_flow_offload_stats(struct mtk_eth *e
if (!entry)
return -ENOENT;
if (timestamp < 0)
return -ETIMEDOUT;
-@@ -525,7 +525,7 @@ mtk_eth_setup_tc_block(struct net_device
+@@ -522,7 +522,7 @@ mtk_eth_setup_tc_block(struct net_device
struct flow_block_cb *block_cb;
flow_setup_cb_t *cb;
return -EOPNOTSUPP;
if (f->binder_type != FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
-@@ -577,7 +577,7 @@ int mtk_eth_setup_tc(struct net_device *
+@@ -574,7 +574,7 @@ int mtk_eth_setup_tc(struct net_device *
int mtk_eth_offload_init(struct mtk_eth *eth)
{
int i;
if (rhashtable_lookup(ð->flow_table, &f->cookie, mtk_flow_ht_params))
-@@ -413,23 +398,21 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -410,23 +395,21 @@ mtk_flow_offload_replace(struct mtk_eth
return -ENOMEM;
entry->cookie = f->cookie;
free:
kfree(entry);
if (wed_index >= 0)
-@@ -447,7 +430,7 @@ mtk_flow_offload_destroy(struct mtk_eth
+@@ -444,7 +427,7 @@ mtk_flow_offload_destroy(struct mtk_eth
if (!entry)
return -ENOENT;
rhashtable_remove_fast(ð->flow_table, &entry->node,
mtk_flow_ht_params);
if (entry->wed_index >= 0)
-@@ -461,7 +444,6 @@ static int
+@@ -458,7 +441,6 @@ static int
mtk_flow_offload_stats(struct mtk_eth *eth, struct flow_cls_offload *f)
{
struct mtk_flow_entry *entry;
u32 idle;
entry = rhashtable_lookup(ð->flow_table, &f->cookie,
-@@ -469,11 +451,7 @@ mtk_flow_offload_stats(struct mtk_eth *e
+@@ -466,11 +448,7 @@ mtk_flow_offload_stats(struct mtk_eth *e
if (!entry)
return -ENOENT;
struct {
u16 id;
__be16 proto;
-@@ -260,9 +262,45 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -257,9 +259,45 @@ mtk_flow_offload_replace(struct mtk_eth
return -EOPNOTSUPP;
}
if (act->mangle.htype == FLOW_ACT_MANGLE_HDR_TYPE_ETH)
mtk_flow_offload_mangle_eth(act, &data.eth);
break;
-@@ -294,17 +332,6 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -291,17 +329,6 @@ mtk_flow_offload_replace(struct mtk_eth
}
}
if (!is_valid_ether_addr(data.eth.h_source) ||
!is_valid_ether_addr(data.eth.h_dest))
return -EINVAL;
-@@ -318,10 +345,13 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -315,10 +342,13 @@ mtk_flow_offload_replace(struct mtk_eth
if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
struct flow_match_ports ports;
return -EOPNOTSUPP;
}
-@@ -351,6 +381,9 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -348,6 +378,9 @@ mtk_flow_offload_replace(struct mtk_eth
if (act->id != FLOW_ACTION_MANGLE)
continue;
switch (act->mangle.htype) {
case FLOW_ACT_MANGLE_HDR_TYPE_TCP:
case FLOW_ACT_MANGLE_HDR_TYPE_UDP:
-@@ -376,6 +409,9 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -373,6 +406,9 @@ mtk_flow_offload_replace(struct mtk_eth
return err;
}
--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
-@@ -61,6 +61,10 @@
+@@ -25,6 +25,10 @@
i2c2 = &i2c2;
rtc0 = &rtc_i2c;
rtc1 = &snvs_rtc;
};
chosen {
-@@ -128,22 +132,22 @@
+@@ -92,22 +96,22 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds_ixora>;
};
--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
-@@ -60,6 +60,10 @@
+@@ -24,6 +24,10 @@
i2c2 = &i2c2;
rtc0 = &rtc_i2c;
rtc1 = &snvs_rtc;
};
chosen {
-@@ -127,22 +131,22 @@
+@@ -91,22 +95,22 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds_ixora>;
--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
-@@ -74,7 +74,7 @@
+@@ -38,7 +38,7 @@
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
wakeup {
label = "Wake-Up";
-@@ -83,6 +83,13 @@
+@@ -47,6 +47,13 @@
debounce-interval = <10>;
wakeup-source;
};
};
lcd_display: disp0 {
-@@ -298,4 +305,10 @@
+@@ -275,4 +282,10 @@
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
>;
};
};
--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
-@@ -73,7 +73,7 @@
+@@ -37,7 +37,7 @@
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
wakeup {
label = "Wake-Up";
-@@ -82,6 +82,13 @@
+@@ -46,6 +46,13 @@
debounce-interval = <10>;
wakeup-source;
};
};
lcd_display: disp0 {
-@@ -299,4 +306,10 @@
+@@ -276,4 +283,10 @@
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
>;
};
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
-@@ -321,7 +321,7 @@ config ARCH_MULTIPLATFORM
+@@ -317,7 +317,7 @@ config ARCH_MULTIPLATFORM
select ARCH_SELECT_MEMORY_MODEL
select ARM_HAS_SG_CHAIN
select ARM_PATCH_PHYS_VIRT
+ select AUTO_ZRELADDR if !ARCH_QCOM
select TIMER_OF
select COMMON_CLK
- select GENERIC_CLOCKEVENTS
+ select GENERIC_IRQ_MULTI_HANDLER
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
-@@ -251,9 +251,11 @@ MACHINE := arch/arm/mach-$(word 1,$(mac
+@@ -237,9 +237,11 @@ MACHINE := arch/arm/mach-$(word 1,$(mac
else
MACHINE :=
endif
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
-@@ -1780,6 +1780,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
+@@ -1727,6 +1727,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
The command-line arguments provided by the boot loader will be
appended to the the device tree bootargs property.
}
--- a/init/main.c
+++ b/init/main.c
-@@ -110,6 +110,10 @@
+@@ -112,6 +112,10 @@
#include <kunit/test.h>
static int kernel_init(void *);
extern void init_IRQ(void);
-@@ -906,6 +910,18 @@ asmlinkage __visible void __init __no_sa
+@@ -991,6 +995,18 @@ asmlinkage __visible void __init __no_sa
pr_notice("Kernel command line: %s\n", saved_command_line);
/* parameters may set static keys */
jump_label_init();
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
-@@ -955,8 +955,29 @@ dtb-$(CONFIG_ARCH_QCOM) += \
+@@ -956,8 +956,29 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq4019-ap.dk04.1-c3.dtb \
qcom-ipq4019-ap.dk07.1-c1.dtb \
qcom-ipq4019-ap.dk07.1-c2.dtb \
reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
regulator;
};
-@@ -533,7 +533,7 @@
+@@ -530,7 +536,7 @@
status = "disabled";
};
reg = <0x37600000 0x200000>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
-@@ -1050,8 +1050,6 @@
+@@ -1065,8 +1106,6 @@
clocks = <&gcc USB30_0_UTMI_CLK>;
clock-names = "ref";
#phy-cells = <0>;
- status = "disabled";
};
- ss_phy_0: usb3phy@100f8830 {
-@@ -1055,8 +1055,6 @@
- clocks = <&gcc USB30_0_MASTER_CLK>;
+ ss_phy_0: phy@100f8830 {
+@@ -1075,8 +1114,6 @@
+ clocks = <&gcc USB30_0_MASTER_CLK>;
clock-names = "ref";
#phy-cells = <0>;
-
};
usb3_0: usb3@100f8800 {
-@@ -1176,7 +1217,7 @@
+@@ -1176,7 +1213,7 @@
};
amba: amba {
#address-cells = <1>;
#size-cells = <1>;
ranges;
-@@ -1195,7 +1236,6 @@
+@@ -1195,7 +1232,6 @@
non-removable;
cap-sd-highspeed;
cap-mmc-highspeed;
gsbi2: gsbi@12480000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <2>;
-@@ -568,6 +910,33 @@
+@@ -637,6 +813,33 @@
};
};
gsbi7: gsbi@16600000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";
-@@ -589,6 +958,19 @@
+@@ -658,6 +861,19 @@
clock-names = "core", "iface";
status = "disabled";
};
+ };
};
- sata_phy: sata-phy@1b400000 {
-@@ -761,6 +937,17 @@
+ rng@1a500000 {
+@@ -761,6 +977,17 @@
};
};
rpm: rpm@108000 {
compatible = "qcom,rpm-ipq8064";
reg = <0x108000 0x1000>;
-@@ -828,6 +1015,11 @@
+@@ -828,6 +1055,11 @@
clock-output-names = "acpu_l2_aux";
};
lcc: clock-controller@28000000 {
compatible = "qcom,lcc-ipq8064";
reg = <0x28000000 0x1000>;
-@@ -835,6 +1027,11 @@
+@@ -835,6 +1067,11 @@
#reset-cells = <1>;
};
pcie0: pci@1b500000 {
compatible = "qcom,pcie-ipq8064";
reg = <0x1b500000 0x1000
-@@ -1188,6 +1385,21 @@
+@@ -1184,6 +1421,21 @@
};
};
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
regulator-name = "SDCC Power";
-@@ -1262,4 +1474,17 @@
+@@ -1258,4 +1510,17 @@
};
};
};
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
-@@ -150,6 +150,18 @@ config ARM_QCOM_CPUFREQ_HW
+@@ -172,6 +172,18 @@ config ARM_QCOM_CPUFREQ_HW
The driver implements the cpufreq interface for this HW engine.
Say Y if you want to support CPUFreq HW.
config ARM_RASPBERRYPI_CPUFREQ
tristate "Raspberry Pi cpufreq support"
depends on CLK_RASPBERRYPI || COMPILE_TEST
-@@ -339,4 +351,4 @@ config ARM_PXA2xx_CPUFREQ
+@@ -356,4 +368,4 @@ config ARM_PXA2xx_CPUFREQ
help
This add the CPUFreq driver support for Intel PXA2xx SOCs.
obj-$(CONFIG_ARM_RASPBERRYPI_CPUFREQ) += raspberrypi-cpufreq.o
obj-$(CONFIG_ARM_S3C2410_CPUFREQ) += s3c2410-cpufreq.o
obj-$(CONFIG_ARM_S3C2412_CPUFREQ) += s3c2412-cpufreq.o
-@@ -86,6 +87,7 @@ obj-$(CONFIG_ARM_TEGRA186_CPUFREQ) += te
+@@ -85,6 +86,7 @@ obj-$(CONFIG_ARM_TEGRA186_CPUFREQ) += te
obj-$(CONFIG_ARM_TEGRA194_CPUFREQ) += tegra194-cpufreq.o
obj-$(CONFIG_ARM_TI_CPUFREQ) += ti-cpufreq.o
obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ) += vexpress-spc-cpufreq.o
#include "cpufreq-dt.h"
-@@ -68,6 +69,13 @@ static int set_target(struct cpufreq_pol
+@@ -74,6 +75,13 @@ static int set_target(struct cpufreq_pol
goto l2_scale_fail;
}
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
-@@ -159,6 +159,11 @@
+@@ -163,6 +163,11 @@
/* NAND_CTRL bits */
#define BAM_MODE_EN BIT(0)
/*
* the NAND controller performs reads/writes with ECC in 516 byte chunks.
* the driver calls the chunks 'step' or 'codeword' interchangeably
-@@ -430,6 +435,13 @@ struct qcom_nand_controller {
+@@ -443,6 +448,13 @@ struct qcom_nand_controller {
* @cfg0, cfg1, cfg0_raw..: NANDc register configurations needed for
* ecc/non-ecc mode for the current nand flash
* device
*/
struct qcom_nand_host {
struct nand_chip chip;
-@@ -452,6 +464,9 @@ struct qcom_nand_host {
+@@ -465,6 +477,9 @@ struct qcom_nand_host {
u32 ecc_bch_cfg;
u32 clrflashstatus;
u32 clrreadstatus;
};
/*
-@@ -475,13 +490,15 @@ struct qcom_nand_host {
+@@ -474,6 +489,7 @@ struct qcom_nand_host {
* @is_bam - whether NAND controller is using BAM
* @is_qpic - whether NAND CTRL is part of qpic IP
* @qpic_v2 - flag to indicate QPIC IP version 2
* @dev_cmd_reg_start - NAND_DEV_CMD_* registers starting offset
*/
struct qcom_nandc_props {
- u32 ecc_modes;
+@@ -481,6 +497,7 @@ struct qcom_nandc_props {
bool is_bam;
bool is_qpic;
bool qpic_v2;
u32 dev_cmd_reg_start;
};
-@@ -1604,7 +1621,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *
+@@ -1691,7 +1708,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *
data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
oob_size1 = host->bbm_size;
data_size2 = ecc->size - data_size1 -
((ecc->steps - 1) * 4);
oob_size2 = (ecc->steps * 4) + host->ecc_bytes_hw +
-@@ -1685,7 +1702,7 @@ check_for_erased_page(struct qcom_nand_h
+@@ -1772,7 +1789,7 @@ check_for_erased_page(struct qcom_nand_h
}
for_each_set_bit(cw, &uncorrectable_cws, ecc->steps) {
data_size = ecc->size - ((ecc->steps - 1) * 4);
oob_size = (ecc->steps * 4) + host->ecc_bytes_hw;
} else {
-@@ -1844,7 +1861,7 @@ static int read_page_ecc(struct qcom_nan
+@@ -1930,7 +1947,7 @@ static int read_page_ecc(struct qcom_nan
for (i = 0; i < ecc->steps; i++) {
int data_size, oob_size;
data_size = ecc->size - ((ecc->steps - 1) << 2);
oob_size = (ecc->steps << 2) + host->ecc_bytes_hw +
host->spare_bytes;
-@@ -1941,6 +1958,30 @@ static int copy_last_cw(struct qcom_nand
+@@ -2027,6 +2044,30 @@ static int copy_last_cw(struct qcom_nand
return ret;
}
/* implements ecc->read_page() */
static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf,
int oob_required, int page)
-@@ -1949,6 +1990,9 @@ static int qcom_nandc_read_page(struct n
+@@ -2035,6 +2076,9 @@ static int qcom_nandc_read_page(struct n
struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
u8 *data_buf, *oob_buf = NULL;
nand_read_page_op(chip, page, 0, NULL, 0);
data_buf = buf;
oob_buf = oob_required ? chip->oob_poi : NULL;
-@@ -1968,6 +2012,9 @@ static int qcom_nandc_read_page_raw(stru
+@@ -2054,6 +2098,9 @@ static int qcom_nandc_read_page_raw(stru
int cw, ret;
u8 *data_buf = buf, *oob_buf = chip->oob_poi;
for (cw = 0; cw < ecc->steps; cw++) {
ret = qcom_nandc_read_cw_raw(mtd, chip, data_buf, oob_buf,
page, cw);
-@@ -1988,6 +2035,9 @@ static int qcom_nandc_read_oob(struct na
+@@ -2074,6 +2121,9 @@ static int qcom_nandc_read_oob(struct na
struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
struct nand_ecc_ctrl *ecc = &chip->ecc;
clear_read_regs(nandc);
clear_bam_transaction(nandc);
-@@ -2008,6 +2058,9 @@ static int qcom_nandc_write_page(struct
+@@ -2094,6 +2144,9 @@ static int qcom_nandc_write_page(struct
u8 *data_buf, *oob_buf;
int i, ret;
nand_prog_page_begin_op(chip, page, 0, NULL, 0);
clear_read_regs(nandc);
-@@ -2023,7 +2076,7 @@ static int qcom_nandc_write_page(struct
+@@ -2109,7 +2162,7 @@ static int qcom_nandc_write_page(struct
for (i = 0; i < ecc->steps; i++) {
int data_size, oob_size;
data_size = ecc->size - ((ecc->steps - 1) << 2);
oob_size = (ecc->steps << 2) + host->ecc_bytes_hw +
host->spare_bytes;
-@@ -2080,6 +2133,9 @@ static int qcom_nandc_write_page_raw(str
+@@ -2166,6 +2219,9 @@ static int qcom_nandc_write_page_raw(str
u8 *data_buf, *oob_buf;
int i, ret;
nand_prog_page_begin_op(chip, page, 0, NULL, 0);
clear_read_regs(nandc);
clear_bam_transaction(nandc);
-@@ -2098,7 +2154,7 @@ static int qcom_nandc_write_page_raw(str
+@@ -2184,7 +2240,7 @@ static int qcom_nandc_write_page_raw(str
data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
oob_size1 = host->bbm_size;
data_size2 = ecc->size - data_size1 -
((ecc->steps - 1) << 2);
oob_size2 = (ecc->steps << 2) + host->ecc_bytes_hw +
-@@ -2158,6 +2214,9 @@ static int qcom_nandc_write_oob(struct n
+@@ -2244,6 +2300,9 @@ static int qcom_nandc_write_oob(struct n
int data_size, oob_size;
int ret;
host->use_ecc = true;
clear_bam_transaction(nandc);
-@@ -2806,6 +2865,7 @@ static int qcom_nand_host_init_and_regis
+@@ -2899,6 +2958,7 @@ static int qcom_nand_host_init_and_regis
struct nand_chip *chip = &host->chip;
struct mtd_info *mtd = nand_to_mtd(chip);
struct device *dev = nandc->dev;
int ret;
ret = of_property_read_u32(dn, "reg", &host->cs);
-@@ -2866,6 +2926,17 @@ static int qcom_nand_host_init_and_regis
+@@ -2960,6 +3020,17 @@ static int qcom_nand_host_init_and_regis
if (ret)
nand_cleanup(chip);
return ret;
}
-@@ -3032,6 +3103,7 @@ static int qcom_nandc_remove(struct plat
+@@ -3125,6 +3196,7 @@ static int qcom_nandc_remove(struct plat
static const struct qcom_nandc_props ipq806x_nandc_props = {
.ecc_modes = (ECC_RS_4BIT | ECC_BCH_8BIT),
.is_bam = false,
--- a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
+++ b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
-@@ -77,6 +77,14 @@ Optional properties:
- description:
+@@ -78,6 +78,14 @@ allOf:
Must contain the ADM data type CRCI block instance number
specified for the NAND controller on the given platform
-+
+
+ qcom,boot_pages_size:
+ description:
+ Should contain the size of the total boot partitions
+ should be used. The boot layout is considered from the
+ start of the nand to the value set in this binding.
+ Only used in combination with 'nand-is-boot-medium'.
-
++
- if:
properties:
-@@ -135,6 +135,9 @@ nand-controller@1ac00000 {
+ compatible:
+@@ -135,6 +143,9 @@ examples:
nand-ecc-strength = <4>;
nand-bus-width = <8>;
+
partitions {
compatible = "fixed-partitions";
+ #address-cells = <1>;
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
-@@ -139,7 +139,11 @@
+@@ -50,7 +50,11 @@ static struct mtd_info *allocate_partiti
/* allocate the partition structure */
child = kzalloc(sizeof(*child), GFP_KERNEL);
+- name = kstrdup(part->name, GFP_KERNEL);
+ /* "rootfs" conflicts with OpenWrt auto mounting */
+ if (mtd_type_is_nand(parent) && !strcmp(part->name, "rootfs"))
+ name = "ubi";
+ else
+ name = kstrdup(part->name, GFP_KERNEL);
-- name = kstrdup(part->name, GFP_KERNEL);
if (!name || !child) {
printk(KERN_ERR"memory allocation error while creating partitions for \"%s\"\n",
parent->name);
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -1163,7 +1163,7 @@
+@@ -1086,7 +1086,7 @@
#address-cells = <3>;
#size-cells = <2>;
0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-@@ -1214,7 +1214,7 @@
+@@ -1137,7 +1137,7 @@
#address-cells = <3>;
#size-cells = <2>;
0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
-@@ -1265,7 +1265,7 @@
+@@ -1188,7 +1188,7 @@
#address-cells = <3>;
#size-cells = <2>;
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
-@@ -918,8 +918,6 @@ int __init init_common(struct tsens_priv
+@@ -917,8 +917,6 @@ int __init init_common(struct tsens_priv
if (tsens_version(priv) >= VER_0_1)
tsens_enable_irq(priv);
err_put_device:
put_device(&op->dev);
return ret;
-@@ -1155,7 +1153,12 @@ static int tsens_probe(struct platform_d
+@@ -1157,7 +1155,12 @@ static int tsens_probe(struct platform_d
}
}
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
-@@ -692,7 +692,7 @@ static int dbg_version_show(struct seq_f
+@@ -691,7 +691,7 @@ static int dbg_version_show(struct seq_f
return ret;
seq_printf(s, "%d.%d.%d\n", maj_ver, min_ver, step_ver);
} else {
}
return 0;
-@@ -704,21 +704,17 @@ DEFINE_SHOW_ATTRIBUTE(dbg_sensors);
+@@ -703,21 +703,17 @@ DEFINE_SHOW_ATTRIBUTE(dbg_sensors);
static void tsens_debug_init(struct platform_device *pdev)
{
struct tsens_priv *priv = platform_get_drvdata(pdev);
obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
-@@ -189,6 +189,13 @@ config QCOM_SOCINFO
+@@ -190,6 +190,13 @@ config QCOM_SOCINFO
Say yes here to support the Qualcomm socinfo driver, providing
information about the SoC to user space.