drm/i915: Rename the forcewake get/put functions
authorMika Kuoppala <mika.kuoppala@linux.intel.com>
Fri, 16 Jan 2015 09:34:40 +0000 (11:34 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 27 Jan 2015 08:50:57 +0000 (09:50 +0100)
We have multiple forcewake domains now on recent gens. Change the
function naming to reflect this.

v2: More verbose names (Chris)
v3: Rebase
v4: Rebase
v5: Add documentation for forcewake_get/put

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Deepak S <deepak.s@linux.intel.com> (v2)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_fbc.c
drivers/gpu/drm/i915/intel_lrc.c
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/intel_ringbuffer.c
drivers/gpu/drm/i915/intel_uncore.c

index db7fcf385cd8dfbe7b3c3af3990f1c4c1991b311..c39f9c560a8584349a8ead827a4e0f8ab19489f8 100644 (file)
@@ -1105,7 +1105,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
                if (ret)
                        goto out;
 
-               gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+               intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
                reqf = I915_READ(GEN6_RPNSWREQ);
                reqf &= ~GEN6_TURBO_DISABLE;
@@ -1132,7 +1132,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
                        cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
                cagf *= GT_FREQUENCY_MULTIPLIER;
 
-               gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
+               intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
                mutex_unlock(&dev->struct_mutex);
 
                if (IS_GEN6(dev) || IS_GEN7(dev)) {
@@ -4322,7 +4322,7 @@ static int i915_forcewake_open(struct inode *inode, struct file *file)
                return 0;
 
        intel_runtime_pm_get(dev_priv);
-       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
        return 0;
 }
@@ -4335,7 +4335,7 @@ static int i915_forcewake_release(struct inode *inode, struct file *file)
        if (INTEL_INFO(dev)->gen < 6)
                return 0;
 
-       gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
        intel_runtime_pm_put(dev_priv);
 
        return 0;
index 55a3fef075ae39f412ee5daca44958bb50e9bb72..6484229dd10d6bfb05be8d2032250cf3eb6e2696 100644 (file)
@@ -1431,7 +1431,7 @@ static int intel_runtime_suspend(struct device *device)
                intel_opregion_notify_adapter(dev, PCI_D3hot);
        }
 
-       assert_force_wake_inactive(dev_priv);
+       assert_forcewakes_inactive(dev_priv);
 
        DRM_DEBUG_KMS("Device suspended\n");
        return 0;
index c5dae9603a99434750a22d4f2d318ece8bceb4a2..0575c529a9a5d545302b1820d1d547d096280da1 100644 (file)
@@ -2564,6 +2564,11 @@ extern void intel_uncore_check_errors(struct drm_device *dev);
 extern void intel_uncore_fini(struct drm_device *dev);
 extern void intel_uncore_forcewake_reset(struct drm_device *dev, bool restore);
 const char *intel_uncore_forcewake_domain_to_str(const int domain_id);
+void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
+                               unsigned fw_domains);
+void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
+                               unsigned fw_domains);
+void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
 
 void
 i915_enable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe,
@@ -3195,16 +3200,6 @@ extern void intel_display_print_error_state(struct drm_i915_error_state_buf *e,
                                            struct drm_device *dev,
                                            struct intel_display_error_state *error);
 
-/* On SNB platform, before reading ring registers forcewake bit
- * must be set to prevent GT core from power down and stale values being
- * returned.
- */
-void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv,
-                           unsigned fw_domains);
-void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv,
-                           unsigned fw_domains);
-void assert_force_wake_inactive(struct drm_i915_private *dev_priv);
-
 int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val);
 int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u32 mbox, u32 val);
 
index 61b123f1a6527a9de89836cbc37fb623529df873..8c5dfec98de1d6fec29f0dcd688a68f644f4fc11 100644 (file)
@@ -7871,7 +7871,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
         * Make sure we're not on PC8 state before disabling PC8, otherwise
         * we'll hang the machine. To prevent PC8 state, just enable force_wake.
         */
-       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
        if (val & LCPLL_POWER_DOWN_ALLOW) {
                val &= ~LCPLL_POWER_DOWN_ALLOW;
@@ -7901,7 +7901,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
                        DRM_ERROR("Switching back to LCPLL failed\n");
        }
 
-       gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 }
 
 /*
index 5b1d7c4cfae6a67b177d563da02750cf10645166..ed9a012d58ae98a8f9afc8b8ef0affd8cd547b4e 100644 (file)
@@ -182,7 +182,7 @@ static void snb_fbc_blit_update(struct drm_device *dev)
 
        /* Blitter is part of Media powerwell on VLV. No impact of
         * his param in other platforms for now */
-       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_MEDIA);
+       intel_uncore_forcewake_get(dev_priv, FORCEWAKE_MEDIA);
 
        blt_ecoskpd = I915_READ(GEN6_BLITTER_ECOSKPD);
        blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY <<
@@ -195,7 +195,7 @@ static void snb_fbc_blit_update(struct drm_device *dev)
        I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);
        POSTING_READ(GEN6_BLITTER_ECOSKPD);
 
-       gen6_gt_force_wake_put(dev_priv, FORCEWAKE_MEDIA);
+       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_MEDIA);
 }
 
 static void ilk_fbc_enable(struct drm_crtc *crtc)
index 49c7d862f8a5672a1e298d3ff84b26a6b719c988..cbfdbddf2eeb0f88dab47212b2d0b37290695963 100644 (file)
@@ -296,7 +296,7 @@ static void execlists_elsp_write(struct intel_engine_cs *ring,
        desc[3] = (u32)(temp >> 32);
        desc[2] = (u32)temp;
 
-       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
        I915_WRITE(RING_ELSP(ring), desc[1]);
        I915_WRITE(RING_ELSP(ring), desc[0]);
        I915_WRITE(RING_ELSP(ring), desc[3]);
@@ -306,7 +306,7 @@ static void execlists_elsp_write(struct intel_engine_cs *ring,
 
        /* ELSP is a wo register, so use another nearby reg for posting instead */
        POSTING_READ(RING_EXECLIST_STATUS(ring));
-       gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 }
 
 static int execlists_update_context(struct drm_i915_gem_object *ctx_obj,
index 292522260aa6c4b36a4a2a9fe6b992ddea3b87ea..acfa362b042dc26a90dc2a3f4be5ff27412321e4 100644 (file)
@@ -76,7 +76,6 @@ static void gen9_init_clock_gating(struct drm_device *dev)
                   _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));
 }
 
-
 static void i915_pineview_get_mem_freq(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
@@ -3915,11 +3914,11 @@ static void valleyview_disable_rps(struct drm_device *dev)
 
        /* we're doing forcewake before Disabling RC6,
         * This what the BIOS expects when going into suspend */
-       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
        I915_WRITE(GEN6_RC_CONTROL, 0);
 
-       gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 }
 
 static void intel_print_rc6_info(struct drm_device *dev, u32 mode)
@@ -4037,7 +4036,7 @@ static void gen9_enable_rps(struct drm_device *dev)
 
        /* 1b: Get forcewake during program sequence. Although the driver
         * hasn't enabled a state yet where we need forcewake, BIOS may have.*/
-       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
        /* 2a: Disable RC states. */
        I915_WRITE(GEN6_RC_CONTROL, 0);
@@ -4060,7 +4059,7 @@ static void gen9_enable_rps(struct drm_device *dev)
                                   GEN6_RC_CTL_EI_MODE(1) |
                                   rc6_mask);
 
-       gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 
 }
 
@@ -4076,7 +4075,7 @@ static void gen8_enable_rps(struct drm_device *dev)
 
        /* 1c & 1d: Get forcewake during program sequence. Although the driver
         * hasn't enabled a state yet where we need forcewake, BIOS may have.*/
-       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
        /* 2a: Disable RC states. */
        I915_WRITE(GEN6_RC_CONTROL, 0);
@@ -4143,7 +4142,7 @@ static void gen8_enable_rps(struct drm_device *dev)
        dev_priv->rps.power = HIGH_POWER; /* force a reset */
        gen6_set_rps(dev_priv->dev, dev_priv->rps.min_freq_softlimit);
 
-       gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 }
 
 static void gen6_enable_rps(struct drm_device *dev)
@@ -4171,7 +4170,7 @@ static void gen6_enable_rps(struct drm_device *dev)
                I915_WRITE(GTFIFODBG, gtfifodbg);
        }
 
-       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
        /* Initialize rps frequencies */
        gen6_init_rps_frequencies(dev);
@@ -4251,7 +4250,7 @@ static void gen6_enable_rps(struct drm_device *dev)
                        DRM_ERROR("Couldn't fix incorrect rc6 voltage\n");
        }
 
-       gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 }
 
 static void __gen6_update_ring_freq(struct drm_device *dev)
@@ -4710,7 +4709,7 @@ static void cherryview_enable_rps(struct drm_device *dev)
 
        /* 1a & 1b: Get forcewake during program sequence. Although the driver
         * hasn't enabled a state yet where we need forcewake, BIOS may have.*/
-       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
        /*  Disable RC states. */
        I915_WRITE(GEN6_RC_CONTROL, 0);
@@ -4783,7 +4782,7 @@ static void cherryview_enable_rps(struct drm_device *dev)
 
        valleyview_set_rps(dev_priv->dev, dev_priv->rps.efficient_freq);
 
-       gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 }
 
 static void valleyview_enable_rps(struct drm_device *dev)
@@ -4804,7 +4803,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
        }
 
        /* If VLV, Forcewake all wells, else re-direct to regular path */
-       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
        /*  Disable RC states. */
        I915_WRITE(GEN6_RC_CONTROL, 0);
@@ -4867,7 +4866,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
 
        valleyview_set_rps(dev_priv->dev, dev_priv->rps.efficient_freq);
 
-       gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 }
 
 void ironlake_teardown_rc6(struct drm_device *dev)
index b117717639fec8ef47bf1af54d618d9a3215ee22..d7aa5c464d965f1b6c4cefeb3f1a6d1a138e3f72 100644 (file)
@@ -539,7 +539,7 @@ static int init_ring_common(struct intel_engine_cs *ring)
        struct drm_i915_gem_object *obj = ringbuf->obj;
        int ret = 0;
 
-       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
        if (!stop_ring(ring)) {
                /* G45 ring initialization often fails to reset head to zero */
@@ -611,7 +611,7 @@ static int init_ring_common(struct intel_engine_cs *ring)
        memset(&ring->hangcheck, 0, sizeof(ring->hangcheck));
 
 out:
-       gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 
        return ret;
 }
index c08a6f9200ff8b11d2f415b9c7e516960e95071b..90c19510885463a14b07c2f0234f23f02a98b3ff 100644 (file)
@@ -234,7 +234,7 @@ static int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
        return ret;
 }
 
-static void gen6_force_wake_timer(unsigned long arg)
+static void intel_uncore_fw_release_timer(unsigned long arg)
 {
        struct intel_uncore_forcewake_domain *domain = (void *)arg;
        unsigned long irqflags;
@@ -270,7 +270,7 @@ void intel_uncore_forcewake_reset(struct drm_device *dev, bool restore)
                        if (del_timer_sync(&domain->timer) == 0)
                                continue;
 
-                       gen6_force_wake_timer((unsigned long)domain);
+                       intel_uncore_fw_release_timer((unsigned long)domain);
                }
 
                spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
@@ -314,7 +314,7 @@ void intel_uncore_forcewake_reset(struct drm_device *dev, bool restore)
        }
 
        if (!restore)
-               assert_force_wake_inactive(dev_priv);
+               assert_forcewakes_inactive(dev_priv);
 
        spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
 }
@@ -358,14 +358,21 @@ void intel_uncore_sanitize(struct drm_device *dev)
        intel_disable_gt_powersave(dev);
 }
 
-/*
- * Generally this is called implicitly by the register read function. However,
- * if some sequence requires the GT to not power down then this function should
- * be called at the beginning of the sequence followed by a call to
- * gen6_gt_force_wake_put() at the end of the sequence.
+/**
+ * intel_uncore_forcewake_get - grab forcewake domain references
+ * @dev_priv: i915 device instance
+ * @fw_domains: forcewake domains to get reference on
+ *
+ * This function can be used get GT's forcewake domain references.
+ * Normal register access will handle the forcewake domains automatically.
+ * However if some sequence requires the GT to not power down a particular
+ * forcewake domains this function should be called at the beginning of the
+ * sequence. And subsequently the reference should be dropped by symmetric
+ * call to intel_unforce_forcewake_put(). Usually caller wants all the domains
+ * to be kept awake so the @fw_domains would be then FORCEWAKE_ALL.
  */
-void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv,
-                           unsigned fw_domains)
+void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
+                               unsigned fw_domains)
 {
        unsigned long irqflags;
        struct intel_uncore_forcewake_domain *domain;
@@ -391,11 +398,16 @@ void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv,
        spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
 }
 
-/*
- * see gen6_gt_force_wake_get()
+/**
+ * intel_uncore_forcewake_put - release a forcewake domain reference
+ * @dev_priv: i915 device instance
+ * @fw_domains: forcewake domains to put references
+ *
+ * This function drops the device-level forcewakes for specified
+ * domains obtained by intel_uncore_forcewake_get().
  */
-void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv,
-                           unsigned fw_domains)
+void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
+                               unsigned fw_domains)
 {
        unsigned long irqflags;
        struct intel_uncore_forcewake_domain *domain;
@@ -422,7 +434,7 @@ void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv,
        spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
 }
 
-void assert_force_wake_inactive(struct drm_i915_private *dev_priv)
+void assert_forcewakes_inactive(struct drm_i915_private *dev_priv)
 {
        struct intel_uncore_forcewake_domain *domain;
        int id;
@@ -964,7 +976,7 @@ static void fw_domain_init(struct drm_i915_private *dev_priv,
        d->i915 = dev_priv;
        d->id = domain_id;
 
-       setup_timer(&d->timer, gen6_force_wake_timer, (unsigned long)d);
+       setup_timer(&d->timer, intel_uncore_fw_release_timer, (unsigned long)d);
 
        dev_priv->uncore.fw_domains |= (1 << domain_id);
 }