}
int
-i2c_read(unsigned char chip, unsigned int addr, int alen,
- unsigned char *buffer, int len)
+i2c_read (unsigned char chip, unsigned int addr, int alen,
+ unsigned char *buffer, int len)
{
#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
/* we only allow one address byte */
#define CFG_HZ 1000
#define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
- /* AT91C_TC_TIMER_DIV1_CLOCK */
+ /* AT91C_TC_TIMER_DIV1_CLOCK */
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
/*
* Main packet reception loop. Loop receiving packets until
- * someone sets `NetQuit'.
+ * someone sets `NetState' to a state that terminates.
*/
for (;;) {
WATCHDOG_RESET();
thand_f *x;
#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
-#if defined(CFG_FAULT_ECHO_LINK_DOWN) && defined(CONFIG_STATUS_LED) && defined(STATUS_LED_RED)
+# if defined(CFG_FAULT_ECHO_LINK_DOWN) &&
+ defined(CONFIG_STATUS_LED) &&
+ defined(STATUS_LED_RED)
/*
* Echo the inverted link state to the fault LED.
*/
} else {
status_led_set (STATUS_LED_RED, STATUS_LED_ON);
}
-#endif /* CFG_FAULT_ECHO_LINK_DOWN, ... */
+# endif /* CFG_FAULT_ECHO_LINK_DOWN, ... */
#endif /* CONFIG_MII, ... */
x = timeHandler;
timeHandler = (thand_f *)0;
unsigned char buf[RS5C372_RAM_SIZE + 1];
int ret;
-
/* note that this returns reg. 15 in buf[1] */
ret = rs5c372_readram(&buf[1], RS5C372_RAM_SIZE);
if (ret != 0) {